Remaining SATA (and other) issues
sos at deepcore.dk
Thu Nov 8 02:23:04 PST 2007
Alexander Sabourenkov wrote:
> SÃ¸ren Schmidt wrote:
>> You cant remove this, ATA uses the 0x54 reg to store interrupts, its
>> a gen purpose reg on the promises, this initialization is neededed.
> Hmm. Cursory greps do not show writes there neither in vendor, nor in
> linux drivers.
> I only found it in ata_piix.c from linux, as PIIX_IOCFG /* IDE I/O
> configuration register */.
> Thus I'm not sure it is really needed, but I leave that up to your
As I said ATA (as in my driver) uses this promise general purpose
register to store interrupts into, it is very much needed.
The reason is that on some promise chips the interrupts are reset on
read, so I can only read the status *once* but I need it several times.
>> This part is wrong for older promise chips, as the port# is different.
>> I also have a hard time seeing that this couldd change anything since
>> the registers are reset etc "my way" on each interrupt.
> If that means ata_promise_mio_intr(), then no, it does not touch 0x60
> for PRSATA2, it touches 0x54 instead.
Oh yes it does look for the "stat_reg" in ata_promise_mio_status() which
does the interrupt status getting etc...
>> Besides you *do not* want to pass the other bits through, they shoudl
>> be masked off and always written as 0's.
> Why then vendor does pass them through?
Good question, their docs says nothing about it actually, I suppose this
is more a programming style question than anything else, anyhow it will
only change evt behavior until the first interrupt, then I'll write the
entire reg anyways :)
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