cvs commit: src/sys/i386/cpufreq est.c
rbgarga at gmail.com
Mon Aug 25 20:36:35 UTC 2008
On Mon, Aug 25, 2008 at 5:21 PM, Dimitry Andric <dimitry at andric.com> wrote:
> On 2008-08-25 21:27, Renato Botelho wrote:
> > cpu0: <ACPI CPU> on acpi0
> > est0: <Enhanced SpeedStep Frequency Control> on cpu0
> > est0: Guessed bus clock (high) of 200 MHz
> > Fatal trap 18: integer divide fault while in kernel mode
> > cpuid = 0; acpi id = 00
> > ...
> > panic: integer divide fault
> Unfortunately, there are CPU models around that have MSR_PERF_STATUS
> bits that are inconsistent, e.g:
> - The low and high multipliers (bits 31:24 and 15:8) are equal, so if
> you subtract them and then divide... boom :)
> - Either the low or high multipliers (or both) are zero, which is also
> not good, at least not with the current code.
> As an example, I originally added some multiplier sanity checks here:
Is this information good enough or you still need I collect some data? I'm
asking because i don't have a serial console at this machine and it's not so
to get this kind of data.
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