svn commit: r198341 - in head/sys: amd64/amd64 arm/arm arm/mv
i386/i386 i386/xen ia64/ia64 kern mips/mips powerpc/aim
powerpc/booke powerpc/include powerpc/powerpc sparc64/sparc64
sun4v/sun4v vm
Rafal Jaworowski
raj at semihalf.com
Thu Oct 22 09:10:15 UTC 2009
On 2009-10-21, at 20:38, Marcel Moolenaar wrote:
> The key property of this change is that the I-cache is made coherent
> *after* writes have been done. Doing it in the PMAP layer when adding
> or changing a mapping means that the I-cache is made coherent
> *before*
> any writes happen. The difference is key when the I-cache prefetches.
Marcel, does this new approach help with your problems on MV-78xxx
with SATA when executing binaries was failing with various signals
etc. (and the suspicions were this was due to some i-cache incoherency)?
Rafal
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