huge nanosleep variance on 11-stable

[Konstantin Belousov]

On Wed, Nov 02, 2016 at 09:18:15AM -0700, Jason Harmening wrote:
> I think you are probably right.  Hacking out the Intel-specific
> additions to C-state parsing in acpi_cpu_cx_cst() from r282678 (thus
> going back to sti;hlt instead of monitor+mwait at C1) fixed the problem
> for me.  But r282678 also had the effect of enabling C2 and C3 on my
> system, because ACPI only presents MWAIT entries for those states and
> not p_lvlx.
You can do the same with "debug.acpi.disabled=mwait" loader tunable
without hacking the code. And set sysctl hw.acpi.cpu.cx_lowest to C1 to
enforce use of hlt instruction even when mwait states were requested.