rl0: watchdog timeout + 40, 000 ms ping with 7.1-BETA-i386-disc1.iso

[Pyun YongHyeon]

On Thu, Sep 25, 2008 at 05:36:44PM +0200, Julian Stacey wrote:
 > Hi stable@,
 > I just imported an old tower from a friend. Used to run Linux OK.
 > Reset BIOS to defaults, turned off power saving etc, installed
 > 7.1-BETA-i386-disc1.iso
 > I now sees 
 > 	rl0: watchdog timeout + 40,000 ms ping outgoing.
 > 	ping incoming fails,
 > it's not my net switch, I've moved to different segments etc & all else fine
 > 
 > I'm remaking binaries, & will look around for netstat r whatever
 > commands later, meanwhile here's dmesg (via a floppy)
 > 
 > Of course it could be somehow a hardaware bad config, its a new box to me.
 > 
 > Copyright (c) 1992-2008 The FreeBSD Project.
 > Copyright (c) 1979, 1980, 1983, 1986, 1988, 1989, 1991, 1992, 1993, 1994
 > 	The Regents of the University of California. All rights reserved.
 > FreeBSD is a registered trademark of The FreeBSD Foundation.
 > FreeBSD 7.1-BETA #0: Sun Sep  7 13:49:18 UTC 2008
 >     root at logan.cse.buffalo.edu:/usr/obj/usr/src/sys/GENERIC
 > Timecounter "i8254" frequency 1193182 Hz quality 0
 > CPU: Intel Pentium III (651.48-MHz 686-class CPU)
 >   Origin = "GenuineIntel"  Id = 0x681  Stepping = 1
 >   Features=0x383f9ff<FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,MMX,FXSR,SSE>
 > real memory  = 134152192 (127 MB)
 > avail memory = 117157888 (111 MB)

[...]

 > rl0: <RealTek 8139 10/100BaseTX> port 0xd800-0xd8ff mem 0xee000000-0xee0000ff irq 12 at device 10.0 on pci0
 > miibus0: <MII bus> on rl0
 > rlphy0: <RealTek internal media interface> PHY 0 on miibus0
 > rlphy0:  10baseT, 10baseT-FDX, 100baseTX, 100baseTX-FDX, auto
 > rl0: Ethernet address: 00:08:a1:6d:65:07
 > rl0: [ITHREAD]

[...]

 > rl0: link state changed to UP
 > rl0: watchdog timeout
 > rl0: link state changed to DOWN
 > rl0: link state changed to UP
 > rl0: link state changed to DOWN
 > rl0: link state changed to UP
 > rl0: watchdog timeout
 > rl0: watchdog timeout
 > 

Is there reliable way to reproduce the issue? 
Anyway, would you try attached patch and let me know result?

-- 
Regards,
Pyun YongHyeon
-------------- next part --------------
Index: sys/pci/if_rl.c
===================================================================
--- sys/pci/if_rl.c	(revision 183366)
+++ sys/pci/if_rl.c	(working copy)
@@ -650,6 +650,34 @@
 static void
 rl_miibus_statchg(device_t dev)
 {
+	struct rl_softc		*sc;
+	struct ifnet		*ifp;
+	struct mii_data		*mii;
+
+	sc = device_get_softc(dev);
+	mii = device_get_softc(sc->rl_miibus);
+	ifp = sc->rl_ifp;
+	if (mii == NULL || ifp == NULL ||
+	    (ifp->if_drv_flags & IFF_DRV_RUNNING) == 0)
+		return;
+
+	sc->rl_flags &= ~RL_FLAG_LINK;
+	if ((mii->mii_media_status & (IFM_ACTIVE | IFM_AVALID)) ==
+	    (IFM_ACTIVE | IFM_AVALID)) {
+		switch (IFM_SUBTYPE(mii->mii_media_active)) {
+		case IFM_10_T:
+		case IFM_100_TX:
+			sc->rl_flags |= RL_FLAG_LINK;
+			break;
+		default:
+			break;
+		}
+	}
+	/*
+	 * RealTek controllers does not provide any interface to
+	 * Tx/Rx MACs for resolved speed, duplex and flow-control
+	 * parameters.
+	 */
 }
 
 /*
@@ -1236,7 +1264,6 @@
 				CSR_WRITE_4(sc, RL_TXCFG, RL_TXCFG_CONFIG);
 			oldthresh = sc->rl_txthresh;
 			/* error recovery */
-			rl_reset(sc);
 			rl_init_locked(sc);
 			/* restore original threshold */
 			sc->rl_txthresh = oldthresh;
@@ -1305,10 +1332,8 @@
 
 		/* XXX We should check behaviour on receiver stalls. */
 
-		if (status & RL_ISR_SYSTEM_ERR) {
-			rl_reset(sc);
+		if (status & RL_ISR_SYSTEM_ERR)
 			rl_init_locked(sc);
-		}
 	}
 }
 #endif /* DEVICE_POLLING */
@@ -1345,10 +1370,8 @@
 			rl_rxeof(sc);
 		if ((status & RL_ISR_TX_OK) || (status & RL_ISR_TX_ERR))
 			rl_txeof(sc);
-		if (status & RL_ISR_SYSTEM_ERR) {
-			rl_reset(sc);
+		if (status & RL_ISR_SYSTEM_ERR)
 			rl_init_locked(sc);
-		}
 	}
 
 	if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd))
@@ -1423,6 +1446,10 @@
 
 	RL_LOCK_ASSERT(sc);
 
+	if ((ifp->if_drv_flags & (IFF_DRV_RUNNING | IFF_DRV_OACTIVE)) !=
+	    IFF_DRV_RUNNING || (sc->rl_flags & RL_FLAG_LINK) == 0)
+		return;
+
 	while (RL_CUR_TXMBUF(sc) == NULL) {
 
 		IFQ_DRV_DEQUEUE(&ifp->if_snd, m_head);
@@ -1489,6 +1516,8 @@
 	 */
 	rl_stop(sc);
 
+	rl_reset(sc);
+
 	/*
 	 * Init our MAC address.  Even though the chipset
 	 * documentation doesn't mention it, we need to enter "Config
@@ -1564,6 +1593,7 @@
 	/* Enable receiver and transmitter. */
 	CSR_WRITE_1(sc, RL_COMMAND, RL_CMD_TX_ENB|RL_CMD_RX_ENB);
 
+	sc->rl_flags &= ~RL_FLAG_LINK;
 	mii_mediachg(mii);
 
 	CSR_WRITE_1(sc, RL_CFG1, RL_CFG1_DRVLOAD|RL_CFG1_FULLDUPLEX);
@@ -1709,9 +1739,19 @@
 	sc->rl_watchdog_timer = 0;
 	callout_stop(&sc->rl_stat_callout);
 	ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE);
+	sc->rl_flags &= ~RL_FLAG_LINK;
 
+	CSR_WRITE_2(sc, RL_IMR, 0x0000);
 	CSR_WRITE_1(sc, RL_COMMAND, 0x00);
-	CSR_WRITE_2(sc, RL_IMR, 0x0000);
+	for (i = 0; i < RL_TIMEOUT; i++) {
+		DELAY(1);
+		if ((CSR_READ_1(sc, RL_COMMAND) &
+		    (RL_CMD_RX_ENB | RL_CMD_TX_ENB)) == 0)
+			break;
+	}
+	if (i == RL_TIMEOUT)
+		device_printf(sc->rl_dev, "stopping Tx/Rx MAC timed out!\n");
+
 	bus_dmamap_unload(sc->rl_tag, sc->rl_cdata.rl_rx_dmamap);
 
 	/*