Intel DG31PR and RTL8168/8111 issue

Abdullah Ibn Hamad Al-Marri wearabnet at yahoo.ca
Tue Dec 4 07:42:35 PST 2007


Hello Pyun,

----- Original Message ----
> From: Pyun YongHyeon <pyunyh at gmail.com>
> To: Abdullah Ibn Hamad Al-Marri <wearabnet at yahoo.ca>
> Cc: FreeBSD STABLE <freebsd-stable at freebsd.org>
> Sent: Tuesday, December 4, 2007 3:44:53 AM
> Subject: Re: Intel DG31PR and RTL8168/8111 issue
> 
> On Mon, Dec 03, 2007 at 12:52:33PM -0800, Abdullah Ibn Hamad
> Al-Marri
> 
 wrote:
>  > Hello Pyun,
>  > 
>  > This is a new server with latest RELENG_7 src and latest BIOS
> as
> 
 well.
>  > 
>  > Copyright (c) 1992-2007 The FreeBSD Project.
>  > Copyright (c) 1979, 1980, 1983, 1986, 1988, 1989, 1991, 1992, 1993,
>  > 1994
>  >         The Regents of the University of California. All rights
>  > reserved.
>  > FreeBSD is a registered trademark of The FreeBSD Foundation.
>  > FreeBSD 7.0-BETA4 #0: Mon Dec  3 23:37:27 UTC 2007
>  >     lomag at mx1.wearab.net:/usr/obj/usr/src/sys/MX1
>  > Timecounter "i8254" frequency 1193182 Hz quality 0
>  > CPU: Intel(R) Core(TM)2 Duo CPU     E6750  @ 2.66GHz (2666.62-MHz
>  > K8-class CPU)
>  >   Origin = "GenuineIntel"  Id = 0x6fb  Stepping = 11
>  > 
> 
 Features=0xbfebfbff
> OV,PAT,PSE36,CLFLUSH,DTS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,PBE>
>  > 
> 
 Features2=0xe3fd
>  >   AMD Features=0x20100800
>  >   AMD Features2=0x1
>  >   Cores per package: 2
>  > usable memory = 4275109888 (4077 MB)
>  > avail memory  = 4106035200 (3915 MB)
>  > ACPI APIC Table: 
>  > FreeBSD/SMP: Multiprocessor System Detected: 2 CPUs
>  >  cpu0 (BSP): APIC ID:  0
>  >  cpu1 (AP): APIC ID:  1
>  > ioapic0  irqs 0-23 on motherboard
>  > acpi0:  on motherboard
>  > acpi0: [ITHREAD]
>  > acpi0: Power Button (fixed)
>  > Timecounter "ACPI-fast" frequency 3579545 Hz quality 1000
>  > acpi_timer0: <24-bit timer at 3.579545MHz> port 0x408-0x40b on
>  > acpi0
>  > acpi_hpet0:  iomem
>  > 0xfed00000-0xfed003ff on acpi0
>  > Timecounter "HPET" frequency 14318180 Hz quality 900
>  > cpu0:  on acpi0
>  > est0:  on cpu0
>  > est: CPU supports Enhanced Speedstep, but is not recognized.
>  > est: cpu_vendor GenuineIntel, msr 82a082a0600082a
>  > device_attach: est0 attach returned 6
>  > p4tcc0:  on cpu0
>  > cpu1:  on acpi0
>  > est1:  on cpu1
>  > est: CPU supports Enhanced Speedstep, but is not recognized.
>  > est: cpu_vendor GenuineIntel, msr 82a082a0600082a
>  > device_attach: est1 attach returned 6
>  > p4tcc1:  on cpu1
>  > pcib0:  port 0xcf8-0xcff on acpi0
>  > pci0:  on pcib0
>  > pcib1:  irq 16 at device 1.0 on pci0
>  > pci1:  on pcib1
>  > vgapci0:  port 0xc070-0xc077 mem
>  > 0xd0300000-0xd037ffff,0xc0000000-0xcfffffff,0xd0200000-0xd02fffff
>  > irq 16 at device 2.0 on pci0
>  > pcib2:  irq 16 at device 28.0 on pci0
>  > pci2:  on pcib2
>  > pcib3:  irq 17 at device 28.1 on pci0
>  > pci3:  on pcib3
>  > pci3:  at device 0.0 (no driver attached)
>  > pcib4:  at device 30.0 on pci0
>  > pci4:  on pcib4
>  > sis0:  port 0xa000-0xa0ff mem
>  > 0xd0010000-0xd0010fff irq 21 at device 6.0 on pci4
>  > sis0: Silicon Revision: DP83815D
>  > miibus0:  on sis0
>  > ukphy0:  PHY 0 on miibus0
>  > ukphy0:  10baseT, 10baseT-FDX, 100baseTX, 100baseTX-FDX, auto
>  > sis0: Ethernet address: 00:30:ab:19:8b:c3
>  > sis0: [ITHREAD]
>  > isab0:  at device 31.0 on pci0
>  > isa0:  on isab0
>  > atapci0:  port
>  >
> 
 0xc060-0xc067,0xc050-0xc053,0xc040-0xc047,0xc030-0xc033,0xc020-0xc02f
>  > irq 17 at device 31.2 on pci0
>  > atapci0: [ITHREAD]
>  > ata2:  on atapci0
>  > ata2: [ITHREAD]
>  > ata3:  on atapci0
>  > ata3: [ITHREAD]
>  > pci0:  at device 31.3 (no driver attached)
>  > acpi_button0:  on acpi0
>  > acpi_button1:  on acpi0
>  > atkbdc0:  port 0x60,0x64 irq 1 on
>  > acpi0
>  > atkbd0:  irq 1 on atkbdc0
>  > kbd0 at atkbd0
>  > atkbd0: [GIANT-LOCKED]
>  > atkbd0: [ITHREAD]
>  > sc0:  at flags 0x100 on isa0
>  > sc0: VGA <16 virtual consoles, flags=0x300>
>  > vga0:  at port 0x3c0-0x3df iomem 0xa0000-0xbffff
>  > on isa0
>  > Timecounters tick every 1.000 msec
>  > ad4: 238475MB  at ata2-master SATA150
>  > ad6: 715404MB  at ata3-master
>  > SATA150
>  > SMP: AP CPU #1 Launched!
>  > Trying to mount root from ufs:/dev/ad4s1a
>  > sis0: Applying short cable fix (reg=f5)
>  > 
>  > 
>  > none1 at pci0:3:0:0:       class=0x020000 card=0xd6088086
>  > chip=0x816810ec rev=0x01 hdr=0x00
>  >     vendor     = 'Realtek Semiconductor'
>  >     device     = 'RTL8168/8111 PCI-E Gigabit Ethernet NIC'
>  >     class      = network
>  >     subclass   = ethernet
>  > 
> 
> Try attached patch. I think I posted similiar patches several times
> to get feedback but I have never heard of success/failure.
> 
> -- 
> Regards,
> Pyun YongHyeon
> 
> 
> -----Inline Attachment Follows-----
> 
> Index: dev/re/if_re.c
> ===================================================================
> RCS file: /home/ncvs/src/sys/dev/re/if_re.c,v
> retrieving revision 1.98
> diff -u -r1.98 if_re.c
> --- dev/re/if_re.c    3 Dec 2007 01:28:08 -0000    1.98
> +++ dev/re/if_re.c    4 Dec 2007 00:36:06 -0000
> @@ -182,6 +182,8 @@
>          "RealTek 8168/8111B PCIe Gigabit Ethernet" },
>      { RT_VENDORID, RT_DEVICEID_8168, RL_HWREV_8168_SPIN2,
>          "RealTek 8168/8111B PCIe Gigabit Ethernet" },
> +    { RT_VENDORID, RT_DEVICEID_8168, RL_HWREV_8168_SPIN3,
> +        "RealTek 8168/8111B PCIe Gigabit Ethernet" },
>      { RT_VENDORID, RT_DEVICEID_8169, RL_HWREV_8169,
>          "RealTek 8169 Gigabit Ethernet" },
>      { RT_VENDORID, RT_DEVICEID_8169, RL_HWREV_8169S,
> @@ -223,6 +225,7 @@
>      { RL_HWREV_8100E, RL_8169, "8100E"},
>      { RL_HWREV_8101E, RL_8169, "8101E"},
>      { RL_HWREV_8168_SPIN2, RL_8169, "8168"},
> +    { RL_HWREV_8168_SPIN3, RL_8169, "8168"},
>      { 0, 0, NULL }
>  };
>  
> @@ -683,13 +686,19 @@
>  
>      hwrev = CSR_READ_4(sc, RL_TXCFG) & RL_TXCFG_HWREV;
>  
> -    if (hwrev == RL_HWREV_8100E || hwrev == RL_HWREV_8101E ||
> -        hwrev == RL_HWREV_8168_SPIN1 || hwrev ==
> RL_HWREV_8168_SPIN2)
> 
 {
> +    switch (hwrev) {
> +    case RL_HWREV_8100E:
> +    case RL_HWREV_8101E:
> +    case RL_HWREV_8168_SPIN1:
> +    case RL_HWREV_8168_SPIN2:
> +    case RL_HWREV_8168_SPIN3:
>          CSR_WRITE_4(sc, RL_MAR0, bswap32(hashes[1]));
>          CSR_WRITE_4(sc, RL_MAR4, bswap32(hashes[0]));
> -    } else {
> +        break;
> +    default:
>          CSR_WRITE_4(sc, RL_MAR0, hashes[0]);
>          CSR_WRITE_4(sc, RL_MAR4, hashes[1]);
> +        break;
>      }
>  }
>  
> @@ -940,6 +949,9 @@
>              sc->rl_btag = rman_get_bustag(sc->rl_res);
>              sc->rl_bhandle = rman_get_bushandle(sc->rl_res);
>              hwrev = CSR_READ_4(sc, RL_TXCFG) & RL_TXCFG_HWREV;
> +#if 1
> +            printf("hwrev = %x\n", hwrev);
> +#endif
>              bus_release_resource(dev, RL_RES,
>                  RL_RID, sc->rl_res);
>              if (t->rl_basetype == hwrev) {
> @@ -1320,6 +1332,7 @@
>              case RL_HWREV_8169_8110SB:
>              case RL_HWREV_8169_8110SC:
>              case RL_HWREV_8168_SPIN2:
> +            case RL_HWREV_8168_SPIN3:
>                  re_gmii_writereg(dev, 1, 0x1f, 0);
>                  re_gmii_writereg(dev, 1, 0x0e, 0);
>                  break;
> Index: pci/if_rlreg.h
> ===================================================================
> RCS file: /home/ncvs/src/sys/pci/if_rlreg.h,v
> retrieving revision 1.68
> diff -u -r1.68 if_rlreg.h
> --- pci/if_rlreg.h    26 Nov 2007 18:25:07 -0000    1.68
> +++ pci/if_rlreg.h    4 Dec 2007 00:36:06 -0000
> @@ -156,6 +156,7 @@
>  #define RL_HWREV_8100E        0x30800000
>  #define RL_HWREV_8101E        0x34000000
>  #define RL_HWREV_8168_SPIN2    0x38000000
> +#define RL_HWREV_8168_SPIN3    0x38400000
>  #define RL_HWREV_8139        0x60000000
>  #define RL_HWREV_8139A        0x70000000
>  #define RL_HWREV_8139AG        0x70800000
> 
> 
> 
> -----Inline Attachment Follows-----
> 


I tried this patch and it worked before I got the patch you sent.

Index: dev/re/if_re.c
===================================================================
RCS file: /home/ncvs/src/sys/dev/re/if_re.c,v
retrieving revision 1.95
diff -u -r1.95 if_re.c
--- dev/re/if_re.c      14 Aug 2007 02:00:04 -0000      1.95
+++ dev/re/if_re.c      30 Oct 2007 01:05:06 -0000
@@ -180,6 +180,8 @@
                "RealTek 8168/8111B PCIe Gigabit Ethernet" },
        { RT_VENDORID, RT_DEVICEID_8168, RL_HWREV_8168_SPIN2,
                "RealTek 8168/8111B PCIe Gigabit Ethernet" },
+       { RT_VENDORID, RT_DEVICEID_8168, RL_HWREV_8168_SPIN3,
+               "RealTek 8168/8111B PCIe Gigabit Ethernet" },
        { RT_VENDORID, RT_DEVICEID_8169, RL_HWREV_8169,
                "RealTek 8169 Gigabit Ethernet" },
        { RT_VENDORID, RT_DEVICEID_8169, RL_HWREV_8169S,
@@ -221,6 +223,7 @@
        { RL_HWREV_8100E, RL_8169, "8100E"},
        { RL_HWREV_8101E, RL_8169, "8101E"},
        { RL_HWREV_8168_SPIN2, RL_8169, "8168"},
+       { RL_HWREV_8168_SPIN3, RL_8169, "8168"},
        { 0, 0, NULL }
 };

@@ -676,14 +679,18 @@
         */

        hwrev = CSR_READ_4(sc, RL_TXCFG) & RL_TXCFG_HWREV;
-
-       if (hwrev == RL_HWREV_8100E || hwrev == RL_HWREV_8101E ||
-           hwrev == RL_HWREV_8168_SPIN1 || hwrev == RL_HWREV_8168_SPIN2) {
+       switch (hwrev) {
+       case RL_HWREV_8100E:
+       case RL_HWREV_8101E:
+       case RL_HWREV_8168_SPIN1:
+       case RL_HWREV_8168_SPIN2:
                CSR_WRITE_4(sc, RL_MAR0, bswap32(hashes[1]));
                CSR_WRITE_4(sc, RL_MAR4, bswap32(hashes[0]));
-       } else {
+               break;
+       default:
                CSR_WRITE_4(sc, RL_MAR0, hashes[0]);
                CSR_WRITE_4(sc, RL_MAR4, hashes[1]);
+               break;
        }
 }

@@ -1314,6 +1321,7 @@
                        case RL_HWREV_8169_8110SB:
                        case RL_HWREV_8169_8110SC:
                        case RL_HWREV_8168_SPIN2:
+                       case RL_HWREV_8168_SPIN3:
                                re_gmii_writereg(dev, 1, 0x1f, 0);
                                re_gmii_writereg(dev, 1, 0x0e, 0);
                                break;
Index: pci/if_rlreg.h
===================================================================
RCS file: /home/ncvs/src/sys/pci/if_rlreg.h,v
retrieving revision 1.67
diff -u -r1.67 if_rlreg.h
--- pci/if_rlreg.h      24 Jul 2007 01:24:03 -0000      1.67
+++ pci/if_rlreg.h      30 Oct 2007 01:05:07 -0000
@@ -156,6 +156,7 @@
 #define RL_HWREV_8100E         0x30800000
 #define RL_HWREV_8101E         0x34000000
 #define RL_HWREV_8168_SPIN2    0x38000000
+#define RL_HWREV_8168_SPIN3    0x38400000
 #define RL_HWREV_8139          0x60000000
 #define RL_HWREV_8139A         0x70000000
 #define RL_HWREV_8139AG                0x70800000



I'll try the patch you sent too when the server reaches the ISP and being online.

Do you have any comments?


 
Regards, 
-Abdullah Ibn Hamad Al-Marri
Arab Portal
http://www.WeArab.Net/






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