[patch] enable mdio port 1, remove phy mask hard coding

[Adrian Chadd]

Hi all,

This patch does a few things:

* it adds mdio port 1 (from MAC1/arge1);
* it removes the hard-coded assumption that arge0/arge1 share the same
mdio bus, which I believe is only relevant for AR71xx;
* it removes phymask from the arge config;
* it introduces a new configuration parameter, "multiphy", which binds
the port to the fake phy. The existing code does this if phymask has
>1 bit set. This makes it absolutely obvious.

Since ar724x CPUs have >1 MDIO bus, we have to do this work to support
the switch phys that ship with these things.


This now raises the issue of how to handle switch PHYs and normal PHYs
on alternate busses. For example, the PB47 reference board has the PHY
for arge1 hang off the only MDIO bus on the board (AR7161) - which is
MDIO 0.

It's about time we fixed this stuff. I want to push in the switch code
from juli/pat/ray/stb now.


adrian
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