HEADS UP: Toolchain changes coming soon. (Octeon, n32, n64)

[Juli Mallett]

On Mon, May 31, 2010 at 23:34, C. Jayachandran <c.jayachandran at gmail.com> wrote:
> GCC seems to have added mips64r2 support in 4.4
> (http://gcc.gnu.org/gcc-4.4/changes.html) which was a GPLv3 release,
> so I was under the impression that we could not merge it into FreeBSD.
> Is this a valid concern, or were you able to get the code re-licensed,
> Or (the option which is most likely) am I completely off track here :)
>
> Netlogic's next chip (XLP) too has MIPS64r2 ISA, so we are interested
> in getting support for this.

Well, let me be clear about the extent of the support.  There was
already a mips32r2 stub which added support for a couple of things and
I extended mips64 to mips64r2 in the same way.  It's mostly just there
to get mips64r2 instructions to work in binutils (i.e. to proxy the
ISA level to the assembler.)  I didn't use any GPLv3 sources as a
reference, although a search later suggested that the trivial parts of
the change (i.e. internally encoding mips64r2 as 65 much as mips32r2
is 33) were similar.  If you look at the diff it's pretty clear that
calling it support is pretty laughable except wrt being able to
assemble inline assembly using those instructions, setting the right
default with the assembler and support in GCC for rotate, seb and seh
instructions.

Is there specific functionality you need in GCC?

Juli.