AMD Family 10h cpufreq driver
annona2 at gmail.com
Tue Sep 23 06:58:46 UTC 2008
I haven't read yet much so mail again.
> I want to mention i'm using amd64, do your intructions account for that?
> Because i see a i386 directory, although if i see some stuff about amd64
> in the makefile that suggests it also uses that directory. Just want a
> confirmation from you that this is not a problem.
Yes! It's not a problem.
> From: http://www.xbitlabs.com/articles/cpu/display/amd-phenom_3.html
> Cool’nQuiet technology in Phenom processors got to a completely new
> level, too. Now they call it Cool’n’Quiet 2.0. It allows to
> independently adjust the power consumption and frequency of all four
> processor cores and memory controller.
Yes,too!. but ,FreeBSD has only one oid dev.cpu.0.freq_levels/dev.cpu.0.freq.
I think it is possible that dev.cpu.1.freq=1000 and dev.cpu.2.freq=1200 or so.
But freebsd is not yet enabled this feature.
> Moreover, Phenom also supports C1E state that takes place for the
> processor after a few milliseconds of idling. In this case the CPU not
> only drops down its clock speed, but also reduces the HyperTransport and
> system bus power consumption.
> Another new and pretty interesting feature of the Cool’n’Quiet 2.0
> technology is the ability of the CPU voltage regulator to receive data
> on the current power-saving CPU mode. Theoretically, it allows adjusting
> the voltage regulator circuitry parameters interactively depending on
> the processor operational conditions. I believe that mainboard
> developers will be able to implement corresponding algorithms in their
Yes.the voltage is dropping as the cpu clock-downs with pstate modules.
boot -v will writes this message if goes well.
> AMD CPUs with C1E support are currently excluded from high resolution
> timers and NOHZ support. The reason is that C1E is a BIOS controlled
> C3 power state which switches off TSC and the local APIC timer. The
> ACPI C-State control manages the TSC/local APIC timer wreckage, but
> this does not include the C1 based ("halt" instruction) C1E mode. The
> BIOS/SMM controlled C1E state works on most systems even without
> enabling ACPI C-State control.
ACPI is not my knowing area, so rewriting is welcome!
G. Otsuji<annona2 at gmail.com>
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