TSC Timecounter and multi-core/SMP

[Peter Wemm]

On Tue, Apr 15, 2008 at 1:46 AM, David Malone <dwmalone at maths.tcd.ie> wrote:
> On Mon, Apr 14, 2008 at 09:51:42PM -1000, Jeff Roberson wrote:
>  > I think we should confirm whether this is the case with earlier opterson.
>  > I have seen two processors on the same die out of sync.
>
>  This can definitely happen according to this note from AMD, which
>  someone posted a link to earlier in the thread:
>
>
>         http://lkml.org/lkml/2005/11/4/173
>
>  it can happen when you hlt one core, but don't hlt the other on
>  some processors.

AMD even ship a special program / driver / hack / whatever that
synchronizes the TSC on multi-core systems.  The Athlon64 X2 that I
have at home for games needs it for older programs to run correctly.
I'm not in front of it right now, but I think it is called 'dual core
cpu optimizer' or something vague like that.


-- 
Peter Wemm - peter at wemm.org; peter at FreeBSD.org; peter at yahoo-inc.com
"All of this is for nothing if we don't go to the stars" - JMS/B5
"If Java had true garbage collection, most programs would delete
themselves upon execution." -- Robert Sewell