TSC Timecounter and multi-core/SMP

[David Malone]

On Mon, Apr 14, 2008 at 09:51:42PM -1000, Jeff Roberson wrote:
> I think we should confirm whether this is the case with earlier opterson. 
> I have seen two processors on the same die out of sync.

This can definitely happen according to this note from AMD, which
someone posted a link to earlier in the thread:

	http://lkml.org/lkml/2005/11/4/173

it can happen when you hlt one core, but don't hlt the other on
some processors.

	David.