Broadcom BCM5751 not attaching on IBM ThinkCentre A51
Pyun YongHyeon
pyunyh at gmail.com
Mon Oct 10 20:49:08 PDT 2005
On Mon, Oct 10, 2005 at 10:59:03AM -0400, John Nielsen wrote:
> On Saturday 08 October 2005 14:14, Gavin Atkinson wrote:
> > On Fri, 7 Oct 2005, John Nielsen wrote:
> > > On Friday 07 October 2005 12:58, Gavin Atkinson wrote:
> > >> Can you post the output of pciconf -l please?
> > >
> > > Attached, along with dmesg output and kernel config file (basically a
> > > stripped-down GENERIC).
> >
> > Can you try applying the attached patch, and the patch in
> > http://www.freebsd.org/cgi/query-pr.cgi?pr=kern/79139 and if the latter
> > patch makes no difference, show the output of the extra line?
>
> I built a new kernel on -CURRENT with these two patches. No change. The
> only real diff in the dmesg output was your extra line:
>
> bge0: register value ffffffff
>
> No different output regarding the PCI bus.
>
> The ndis driver still does not work as well.
>
Due to lack of data sheet from Broadcom it seems that it's hard
to identify what caused this. Since the error message comes from
bge_chipinit(), I guess there is a possible bug(reading/writing
registers while chip reset is in progress) in bge_reset()/bge_chipinit().
--
Regards,
Pyun YongHyeon
-------------- next part --------------
--- sys/dev/bge/if_bge.c.orig Mon Oct 3 13:27:44 2005
+++ sys/dev/bge/if_bge.c Tue Oct 11 12:56:21 2005
@@ -2583,7 +2583,7 @@
struct bge_softc *sc;
{
device_t dev;
- u_int32_t cachesize, command, pcistate, reset;
+ u_int32_t cachesize, command, pcistate, new_pcistate, reset;
int i, val = 0;
dev = sc->bge_dev;
@@ -2673,10 +2673,16 @@
* results.
*/
for (i = 0; i < BGE_TIMEOUT; i++) {
- if (pci_read_config(dev, BGE_PCI_PCISTATE, 4) == pcistate)
+ new_pcistate = pci_read_config(dev, BGE_PCI_PCISTATE, 4);
+ if ((new_pcistate & ~BGE_PCISTATE_RESERVED) ==
+ (pcistate & ~BGE_PCISTATE_RESERVED))
break;
DELAY(10);
}
+
+ if ((new_pcistate & ~BGE_PCISTATE_RESERVED) !=
+ (pcistate & ~BGE_PCISTATE_RESERVED))
+ printf("bge%d: pcistate failed to revert\n", sc->bge_unit);
/* Fix up byte swapping */
CSR_WRITE_4(sc, BGE_MODE_CTL, BGE_MODECTL_BYTESWAP_NONFRAME|
--- sys/dev/bge/if_bgereg.h.orig Mon Jun 13 09:24:40 2005
+++ sys/dev/bge/if_bgereg.h Tue Oct 11 12:55:35 2005
@@ -306,6 +306,7 @@
#define BGE_PCISTATE_EXPROM_RETRY 0x00000040
#define BGE_PCISTATE_FLATVIEW_MODE 0x00000100
#define BGE_PCISTATE_PCI_TGT_RETRY_MAX 0x00000E00
+#define BGE_PCISTATE_RESERVED ((1 << 12) + (1 <<7))
/*
* PCI Clock Control register -- note, this register is read only
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