4.7 vs 5.2.1 SMP/UP bridging performance

[Bruce M Simpson]

On Thu, May 06, 2004 at 10:15:44AM -0400, Andrew Gallatin wrote:
> For what its worth, using those operations yeilds these results
> on my 2.53GHz P4 (for UP)
> 
> Mutex (atomic_store_rel_int) cycles per iteration: 208 
> Mutex (sfence) cycles per iteration: 85 
> Mutex (lfence) cycles per iteration: 63 
> Mutex (mfence) cycles per iteration: 169 
> Mutex (none) cycles per iteration: 18 
> 
> lfence looks like a winner..

Please be aware, though, that the different FENCE instructions are acting
as fences against different things. The NASM documentation has a good
quick reference for what each of the instructions do, but the definitive
reference is Intel's IA-32 programmer's reference manuals.

Regards,
BMS