Is the TSC timecounter safe on SMP system?

Dag-Erling Smørgrav des at
Sun Aug 15 02:03:44 PDT 2004

Doug White <dwhite at> writes:
> On Fri, 13 Aug 2004, Andrew Gallatin wrote:
> > I have a system where the TSC timecounter is quite a bit more accurate
> > (or perhaps its just much cheaper) than the ACPI timecounter.  This is a
> > single CPU, HTT system running an SMP kernel.
> > [...]
> > 1) Is it safe to switch to TSC?
> If you like your ticks bouncing around; you'll get different values
> depending on which CPU you read.

Not necessarily; some SMP motherboards keep the TSCs synchronized.  On
those systems, you can set the kern.timecounter.smp_tsc tunable to a
non-zero value to make the TSC eligible.  It defaults to 1 on single-
CPU systems, but the TSC code can't tell the difference between an
HTT-enabled single-CPU box and a dual-CPU box, so you have to force it
on HTT-enabled systems.

Dag-Erling Smørgrav - des at

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