kern/140251: [ata] [patch] add UDMA5 support to Intel SCH

[Alexander Motin]

The following reply was made to PR kern/140251; it has been noted by GNATS.

From: Alexander Motin <mav at FreeBSD.org>
To: bug-followup at FreeBSD.org, tharada at oucrc.org
Cc:  
Subject: Re: kern/140251: [ata] [patch] add UDMA5 support to Intel SCH
Date: Sun, 20 Dec 2009 19:00:22 +0200

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 ATA code changed a lot last time. Could you test updated patch from
 attachment on HEAD/8-STABLE? If it works, I'll commit it.
 
 -- 
 Alexander Motin
 
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  name="sch.patch"
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  filename="sch.patch"
 
 diff -ruNp ata.prev/ata-pci.h ata/ata-pci.h
 --- ata.prev/ata-pci.h	2009-12-18 22:42:19.000000000 +0200
 +++ ata/ata-pci.h	2009-12-20 18:35:37.000000000 +0200
 @@ -204,6 +204,7 @@ struct ata_pci_controller {
  #define ATA_I82801JI_R1         0x3a258086
  #define ATA_I82801JI_S2         0x3a268086
  #define ATA_I31244              0x32008086
 +#define ATA_ISCH                0x811a8086
  
  #define ATA_ITE_ID              0x1283
  #define ATA_IT8211F             0x82111283
 diff -ruNp ata.prev/chipsets/ata-intel.c ata/chipsets/ata-intel.c
 --- ata.prev/chipsets/ata-intel.c	2009-12-06 13:25:36.000000000 +0200
 +++ ata/chipsets/ata-intel.c	2009-12-20 18:48:38.000000000 +0200
 @@ -57,6 +57,7 @@ static int ata_intel_ch_attach(device_t 
  static void ata_intel_reset(device_t dev);
  static int ata_intel_old_setmode(device_t dev, int target, int mode);
  static int ata_intel_new_setmode(device_t dev, int target, int mode);
 +static int ata_intel_sch_setmode(device_t dev, int target, int mode);
  static int ata_intel_sata_getrev(device_t dev, int target);
  static int ata_intel_31244_ch_attach(device_t dev);
  static int ata_intel_31244_ch_detach(device_t dev);
 @@ -140,6 +141,7 @@ ata_intel_probe(device_t dev)
       { ATA_I82801JI_R1,  0, INTEL_AHCI, 0, ATA_SA300, "ICH10" },
       { ATA_I82801JI_S2,  0, INTEL_AHCI, 0, ATA_SA300, "ICH10" },
       { ATA_I31244,       0,          0, 2, ATA_SA150, "31244" },
 +     { ATA_ISCH,         0,          0, 1, ATA_UDMA5, "SCH" },
       { 0, 0, 0, 0, 0, 0}};
  
      if (pci_get_vendor(dev) != ATA_INTEL_ID)
 @@ -183,7 +185,13 @@ ata_intel_chipinit(device_t dev)
  	ctlr->setmode = ata_sata_setmode;
  	ctlr->getrev = ata_sata_getrev;
      }
 -
 +    /* SCH */
 +    else if (ctlr->chip->chipid == ATA_ISCH) {
 +	ctlr->channels = 1;
 +	ctlr->ch_attach = ata_intel_ch_attach;
 +	ctlr->ch_detach = ata_pci_ch_detach;
 +	ctlr->setmode = ata_intel_sch_setmode;
 +    }
      /* non SATA intel chips goes here */
      else if (ctlr->chip->max_dma < ATA_SA150) {
  	ctlr->channels = ctlr->chip->cfg2;
 @@ -245,7 +253,7 @@ ata_intel_ch_attach(device_t dev)
  		(pci_read_config(device_get_parent(dev), 0x90, 1) & 0x04) == 0)
  		    ch->flags |= ATA_NO_SLAVE;
  	    ch->flags |= ATA_SATA;
 -    } else
 +    } else if (ctlr->chip->chipid != ATA_ISCH)
  	    ch->flags |= ATA_CHECKS_CABLE;
      return 0;
  }
 @@ -360,6 +368,35 @@ ata_intel_new_setmode(device_t dev, int 
  }
  
  static int
 +ata_intel_sch_setmode(device_t dev, int target, int mode)
 +{
 +	device_t parent = device_get_parent(dev);
 +	struct ata_pci_controller *ctlr = device_get_softc(parent);
 +	u_int8_t dtim = 0x80 + (target << 2);
 +	u_int32_t tim = pci_read_config(parent, dtim, 4);
 +	int piomode;
 +
 +	mode = min(mode, ctlr->chip->max_dma);
 +	if (mode >= ATA_UDMA0) {
 +		tim |= (0x1 << 31);
 +		tim &= ~(0x7 << 16);
 +		tim |= ((mode & ATA_MODE_MASK) << 16);
 +		piomode = ATA_PIO4;
 +	} else if (mode >= ATA_WDMA0) {
 +		tim &= ~(0x1 << 31);
 +		tim &= ~(0x3 << 8);
 +		tim |= ((mode & ATA_MODE_MASK) << 8);
 +		piomode = (mode == ATA_WDMA0) ? ATA_PIO0 :
 +		    (mode == ATA_WDMA1) ? ATA_PIO3 : ATA_PIO4;
 +	} else
 +		piomode = mode;
 +	tim &= ~(0x7);
 +	tim |= (piomode & 0x7);
 +	pci_write_config(parent, dtim, tim, 4);
 +	return (mode);
 +}
 +
 +static int
  ata_intel_sata_getrev(device_t dev, int target)
  {
  	struct ata_channel *ch = device_get_softc(dev);
 
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