ClearFog Base -- "status: no carrier" for mvneta1

[Marcin Wojtas]

Hi Glenn
,
śr., 3 paź 2018 o 20:42 glenn <pygr at sonic.net> napisał(a):
>
> Hi Luiz and Marcin,
>
> Thank you for taking an interest in this.
>
> I have looked into the problem further (Google is your friend) and made progress. After modification of the u-boot source before build, the message “status: no carrier” for the second ethernet port no longer appears . The recipe is detailed in the last post in this thread: http://forum.solid-run.com/linux-kernel-and-bootloaders-f34/port-light-is-always-on-does-not-work-t3074.html <http://forum.solid-run.com/linux-kernel-and-bootloaders-f34/port-light-is-always-on-does-not-work-t3074.html>.
>
> It was a surprise to me that modifying u-boot code affected the functioning of the ethernet after control was passed to the OS. Apparently some functionality that is built into u-boot continues to be used by the OS.
>

Good catch. Yes, PHY initialization is supposed to be done in the
bootloader, later the generic ukphy is used for handling the media
status/update (no dedicated driver).

> In addition to the changes in u-boot mentioned above, the armada-388-clearfog-base.dts was edited to allow the serial console to function. The second line in
>
> serial at 12000 {
>                 compatible = "marvell,armada-38x-uart”;
>
> was changed to
>
>                 compatible = "snps,dw-apb-uart”;
>
> I’m thinking the reason that that enabled the serial console is that FreeBSD doesn’t have a driver that responds to "marvell,armada-38x-uart” but does have one that responds to "snps,dw-apb-uart”.

I see it's a fairly fresh change in the mainline Linux, I hope I will
manage to squeeze it to 12.

Thanks,
Marcin

>
> Glenn
>
> > Date: Tue, 2 Oct 2018 11:57:32 -0300
> > From: Luiz Otavio O Souza <lists.br at gmail.com>
> > To: Marcin Wojtas <mw at semihalf.com>
> > Cc: pygr at sonic.net, "freebsd-arm at freebsd.org"
> >       <freebsd-arm at freebsd.org>
> > Subject: Re: ClearFog Base -- "status: no carrier" for mvneta1
> > Message-ID:
> >       <CAB=2f8z0GumRUQB7gbV4wLLVuk6BRf3pu6JSAP3sOhpoXdstsw at mail.gmail.com>
> > Content-Type: text/plain; charset="UTF-8"
> >
> > On Tue, 2 Oct 2018 at 00:43, Marcin Wojtas wrote:
> >>
> >> Hi Glenn,
> >>
> >> I can see, that armada-388-clearfog-base.dts connects eth1 to a PHY via MDIO.
> >> Unfortunately my Clearfog boards have the SFP cage connected only to
> >> the SGMII lanes only (no PHY).
> >>
> >> Can you please try to boot with armada-388-clearfog.dts, where the SFP
> >> cage is configured as the 'fixed-link' and let know?
> >
> > I don't have the Clearfog Base here, but this board has the PHY1 reset
> > connected to GPIO pin 19, you probably want to check this too.
> >
> > Luiz
> >
>
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