SD-Card driver modification for Zynq questions

[Lee D]

Hello,

I have designed a custom Xilinx Zynq board that I am running FreeBSD
10.3 on.

Everything is working well except for my second SD-Card.  The
problem is that I cannot run the card at maximum speed due to a
hardware signal integrity limitation -- which was expected and is
not an issue.

However, it does not seem to be possible to configure the
FreeBSD driver to run at lower than the maximum card speed.  There is
a "max-frequency" parameter that I can set in the DTS file.  But
that parameter specifies the clock frequency of the SDIO controller
in the Zynq part, not the maximum frequency of the card.

If "max-frequency" is changed, then the card ceases to work at all.

So, my questions:

1. Is there a way to set the maximum data rate for card communications?

2. How can I add a parameter to the sdhci/mmc driver so that I can
set the maximum data rate for the card, in the DTS file?

3. Would you please review my hacked-in MMC driver changes, below?

My mmc.c hacks:

In order to limit the maximum card frequency to 20MHz, I tracked down
the place where it was being set in the mmc.c file, and hacked in a
hard-coded limitation.

In src/sys/dev/mmc/mmc.c, in the mmc_calculate_clock() function, right
before the call to mmcbr_set_timing(), I inserted the following code:

  if (device_get_unit(sc->dev) == 1) {
    int max_dtr_limit=20000000;
    if (max_dtr > max_dtr_limit) {
      max_dtr=max_dtr_limit;
    }
    max_timing=0;
  }

The intent is to lower the "max_dtr" variable to 20MHz for device
#1 only.  I am also turning off high speed timing for that device.

This seems to work well.  Is this a viable change for my board?
Is this a good place to insert this limitation?  I don't really
understand the full SDIO/MMC ecosystem so I'm kind of flying
blind here.

Some background:

My DTS file entry looks like this:

  sdhci at 101000 {
    compatible = "xlnx,zy7_sdhci";
    reg = <0x101000 0x1000>;
    interrupts = <0x4F>;
    interrupt-parent = <0x1>;
    max-frequency = <0x5f5e100>; // 100 MHz
  };

The reason that I must  limit the maximum data rate to the card
is because I have the card slot connected to the Zynq using EMIO pins.
Xilinx warns that the maximum card data rates will not work when
using EMIO.

Thank you,

Lee