[Differential] [Commented On] D2377: Introduce ARM GICv3 support

Thu Apr 30 10:05:03 UTC 2015

andrew added inline comments.

INLINE COMMENTS
  sys/arm64/arm64/gic_v3.c:255 Why not do this something like:

    #define GICD_ICENABLER(irq) (0x0180 + (((irq) >> 5) * 4))
    #define GICD_INTR_MASK(irq) (1u << ((irq) % 32))

    gic_r_write(sc, 4, GICD_ICENABLER(irq), GICD_INTR_MASK(irq));
  sys/arm64/arm64/gic_v3.c:259 There should be a macro for PAGE_SIZE_64K
  sys/arm64/arm64/gic_v3.c:300 1 second seems a long time to wait for a register to change.
  sys/arm64/arm64/gic_v3.c:302 This is only needed in one case below.
  sys/arm64/arm64/gic_v3.c:305 (Why the parentheses?)
  sys/arm64/arm64/gic_v3.c:379 This could be
    if (err)
      return (err);
  sys/arm64/arm64/gic_v3.c:388 To make this
    return (0);
  sys/arm64/arm64/gic_v3.c:504 What is special about `PAGE_SIZE_64K * 2`?
  sys/arm64/arm64/gic_v3.c:509 This would normally be
    } while ((typer & GICR_TYPER_LAST) == 0);
  sys/arm64/arm64/gic_v3_reg.h:108 But the comment is `/* EL2 */`, I know el2 is not the name of a register
  sys/arm64/arm64/gic_v3_var.h:45 It looks like there is extra whitespace here

REPOSITORY
  rS FreeBSD src repository

REVISION DETAIL
  https://reviews.freebsd.org/D2377

EMAIL PREFERENCES
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To: zbb, emaste, ian, imp, andrew, brueffer, joel, wblock
Cc: kostikbel, emaste, andrew, imp, freebsd-arm