SDIO driver for OpenRD Ultimate/ Dreamplug

Mattia Rossi mrossi at swin.edu.au
Thu Jan 5 07:25:16 UTC 2012


Hi all,

I've tried to compile and use the SDIO driver found here: 
http://people.freebsd.org/~raj/misc/mv_sdio.c

and here:
http://freebsd.1045724.n5.nabble.com/SD-MMC-driver-for-OpenRD-Board-td4384370.html

but it causes the kernel to panic.
I'm not able to find the cause of the problem.
It would be great if anyone could help me to get this going :-)

Here's the output and board info:

U-Boot 2011.06-02334-g8f495d9-dirty (Mar 28 2011 - 05:21:06)
Marvell-DreamPlug

SoC:   Kirkwood 88F6281_A0
DRAM:  512 MiB
SF: Detected MX25L1606 with page size 256, total 1 MiB
In:    serial
Out:   serial
Err:   serial
Net:   egiga0, egiga1
88E1121 Initialized on egiga0
88E1121 Initialized on egiga1
Hit any key to stop autoboot:  0
Marvell>> printenv
bootdelay=3
baudrate=115200
x_bootcmd_usb=usb start
x_bootargs=console=ttyS0,115200
ethact=egiga0
ethaddr=F0:AD:4E:00:84:C7
eth1addr=F0:AD:4E:00:84:C8
x_bootargs_root=root=/dev/sdc2 rootdelay=10
bootcmd=setenv ethact egiga0; ${x_bootcmd_ethernet}; setenv ethact 
egiga1; ${x_bootcmd_ethernet}; ${x_bootcmd_usb}; ${x_bootcmd_kernel}; go 
0x900000;
x_bootcmd_kernel=fatload usb 0 0x900000 kernel.bin
x_bootcmd_ethernet=ping 192.168.12.81
stdin=serial
stdout=serial
stderr=serial

Environment size: 475/4092 bytes
Marvell>> usb start
(Re)start USB...
USB:   Register 10011 NbrPorts 1
USB EHCI 1.00
scanning bus for devices... 4 USB Device(s) found
        scanning bus for storage devices... 2 Storage Device(s) found
Marvell>> fatload usb 0 0x900000 kernel_sdio.bin
reading kernel_sdio.bin

4710456 bytes read
Marvell>> go 0x900000
## Starting application at 0x00900000 ...
  dtbp = 0xc0d452c0
KDB: debugger backends: ddb
KDB: current backend: ddb
Copyright (c) 1992-2012 The FreeBSD Project.
Copyright (c) 1979, 1980, 1983, 1986, 1988, 1989, 1991, 1992, 1993, 1994
         The Regents of the University of California. All rights reserved.
FreeBSD is a registered trademark of The FreeBSD Foundation.
FreeBSD 9.0-STABLE #38 r229556M: Thu Jan  5 15:49:00 EST 2012
     root at freebsd82-dreamplug:/usr/obj/arm.arm/usr/devel/sys/DREAMPLUG arm
Preloaded elf kernel "elf kernel" at 0xc0da4580.
module mvs already present!
CPU: Feroceon 88FR131 rev 1 (Marvell core)
   DC enabled IC enabled WB enabled EABT branch prediction enabled
   16KB/32B 4-way Instruction cache
   16KB/32B 4-way write-back-locking-C Data cache
real memory  = 536870912 (512 MB)
Physical memory chunk(s):
00000000 - 0x8fffff, 9437184 bytes (2304 pages)
0xe9a000 - 0x1f63bfff, 511320064 bytes (124834 pages)
avail memory = 518488064 (494 MB)
SOC: (0x6281:0x03) Marvell 88F6281 rev A1, TClock 200MHz
wlan: <802.11 Link Layer>
snd_unit_init() u=0x00ff8000 [512] d=0x00007c00 [32] c=0x000003ff [1024]
feeder_register: snd_unit=-1 snd_maxautovchans=16 latency=5 
feeder_rate_min=1 feeder_rate_max=2016000 feeder_rate_round=25
null: <null device, zero device>
crypto: <crypto core>
random: <entropy source, Software, Yarrow>
mem: <memory>
openfirm: <Open Firmware control device>
fdtbus0: <FDT main bus> on motherboard
simplebus0: <Flattened device tree simple bus> on fdtbus0
ic0: <Marvell Integrated Interrupt Controller> mem 0xf1020200-0xf102023b 
on simplebus0
timer0: <Marvell CPU Timer> mem 0xf1020300-0xf102032f irq 1 on simplebus0
Event timer "CPUTimer0" frequency 200000000 Hz quality 1000
Timecounter "CPUTimer1" frequency 200000000 Hz quality 1000
gpio0: <Marvell Integrated GPIO Controller> mem 0xf1010100-0xf101011f 
irq 35,36,37,38,39,40,41 on simplebus0
rtc0: <Marvell Integrated RTC> mem 0xf1010300-0xf1010307 on simplebus0
rtc0: registered as a time-of-day clock (resolution 1000000us, 
adjustment 0.500000000s)
twsi0: <Marvell Integrated I2C Bus Controller> mem 0xf1011000-0xf101101f 
irq 43 on simplebus0
iicbus0: <Philips I2C bus> on twsi0
iic0: <I2C generic I/O> on iicbus0
mge0: <Marvell Gigabit Ethernet controller> mem 0xf1072000-0xf1073fff 
irq 12,13,14,11,46 on simplebus0
mge0: bpf attached
mge0: Ethernet address: f0:ad:4e:00:84:c7
miibus0: <MII bus> on mge0
e1000phy0: <Marvell 88E1116R Gigabit PHY> PHY 0 on miibus0
e1000phy0: OUI 0x000ac2, model 0x0024, rev. 0
e1000phy0:  none, 10baseT, 10baseT-FDX, 100baseTX, 100baseTX-FDX, 
1000baseT, 1000baseT-master, 1000baseT-FDX, 1000baseT-FDX-master, auto
mge1: <Marvell Gigabit Ethernet controller> mem 0xf1076000-0xf1077fff 
irq 16,17,18,15,47 on simplebus0
mge1: bpf attached
mge1: Ethernet address: f0:ad:4e:00:84:c8
miibus1: <MII bus> on mge1
e1000phy1: <Marvell 88E1116R Gigabit PHY> PHY 1 on miibus1
e1000phy1: OUI 0x000ac2, model 0x0024, rev. 0
e1000phy1:  none, 10baseT, 10baseT-FDX, 100baseTX, 100baseTX-FDX, 
1000baseT, 1000baseT-master, 1000baseT-FDX, 1000baseT-FDX-master, auto
uart0: <16550 or compatible> mem 0xf1012000-0xf101201f irq 33 on simplebus0
uart0: fast interrupt
uart0: console (1056,n,8,1)
ehci0: <Marvell Integrated USB 2.0 controller> mem 0xf1050000-0xf1050fff 
irq 48,19 on simplebus0
ehci0: 5.24 GL USB-2 workaround enabled
usbus0: EHCI version 1.0
usbus0: set host controller mode
usbus0: <Marvell Integrated USB 2.0 controller> on ehci0
usbus0: bpf attached
ehci0: usbpf: Attached
sata0: <Marvell Integrated SATA Controller> mem 0xf1080000-0xf1085fff 
irq 21 on simplebus0
ata0: <Marvell Integrated SATA Channel> on sata0
ata0: hard reset ...
ata0: SATA connect timeout status=00000000
ata1: <Marvell Integrated SATA Channel> on sata0
ata1: hard reset ...
ata1: SATA connect timeout status=00000000
sdio0: <Marvell Integrated SDIO Host Controller> mem 
0xf1090000-0xf1090133 irq 28 on simplebus0
mmc0: <MMC/SD bus> on sdio0
cryptosoft0: <software crypto> on motherboard
crypto: assign cryptosoft0 driver id 0, flags 100663296
crypto: cryptosoft0 registers alg 1 flags 0 maxoplen 0
crypto: cryptosoft0 registers alg 2 flags 0 maxoplen 0
crypto: cryptosoft0 registers alg 3 flags 0 maxoplen 0
crypto: cryptosoft0 registers alg 4 flags 0 maxoplen 0
crypto: cryptosoft0 registers alg 5 flags 0 maxoplen 0
crypto: cryptosoft0 registers alg 16 flags 0 maxoplen 0
crypto: cryptosoft0 registers alg 6 flags 0 maxoplen 0
crypto: cryptosoft0 registers alg 7 flags 0 maxoplen 0
crypto: cryptosoft0 registers alg 18 flags 0 maxoplen 0
crypto: cryptosoft0 registers alg 19 flags 0 maxoplen 0
crypto: cryptosoft0 registers alg 20 flags 0 maxoplen 0
crypto: cryptosoft0 registers alg 8 flags 0 maxoplen 0
crypto: cryptosoft0 registers alg 15 flags 0 maxoplen 0
crypto: cryptosoft0 registers alg 9 flags 0 maxoplen 0
crypto: cryptosoft0 registers alg 10 flags 0 maxoplen 0
crypto: cryptosoft0 registers alg 13 flags 0 maxoplen 0
crypto: cryptosoft0 registers alg 14 flags 0 maxoplen 0
crypto: cryptosoft0 registers alg 11 flags 0 maxoplen 0
crypto: cryptosoft0 registers alg 22 flags 0 maxoplen 0
crypto: cryptosoft0 registers alg 21 flags 0 maxoplen 0
crypto: cryptosoft0 registers alg 17 flags 0 maxoplen 0
procfs registered
Timecounters tick every 1.000 msec
vlan: initialized, using hash tables with chaining
lo0: bpf attached
ata0: Identifying devices: 00000000
ata0: New devices: 00000000
ata1: Identifying devices: 00000000
ata1: New devices: 00000000
mmc0: Probing bus
mv_gpio_intr_handler(): No handler for Pin 34
sdio0: Card inserted
sdio0: Previous removal has not been detected properly
mmc0: detached
usbus0: 480Mbps High Speed USB v2.0
ugen0.1: <Marvell> at usbus0
uhub0: <Marvell EHCI root HUB, class 9/0, rev 2.00/1.00, addr 1> on usbus0
mmc0: <MMC/SD bus> on sdio0

vm_fault(0xc0d824ec, 0, 1, 0) -> 1
Fatal kernel mode data abort: 'Translation Fault (S)'
trapframe: 0xd0a0bd18
FSR=00000005, FAR=00000030, spsr=a0000013
r0 =c0d91db4, r1 =c0d65224, r2 =c36542e0, r3 =00000030
r4 =c37d9698, r5 =c37d9680, r6 =c38a0100, r7 =c0a85640
r8 =c38a0100, r9 =c0cbac5c, r10=00000000, r11=d0a0bd78
r12=60000013, ssp=d0a0bd64, slr=00000000, pc =c0a81eec

[ thread pid 11 tid 100018 ]
Stopped at      config_intrhook_establish+0x48: ldr     r3, [r3]
db> bt
Tracing pid 11 tid 100018 td 0xc36542e0
config_intrhook_establish() at config_intrhook_establish+0x14
scp=0xc0a81eb8 rlv=0xc096a088 (ukphy_status+0xa2c)
         rsp=0xd0a0bd7c rfp=0xd0a0bd94
         r5=0xc37d9680 r4=0xc37d9684
ukphy_status() at ukphy_status+0x9ec
scp=0xc096a048 rlv=0xc0a87204 (device_attach+0x70)
         rsp=0xd0a0bd98 rfp=0xd0a0bdd8
         r6=0xc38a0150 r5=0xc370bb13
         r4=0xc3647280
device_attach() at device_attach+0x10
scp=0xc0a871a4 rlv=0xc0c846f8 (cpu_initclocks+0x1558)
         rsp=0xd0a0bddc rfp=0xd0a0bdf4
         r10=0xc0a3eb80 r9=0x00000000
         r8=0xc36542e0 r7=0xc3638e18 r6=0xc37d8784 r5=0x00000000
         r4=0xc37d8700
cpu_initclocks() at cpu_initclocks+0x147c
scp=0xc0c8461c rlv=0xc0a98a28 (taskqueue_drain+0x180)
         rsp=0xd0a0bdf8 rfp=0xd0a0be24
         r6=0x00000001 r5=0xc3638e00
         r4=0xc37d8754
taskqueue_drain() at taskqueue_drain+0x12c
scp=0xc0a989d4 rlv=0xc0a98b8c (taskqueue_run+0x7c)
         rsp=0xd0a0be28 rfp=0xd0a0be3c
         r7=0xc3615900 r6=0x00000000
         r5=0xc3638e18 r4=0xc3638e00
taskqueue_run() at taskqueue_run+0x10
scp=0xc0a98b20 rlv=0xc0a3dfe0 (intr_event_execute_handlers+0x70)
         rsp=0xd0a0be40 rfp=0xd0a0be5c
         r5=0x00000000 r4=0xc3638dc0
intr_event_execute_handlers() at intr_event_execute_handlers+0x10
scp=0xc0a3df80 rlv=0xc0a3ebec (intr_event_add_handler+0x3bc)
         rsp=0xd0a0be60 rfp=0xd0a0be80
         r7=0xc0da7b00 r6=0xc35db888
         r5=0xc35b82c0 r4=0xc3615900
intr_event_add_handler() at intr_event_add_handler+0x360
scp=0xc0a3eb90 rlv=0xc0a3b6b4 (fork_exit+0x64)
         rsp=0xd0a0be84 rfp=0xd0a0bea8
         r8=0xc35b82c0 r7=0xd0a0beac
         r6=0xc35db888 r5=0xc0da7b00 r4=0xc36542e0
fork_exit() at fork_exit+0x10
scp=0xc0a3b660 rlv=0xc0c75d90 (fork_trampoline+0x14)
         rsp=0xd0a0beac rfp=0x00000000
         r10=0x00000000 r8=0x00000000
         r7=0xc0c74410 r6=0xd0a08eac r5=0xc35b82c0 r4=0xc0a3eb80


And here's the dts file I use. It's pretty much an OpenRD Ultimate (CL) 
dts file without the pci bit, which the dreamplug doesn't have (I didn't 
even change the model name :-)):

/dts-v1/;

/ {
         model = "mrvl,OpenRD-CL";
         compatible = "OpenRD-CL";
         #address-cells = <1>;
         #size-cells = <1>;

         aliases {
                 ethernet0 = &enet0;
                 ethernet1 = &enet1;
                 mpp = &MPP;
                 /*pci0 = &pci0;*/
                 serial0 = &serial0;
                 /*serial1 = &serial1;*/
                 soc = &SOC;
                 sram = &SRAM;
         };

         cpus {
                 #address-cells = <1>;
                 #size-cells = <0>;

                 cpu at 0 {
                         device_type = "cpu";
                         compatible = "ARM,88FR131";
                         reg = <0x0>;
                         d-cache-line-size = <32>;       // 32 bytes
                         i-cache-line-size = <32>;       // 32 bytes
                         d-cache-size = <0x4000>;        // L1, 16K
                         i-cache-size = <0x4000>;        // L1, 16K
                         timebase-frequency = <0>;
                         bus-frequency = <0>;
                         clock-frequency = <0>;
                 };
         };

         memory {
                 device_type = "memory";
                 reg = <0x0 0x20000000>;         // 512M at 0x0
         };

         localbus at f1000000 {
                 #address-cells = <2>;
                 #size-cells = <1>;
                 compatible = "mrvl,lbc";

                 /* This reflects CPU decode windows setup. */
                 ranges = <0x0 0x0f 0xf9300000 0x00100000
                           0x1 0x1e 0xfa000000 0x00100000
                           0x2 0x1d 0xfa100000 0x02000000
                           0x3 0x1b 0xfc100000 0x00000400>;

                 nor at 0,0 {
                         #address-cells = <1>;
                         #size-cells = <1>;
                         compatible = "cfi-flash";
                         reg = <0x0 0x0 0x00100000>;
                         bank-width = <2>;
                         device-width = <1>;
                 };

                 led at 1,0 {
                         #address-cells = <1>;
                         #size-cells = <1>;
                         compatible = "led";
                         reg = <0x1 0x0 0x00100000>;
                 };

                 nor at 2,0 {
                         #address-cells = <1>;
                         #size-cells = <1>;
                         compatible = "cfi-flash";
                         reg = <0x2 0x0 0x02000000>;
                         bank-width = <2>;
                         device-width = <1>;
                 };

                 nand at 3,0 {
                         #address-cells = <1>;
                         #size-cells = <1>;
                         reg = <0x3 0x0 0x00100000>;
                         bank-width = <2>;
                         device-width = <1>;
                 };
         };

         SOC: soc88f6281 at f1000000 {
                 #address-cells = <1>;
                 #size-cells = <1>;
                 compatible = "simple-bus";
                 ranges = <0x0 0xf1000000 0x00100000>;
                 bus-frequency = <0>;

                 PIC: pic at 20200 {
                         interrupt-controller;
                         #address-cells = <0>;
                         #interrupt-cells = <1>;
                         reg = <0x20200 0x3c>;
                         compatible = "mrvl,pic";
                 };

                 timer at 20300 {
                         compatible = "mrvl,timer";
                         reg = <0x20300 0x30>;
                         interrupts = <1>;
                         interrupt-parent = <&PIC>;
                         mrvl,has-wdt;
                 };

                 MPP: mpp at 10000 {
                         #pin-cells = <2>;
                         compatible = "mrvl,mpp";
                         reg = <0x10000 0x34>;
                         pin-count = <50>;
                         pin-map = <
                                 0  1            /* MPP[0]:  NF_IO[2] */
                                 1  1            /* MPP[1]:  NF_IO[3] */
                                 2  1            /* MPP[2]:  NF_IO[4] */
                                 3  1            /* MPP[3]:  NF_IO[5] */
                                 4  1            /* MPP[4]:  NF_IO[6] */
                                 5  1            /* MPP[5]:  NF_IO[7] */
                                 6  1            /* MPP[6]:  SYSRST_OUTn */
                                 7  0            /* MPP[7]:  GPO[7] */
                                 8  1            /* MPP[8]:  TW_SDA */
                                 9  1            /* MPP[9]:  TW_SCK */
                                 10 3            /* MPP[10]: UA0_TXD */
                                 11 3            /* MPP[11]: UA0_RXD */
                                 12 1            /* MPP[12]: SD_CLK */
                                 13 1            /* MPP[13]: SD_CMD */
                                 14 1            /* MPP[14]: SD_D[0] */
                                 15 1            /* MPP[15]: SD_D[1] */
                                 16 1            /* MPP[16]: SD_D[2] */
                                 17 1            /* MPP[17]: SD_D[3] */
                                 18 1            /* MPP[18]: NF_IO[0] */
                                 19 1            /* MPP[19]: NF_IO[1] */
                                 20 3            /* MPP[20]: GE1[0] */
                                 21 3            /* MPP[21]: GE1[1] */
                                 22 3            /* MPP[22]: GE1[2] */
                                 23 3            /* MPP[23]: GE1[3] */
                                 24 3            /* MPP[24]: GE1[4] */
                                 25 3            /* MPP[25]: GE1[5] */
                                 26 3            /* MPP[26]: GE1[6] */
                                 27 3            /* MPP[27]: GE1[7] */
                                 28 0            /* MPP[28]: GPIO[28] */
                                 29 0            /* MPP[29]: GPIO[29] */
                                 30 3            /* MPP[30]: GE1[10] */
                                 31 3            /* MPP[31]: GE1[11] */
                                 32 3            /* MPP[32]: GE1[12] */
                                 33 3            /* MPP[33]: GE1[13] */
                                 34 0            /* MPP[34]: GPIO[34] */
                                 35 2            /* MPP[35]: 
TDM_CH0_TX_QL */
                                 36 2            /* MPP[36]: TDM_SPI_CS1 */
                                 37 2            /* MPP[37]: 
TDM_CH2_TX_QL */
                                 38 2            /* MPP[38]: 
TDM_CH2_RX_QL */
                                 39 4            /* MPP[39]: AU_I2SBCLK */
                                 40 4            /* MPP[40]: AU_I2SDO */
                                 41 4            /* MPP[41]: AU_I2SLRCLK */
                                 42 4            /* MPP[42]: AU_I2SMCLK */
                                 43 4            /* MPP[43]: AU_I2SDI */
                                 44 4            /* MPP[44]: AU_EXTCLK */
                                 45 2            /* MPP[45]: TDM_PCLK */
                                 46 2            /* MPP[46]: TDM_FS */
                                 47 2            /* MPP[47]: TDM_DRX */
                                 48 2            /* MPP[48]: TDM_DTX */
                                 49 2>;          /* MPP[49]: 
TDM_CH0_TX_QL */
                 };

                 GPIO: gpio at 10100 {
                         #gpio-cells = <3>;
                         compatible = "mrvl,gpio";
                         reg = <0x10100 0x20>;
                         gpio-controller = <1>;
                         pin-count = <50>;
                         interrupts = <35 36 37 38 39 40 41>;
                         interrupt-parent = <&PIC>;




                 };

                 rtc at 10300 {
                         compatible = "mrvl,rtc";
                         reg = <0x10300 0x08>;
                 };

                 twsi at 11000 {
                         #address-cells = <1>;
                         #size-cells = <0>;
                         compatible = "mrvl,twsi";
                         reg = <0x11000 0x20>;
                         interrupts = <43>;
                         interrupt-parent = <&PIC>;
                 };

                 mdio0: mdio at 72000 {
                            device_type = "mdio";
                            compatible = "mrvl,mdio";
                            reg = <72000 20>;
                            #address-cells = <1>;
                            #size-cells = <0>;

                            phy0: ethernet-phy at 0 {
                                 reg = <0>;
                                 device_type = "ethernet-phy";
                            };


                 };

                 mdio1: mdio at 76000 {
                            device_type = "mdio";
                            compatible = "mrvl,mdio";
                            reg = <76000 20>;
                            #address-cells = <1>;
                            #size-cells = <0>;

                            phy1: ethernet-phy at 0 {
                                 reg = <1>;
                                 device_type = "ethernet-phy";
                            };


                 };

                 enet0: ethernet at 72000 {
                         #address-cells = <1>;
                         #size-cells = <1>;
                         model = "V2";
                         compatible = "mrvl,ge";
                         reg = <0x72000 0x2000>;
                         ranges = <0x0 0x72000 0x2000>;
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <12 13 14 11 46>;
                         interrupt-parent = <&PIC>;
                         phy-handle = <&phy0>;

                 };

                 enet1: ethernet at 76000 {
                         #address-cells = <1>;
                         #size-cells = <1>;
                         model = "V2";
                         compatible = "mrvl,ge";
                         reg = <0x76000 0x2000>;
                         ranges = <0x0 0x76000 0x2000>;
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <16 17 18 15 47>;
                         interrupt-parent = <&PIC>;
                         phy-handle = <&phy1>;
/*
                         mdio at 1 {
                                 #address-cells = <1>;
                                 #size-cells = <0>;
                                 compatible = "mrvl,mdio";
                         };
*/
                 };

                 serial0: serial at 12000 {
                         compatible = "ns16550";
                         reg = <0x12000 0x20>;
                         reg-shift = <2>;
                         clock-frequency = <0>;
                         interrupts = <33>;
                         interrupt-parent = <&PIC>;
                 };
/*
                 serial1: serial at 12100 {
                         compatible = "ns16550";
                         reg = <0x12100 0x20>;
                         reg-shift = <2>;
                         clock-frequency = <0>;
                         interrupts = <34>;
                         interrupt-parent = <&PIC>;
                 };
*/


                 crypto at 30000 {
                         compatible = "mrvl,cesa";
                         reg = <0x30000 0x10000>;
                         interrupts = <22>;
                         interrupt-parent = <&PIC>;
                 };

                 usb at 50000 {
                         compatible = "mrvl,usb-ehci", "usb-ehci";
                         reg = <0x50000 0x1000>;
                         interrupts = <48 19>;
                         interrupt-parent = <&PIC>;
                 };

                 xor at 60000 {
                         compatible = "mrvl,xor";
                         reg = <0x60000 0x1000>;
                         interrupts = <5 6 7 8>;
                         interrupt-parent = <&PIC>;
                 };

                 sata at 80000 {
                         compatible = "mrvl,sata";
                         reg = <0x80000 0x6000>;
                         interrupts = <21>;
                         interrupt-parent = <&PIC>;

                         gpios = <&GPIO 29 1 0x00030000   /* GPIO[29]: 
IN_POL_LOW, IRQ (edge) */
                                  &GPIO 34 2 0x00000000>; /* GPIO[34]: 
OUT */
                 };
                 sdio at 90000 {
                         compatible = "mrvl,sdio";
                         reg = <0x90000 0x134>;
                         interrupts = <28>;
                         interrupt-parent = <&PIC>;

                         gpios = <&GPIO 29 1 0x00030000   /* GPIO[29]: 
IN_POL_LOW, IRQ (edge) */
                                  &GPIO 34 2 0x00000000>; /* GPIO[34]: 
OUT */

                 };
         };

         SRAM: sram at fd000000 {
                 compatible = "mrvl,cesa-sram";
                 reg = <0xfd000000 0x00100000>;
         };

         chosen {
                 stdin  = "serial0";
                 stdout = "serial0";
         };

/* PCI does not work
         pci0: pcie at f1040000 {
                 compatible = "mrvl,pcie";
                 device_type = "pci";
                 #interrupt-cells = <1>;
                 #size-cells = <2>;
                 #address-cells = <3>;
                 reg = <0xf1040000 0x2000>;
                 bus-range = <0 255>;
                 ranges = <0x02000000 0x0 0xf4000000 0xf4000000 0x0 
0x04000000
                           0x01000000 0x0 0x00000000 0xf1100000 0x0 
0x00100000>;
                 clock-frequency = <33333333>;
                 interrupt-parent = <&PIC>;
                 interrupts = <44>;
                 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
                 interrupt-map = <

                         0x0800 0x0 0x0 0x1 &PIC 0x9
                         0x0800 0x0 0x0 0x2 &PIC 0x9
                         0x0800 0x0 0x0 0x3 &PIC 0x9
                         0x0800 0x0 0x0 0x4 &PIC 0x9
                         >;
                 pcie at 0 {
                         reg = <0x0 0x0 0x0 0x0 0x0>;
                         #size-cells = <2>;
                         #address-cells = <3>;
                         device_type = "pci";
                         ranges = <0x02000000 0x0 0xf4000000
                                   0x02000000 0x0 0xf4000000
                                   0x0 0x04040000

                                   0x01000000 0x0 0x0
                                   0x01000000 0x0 0x0
                                   0x0 0x00100000>;
                 };
         };
*/
};





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