Where do MSI quirks belong? [patch]

[John Baldwin]

On Sunday 10 December 2006 19:29, John Polstra wrote:
> 
> On Nov 20, 2006, at 9:42 AM, John Baldwin wrote:
> 
> > It's going to be a function of the chipset, as something in the  
> > chipset
> > (presumably a Host -> PCI bridge) has to listen for writes to  
> > 0xfeeXXXXXX and
> > convert them into APIC messages.  There are two ways I planned on  
> > doing this:
> >
> > 1) Allow PCI-PCI bridges to be blacklisted, and the pcib_alloc_msi 
> > [x]()
> > methods would compare the bridge's device id against a blacklist.   
> > This can
> > matter if you have virtual PCI-PCI bridges that really a HT -> PCI  
> > bridge or
> > the like.
> >
> > 2) Blacklist chipsets in the x86 MD code based on the device ID of  
> > the first
> > Host -> PCI bridge at device 0.0.0.
> 
> I have implemented both of these checks, except that I put #2 into  
> the MI code since I couldn't find any reason to make it x86- 
> specific.  Here's the patch.  Does it look OK to you?  It works fine  
> here.

Hmm.  I did blacklist stuff several weeks ago but haven't had time to
test it or post it yet. :(  I do think I like your approach a bit
better though.  What I had so far is here:

http://www.FreeBSD.org/~jhb/patches/msi_blacklist.patch

I'm not sure if it's worth blacklisting MSI separate from MSI-X as that
only makes a difference at the device level (chipsets just get a single
memory write per interrupt either way, they can't tell MSI from MSI-X).

-- 
John Baldwin