Page fault on Tyan K8S Pro (S2882) board

Astrodog astrodog at
Fri Nov 26 21:01:52 PST 2004

Mark Bojara wrote:

>Hello All,
>For the last 3 weeks I have been trying to get this motherboard to run with 5.3-STABLE. Basically what happens is if I run the box at 100% utilization the server is stable but as soon as I let it idle and do basic Apache webserver tests and other small apps an hour after that the server will crash. I have tried enabling debug support in my kernel to supply the mailing list with a debug of the error but it seems that when it page faults the entire machine locks up. Please let me know if you require any additional information.
>2 x AMD Opteron 242 CPU's
>1 x 1GB Corsair PC2700 Memory Module
>Bios Version 2.03E
>Fatal trap 12: page fault while in kernel mode
>cpu id =1; apic id=01
>fault virtual address   = 0x18
>fault code                   = supervisor read,page not present
>Instruction pointer      = 0x8:0xffffffffa25bc800
>frame pointer             = 0x10:0x0
>code segment           = base 0x0, limit 0xfffff, type 0x1b
>                                  = DPL 0, pres 1, long 1, olef32 0, gran 1
>trap number               = 12
>panic: page fault
>cpuid = 1
>boot() called on cpu#1
>uptime 10h3m45s
>I have also tried disabling ACPI to see if thats the problem but the server still crashes
>Thanks Alot
>Mark Bojara
>AboutIT Online - 012-460-1000
>freebsd-amd64 at mailing list
>To unsubscribe, send any mail to "freebsd-amd64-unsubscribe at"
Couple things. We use this setup pretty often, but there are a couple 
things to keep in mind.
#1. on the 4 bank Tyan Tiger boards (K8W), you have one CPU acting as a 
memory controller for the other. The second CPU makes use of AMD's 
Hypertransport system for this access.

#2. I'd put $50 on the problem going away with SMP disabled, but thats a 
whole new can of worms.

#3. AMD Opteron processors expect, and for all intents and purposes, 
require ECC Registered Memory. Furthermore, they expect the memory to 
operate in a dual channel mode. Running 1 DIMM in this kind of setup is 
shooting yourself in the foot. If CPU #1 requests something through CPU 
#0, and we're using 1 bank of memory the whole setup..... performance is 
gonna be crap. Both CPUs will be blocked from processing instructions 
while the request is fulfilled. There are known performance issues with 
the 4+0 memory config... but they're still good if you use 2 or 4 DIMMs.

It boils down to adding another DIMM, and seeing if that solves your 
problem. I would strongly suspect that it will quite easily.

--- Harrison Grundy

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