git: 06a3fd0e5c86 - main - mlx5: Fix PPLM register mapping

[Konstantin Belousov]

The branch main has been updated by kib:

URL: https://cgit.FreeBSD.org/src/commit/?id=06a3fd0e5c86ae4f00075c1571cf4e183e28b4c4

commit 06a3fd0e5c86ae4f00075c1571cf4e183e28b4c4
Author:     Konstantin Belousov <konstantinb at nvidia.com>
AuthorDate: 2021-04-21 14:12:53 +0000
Commit:     Konstantin Belousov <kib at FreeBSD.org>
CommitDate: 2021-07-12 09:34:40 +0000

    mlx5: Fix PPLM register mapping
    
    Import Linux commit ce28f0fd670ddffcd564ce7119bdefbaf08f02d3:
    Add reserved mapping to cover all the register in order to avoid
    setting arbitrary values to newer FW which implements the reserved
    fields.
    
    Taken from:     https://patches.linaro.org/patch/417255/
    Reviewed by:    hselasky
    Sponsored by:   Mellanox Technologies // NVIDIA Networking
    MFC after:      1 week
---
 sys/dev/mlx5/mlx5_ifc.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/sys/dev/mlx5/mlx5_ifc.h b/sys/dev/mlx5/mlx5_ifc.h
index f748ec876ef4..81e91e180b8c 100644
--- a/sys/dev/mlx5/mlx5_ifc.h
+++ b/sys/dev/mlx5/mlx5_ifc.h
@@ -8139,7 +8139,7 @@ struct mlx5_ifc_pplm_reg_bits {
 	u8	   fec_override_admin_100g_2x[0x10];
 	u8	   fec_override_admin_50g_1x[0x10];
 
-	u8	   reserved_at_140[0xC0];
+	u8	   reserved_at_140[0x140];
 };
 
 struct mlx5_ifc_ppll_reg_bits {