git: b1277d42d718 - main - mlx5en: add ASCII art providing an overview of flow tables organization

[Konstantin Belousov]

The branch main has been updated by kib:

URL: https://cgit.FreeBSD.org/src/commit/?id=b1277d42d718cd42d04d39fa2d61873655e909b3

commit b1277d42d718cd42d04d39fa2d61873655e909b3
Author:     Konstantin Belousov <konstantinb at nvidia.com>
AuthorDate: 2021-04-26 22:38:46 +0000
Commit:     Konstantin Belousov <kib at FreeBSD.org>
CommitDate: 2021-07-12 09:34:39 +0000

    mlx5en: add ASCII art providing an overview of flow tables organization
    
    Reviewed by:    hselasky
    Sponsored by:   Mellanox Technologies/NVidia Networking
    MFC after:      1 week
---
 sys/dev/mlx5/mlx5_en/mlx5_en_flow_table.c | 29 +++++++++++++++++++++++++++++
 1 file changed, 29 insertions(+)

diff --git a/sys/dev/mlx5/mlx5_en/mlx5_en_flow_table.c b/sys/dev/mlx5/mlx5_en/mlx5_en_flow_table.c
index cdfe19d910d1..54fbe8e057cc 100644
--- a/sys/dev/mlx5/mlx5_en/mlx5_en_flow_table.c
+++ b/sys/dev/mlx5/mlx5_en/mlx5_en_flow_table.c
@@ -31,6 +31,35 @@
 #include <dev/mlx5/fs.h>
 #include <dev/mlx5/mpfs.h>
 
+/*
+ * The flow tables with rules define the packet processing on receive.
+ * Currently, the following structure is set up to handle different offloads
+ * like VLAN decapsulation, packet classification, RSS hashing, VxLAN checksum
+ * offloading:
+ *
+ *
+ *   +=========+       +=========+	+=================+
+ *   |VLAN ft: |       |VxLAN	 |	|VxLAN Main    	  |
+ *   |CTAG/STAG|------>|      VNI|----->|Inner Proto Match|=====> Inner TIR n
+ *   |VID/noVID|/      |Catch-all|\	|		  |
+ *   +=========+       +=========+|	+=================+
+ *     	       	       	     	  |
+ *			     	  |
+ *			     	  |
+ *			     	  v
+ *		       	+=================+
+ *			|Main             |
+ *			|Outer Proto Match|=====> TIR n
+ *			|	          |
+ *     	       	       	+=================+
+ *
+ * The path through flow rules directs each packet into an appropriate TIR,
+ * according to the:
+ * - VLAN encapsulation
+ * - Outer protocol
+ * - Presence of inner protocol
+ */
+
 #define MLX5_SET_CFG(p, f, v) MLX5_SET(create_flow_group_in, p, f, v)
 
 enum {