Problem w/ SMP and aic7xxx

[Mike Bilow]

Joseph T. Trudeau wrote in a message to Mike Bilow:

 JTT> Hardware:
 JTT>   HP Netserver LH Pro
 JTT>   128 Meg RAM (2 - 64 Meg DIMM)
 JTT>   2 - Pentium Pro 200's
 JTT>   2 - aic7880 on-board (PCI):  They share interrupt 11 and 
 JTT> cannot be changed to have unique interrupts for each (The EISA
 JTT> config utility promptly configures both adapters to the same 
 JTT> interrupt when either is changed).

The HP Netserver LH Pro does have this IRQ problem, but using a 2.2 kernel
which supports IO-APIC should handle this, I would think.  It does cause
problems on the 2.0 kernels.

 JTT> NOTE:  I noticed that the 1st CPU has 512K cache while the
 JTT> 2nd CPU only has 256K cache.

That is ABSOLUTELY NOT a supported configuration in the HP Netserver.  In fact,
the CPUs must have exactly identical steppings to work stably; check
/proc/cpuinfo to see what you have.  It would also be worth pulling the CPUs
and doing a physical inspection to make sure they are rated for the proper
speed, since obviously a mismatched set cannot have been factory installed.

If you run dual PPro CPUs with different cache sizes, the cache coherency is
going to fall apart when you run DMA devices such as the SCSI controller.  My
suggestion is to test by building a 2.2 kernel for non-SMP and running with the
second CPU physically removed: if that works stably, you have diagnosed it.
 
-- Mike




To Unsubscribe: send mail to majordomo at FreeBSD.org
with "unsubscribe aic7xxx" in the body of the message