git: 39d6e2226484 - main - arm64: Fix and rename midr_check_var_part_range()
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Date: Mon, 12 Oct 2026 18:38:28 UTC
The branch main has been updated by alc:
URL: https://cgit.FreeBSD.org/src/commit/?id=39d6e2226484ca434c7d980eda4aa19ed0d62c9e
commit 39d6e2226484ca434c7d980eda4aa19ed0d62c9e
Author: Alan Cox <alc@FreeBSD.org>
AuthorDate: 2026-10-11 18:13:25 +0000
Commit: Alan Cox <alc@FreeBSD.org>
CommitDate: 2026-10-12 18:36:33 +0000
arm64: Fix and rename midr_check_var_part_range()
At the lowest and highest variants in the specified range,
midr_check_var_part_range() was comparing the part number, rather than
the revision, against the bounds. In other words, the "Y" in "rXpY"
should be compared to CPU_REV() instead of CPU_PART(). Apply this
correction, and rename the function to midr_check_var_rev_range() to
better reflect the field that we are checking.
Reported by: Claude Code (Opus 5.5)
Reviewed by: andrew
MFC after: 1 week
Differential Revision: https://reviews.freebsd.org/D60624
---
sys/arm64/arm64/identcpu.c | 2 +-
sys/arm64/arm64/pmap.c | 4 ++--
sys/arm64/include/cpu.h | 17 +++++++++++------
3 files changed, 14 insertions(+), 9 deletions(-)
diff --git a/sys/arm64/arm64/identcpu.c b/sys/arm64/arm64/identcpu.c
index d5c38d9b7dd6..e75f63693a57 100644
--- a/sys/arm64/arm64/identcpu.c
+++ b/sys/arm64/arm64/identcpu.c
@@ -2287,7 +2287,7 @@ user_ctr_has_neoverse_n1_1542419(uint32_t midr, uint64_t ctr)
* Present in r3p0 - r4p0
* Fixed in r4p1
*/
- return (midr_check_var_part_range(midr, CPU_IMPL_ARM,
+ return (midr_check_var_rev_range(midr, CPU_IMPL_ARM,
CPU_PART_NEOVERSE_N1, 3, 0, 4, 0) && CTR_DIC_VAL(ctr) != 0);
}
diff --git a/sys/arm64/arm64/pmap.c b/sys/arm64/arm64/pmap.c
index d20c08412c71..f27ddd379976 100644
--- a/sys/arm64/arm64/pmap.c
+++ b/sys/arm64/arm64/pmap.c
@@ -1798,7 +1798,7 @@ pmap_dbm_has_errata(const struct cpu_feat *feat __unused, u_int midr,
}
/* Disable on Cortex-A510 for erratum 2051678 - r0p0 to r0p2 */
- if (midr_check_var_part_range(midr, CPU_IMPL_ARM, CPU_PART_CORTEX_A510,
+ if (midr_check_var_rev_range(midr, CPU_IMPL_ARM, CPU_PART_CORTEX_A510,
0, 0, 0, 2)) {
static u_int errata_id = 2051678;
@@ -1904,7 +1904,7 @@ pmap_multiple_tlbi_check(const struct cpu_feat *feat __unused, u_int midr)
* Present in r0p0 - r1p1
* Fixed in r1p2
*/
- if (midr_check_var_part_range(midr, CPU_IMPL_ARM, CPU_PART_CORTEX_A510,
+ if (midr_check_var_rev_range(midr, CPU_IMPL_ARM, CPU_PART_CORTEX_A510,
0, 0, 1, 1))
return (FEAT_DEFAULT_DISABLE);
diff --git a/sys/arm64/include/cpu.h b/sys/arm64/include/cpu.h
index bdbc601edd26..4a937d9626a1 100644
--- a/sys/arm64/include/cpu.h
+++ b/sys/arm64/include/cpu.h
@@ -198,9 +198,14 @@
((mask) & CPU_ID_RAW((impl), (part), (var), (rev))))
#if !defined(__ASSEMBLER__)
+/*
+ * Check whether midr identifies the given implementer and part at a product
+ * revision rXpY from r(var_low)p(rev_low) to r(var_high)p(rev_high)
+ * inclusive. X is MIDR_EL1.Variant, and Y is MIDR_EL1.Revision.
+ */
static inline bool
-midr_check_var_part_range(u_int midr, u_int impl, u_int part, u_int var_low,
- u_int part_low, u_int var_high, u_int part_high)
+midr_check_var_rev_range(u_int midr, u_int impl, u_int part, u_int var_low,
+ u_int rev_low, u_int var_high, u_int rev_high)
{
/* Check for the correct part */
if (CPU_IMPL(midr) != impl || CPU_PART(midr) != part)
@@ -210,12 +215,12 @@ midr_check_var_part_range(u_int midr, u_int impl, u_int part, u_int var_low,
if (CPU_VAR(midr) < var_low || CPU_VAR(midr) > var_high)
return (false);
- /* If the variant is the low value, check if the part is high enough */
- if (CPU_VAR(midr) == var_low && CPU_PART(midr) < part_low)
+ /* If the variant is var_low, check if the revision is high enough */
+ if (CPU_VAR(midr) == var_low && CPU_REV(midr) < rev_low)
return (false);
- /* If the variant is the high value, check if the part is low enough */
- if (CPU_VAR(midr) == var_high && CPU_PART(midr) > part_high)
+ /* If the variant is var_high, check if the revision is low enough */
+ if (CPU_VAR(midr) == var_high && CPU_REV(midr) > rev_high)
return (false);
return (true);