From nobody Mon Oct 12 18:38:28 2026 X-Original-To: dev-commits-src-main@mlmmj.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mlmmj.nyi.freebsd.org (Postfix) with ESMTP id 4j3R7G27SDz6k0yS for ; Mon, 12 Oct 2026 18:38:34 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange x25519 server-signature RSA-PSS (4096 bits) server-digest SHA256 client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "YR2" (not verified)) by mx1.freebsd.org (Postfix) with ESMTPS id 4j3R7G1WZjz4gnH for ; Mon, 12 Oct 2026 18:38:34 +0000 (UTC) (envelope-from git@FreeBSD.org) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1791830314; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=1g8Q//+JpAjIZBE4G6u1fiCCU0aNBlCbblYePfjK1AM=; b=K0lTaAj34j6Ej81hRjqHFcDM9jqIiM4+PMjUCovBZJEYq+RQilY/HWZYi70NSayOE44/83 70akr+YeiXuxtPh3IqDdCsiWX/7bFD+wUhSs7PTSGm9B6mnsXWHGNa9hSuXEhfSyCfC5Z1 Gmci7lfcP1ZBGEJ1EwDtyJf3QCsQ1SGrfijeMwOpuKxJCgTs+do1tkC+S3B8CveMWiKW5A p6SlvGIToz/MFRfqh18ICahgh6Tf8hAH+g5XJQAnMlhgYL56m9jgtB92H2BWWofmqrTZky vsEcjqaPo+sLLCruXZM7+5G+urPJwQV6uIKxB660IWMkzITZRfeDMS8b5GgYuw== ARC-Seal: i=1; a=rsa-sha256; d=freebsd.org; s=dkim; cv=none; t=1791830314; b=cIg04xEOSfVppg/YDgyUahBqmIYPXHbFHIihKPLaYReyMS0Tv2DU/to6s5IJcMbagldDuh I4LHc9S42S043Dqn3CdVpDpYO/BSj1OsgqltjTyzd6Cg0OG5n3e27oLcZNNtu7aWapW5Q0 XCN7u8P/ibKxCuUKZSS+391j2nlmCSFKWI/MxCNiSj0GFIlielOK65sUDFXQeD7HtIYfqz UcAKht9jyySSp+bXEPea/1Uo+CcLzhE7jjhaDT/XVaZ4KqofevMkAevgOOCfwPWpPqFTWT zYzKqA/IQSJszvN6MIEoKqzSZGoALKJS1QpGRDRMIpA0HHBLYZ9ARxLfl4208g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1791830314; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=1g8Q//+JpAjIZBE4G6u1fiCCU0aNBlCbblYePfjK1AM=; b=e3KVQ8/h+3liVf6L1RXRAsjI55vRdQxnbjGHi/2joBo0UtgvGLlnSYJSEViTYsjS1hw1og qdq/Czv0t33twFpSWgD0dI7lwPezv+BML5ykS2Ro+PgAFa3teTwev1IBh3YDTnBOrwgzzc zuGkE+Lncz8otgO4pSbCLxvFJyWvFTCf711igNXcSQ03efwgzoNM15vVO1y3o817pnwdCi 6nh0aeSiW8wkCyLoB4dxcVRrN21JZ61HjM+yGj5kdUhVmeNwDXM5DOv3jaKIvm0Z0cLElX gWA0fuYw5pOsEViccffciHPMSGGnfbCmU8tzLLFpxa8XZScmroNM+z+svob1Tw== ARC-Authentication-Results: i=1; mx1.freebsd.org; none Received: from gitrepo.freebsd.org (gitrepo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:5]) by mxrelay.nyi.freebsd.org (Postfix) with ESMTP id 4j3R7G0H0rzhRm for ; Mon, 12 Oct 2026 18:38:34 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from git (uid 1279) (envelope-from git@FreeBSD.org) id 39137 by gitrepo.freebsd.org (DragonFly Mail Agent v0.13+ on gitrepo.freebsd.org); Mon, 12 Oct 2026 18:38:28 +0000 To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-main@FreeBSD.org From: Alan Cox Subject: git: 39d6e2226484 - main - arm64: Fix and rename midr_check_var_part_range() List-Archive: https://lists.freebsd.org/archives/dev-commits-src-main X-BeenThere: dev-commits-src-main@freebsd.org Sender: owner-dev-commits-src-main@FreeBSD.org List-Id: Commit messages for the main branch of the src repository List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit X-Git-Committer: alc X-Git-Repository: src X-Git-Refname: refs/heads/main X-Git-Reftype: branch X-Git-Commit: 39d6e2226484ca434c7d980eda4aa19ed0d62c9e Auto-Submitted: auto-generated Date: Mon, 12 Oct 2026 18:38:28 +0000 Message-Id: <6acd2924.39137.51c79d9f@gitrepo.freebsd.org> The branch main has been updated by alc: URL: https://cgit.FreeBSD.org/src/commit/?id=39d6e2226484ca434c7d980eda4aa19ed0d62c9e commit 39d6e2226484ca434c7d980eda4aa19ed0d62c9e Author: Alan Cox AuthorDate: 2026-10-11 18:13:25 +0000 Commit: Alan Cox CommitDate: 2026-10-12 18:36:33 +0000 arm64: Fix and rename midr_check_var_part_range() At the lowest and highest variants in the specified range, midr_check_var_part_range() was comparing the part number, rather than the revision, against the bounds. In other words, the "Y" in "rXpY" should be compared to CPU_REV() instead of CPU_PART(). Apply this correction, and rename the function to midr_check_var_rev_range() to better reflect the field that we are checking. Reported by: Claude Code (Opus 5.5) Reviewed by: andrew MFC after: 1 week Differential Revision: https://reviews.freebsd.org/D60624 --- sys/arm64/arm64/identcpu.c | 2 +- sys/arm64/arm64/pmap.c | 4 ++-- sys/arm64/include/cpu.h | 17 +++++++++++------ 3 files changed, 14 insertions(+), 9 deletions(-) diff --git a/sys/arm64/arm64/identcpu.c b/sys/arm64/arm64/identcpu.c index d5c38d9b7dd6..e75f63693a57 100644 --- a/sys/arm64/arm64/identcpu.c +++ b/sys/arm64/arm64/identcpu.c @@ -2287,7 +2287,7 @@ user_ctr_has_neoverse_n1_1542419(uint32_t midr, uint64_t ctr) * Present in r3p0 - r4p0 * Fixed in r4p1 */ - return (midr_check_var_part_range(midr, CPU_IMPL_ARM, + return (midr_check_var_rev_range(midr, CPU_IMPL_ARM, CPU_PART_NEOVERSE_N1, 3, 0, 4, 0) && CTR_DIC_VAL(ctr) != 0); } diff --git a/sys/arm64/arm64/pmap.c b/sys/arm64/arm64/pmap.c index d20c08412c71..f27ddd379976 100644 --- a/sys/arm64/arm64/pmap.c +++ b/sys/arm64/arm64/pmap.c @@ -1798,7 +1798,7 @@ pmap_dbm_has_errata(const struct cpu_feat *feat __unused, u_int midr, } /* Disable on Cortex-A510 for erratum 2051678 - r0p0 to r0p2 */ - if (midr_check_var_part_range(midr, CPU_IMPL_ARM, CPU_PART_CORTEX_A510, + if (midr_check_var_rev_range(midr, CPU_IMPL_ARM, CPU_PART_CORTEX_A510, 0, 0, 0, 2)) { static u_int errata_id = 2051678; @@ -1904,7 +1904,7 @@ pmap_multiple_tlbi_check(const struct cpu_feat *feat __unused, u_int midr) * Present in r0p0 - r1p1 * Fixed in r1p2 */ - if (midr_check_var_part_range(midr, CPU_IMPL_ARM, CPU_PART_CORTEX_A510, + if (midr_check_var_rev_range(midr, CPU_IMPL_ARM, CPU_PART_CORTEX_A510, 0, 0, 1, 1)) return (FEAT_DEFAULT_DISABLE); diff --git a/sys/arm64/include/cpu.h b/sys/arm64/include/cpu.h index bdbc601edd26..4a937d9626a1 100644 --- a/sys/arm64/include/cpu.h +++ b/sys/arm64/include/cpu.h @@ -198,9 +198,14 @@ ((mask) & CPU_ID_RAW((impl), (part), (var), (rev)))) #if !defined(__ASSEMBLER__) +/* + * Check whether midr identifies the given implementer and part at a product + * revision rXpY from r(var_low)p(rev_low) to r(var_high)p(rev_high) + * inclusive. X is MIDR_EL1.Variant, and Y is MIDR_EL1.Revision. + */ static inline bool -midr_check_var_part_range(u_int midr, u_int impl, u_int part, u_int var_low, - u_int part_low, u_int var_high, u_int part_high) +midr_check_var_rev_range(u_int midr, u_int impl, u_int part, u_int var_low, + u_int rev_low, u_int var_high, u_int rev_high) { /* Check for the correct part */ if (CPU_IMPL(midr) != impl || CPU_PART(midr) != part) @@ -210,12 +215,12 @@ midr_check_var_part_range(u_int midr, u_int impl, u_int part, u_int var_low, if (CPU_VAR(midr) < var_low || CPU_VAR(midr) > var_high) return (false); - /* If the variant is the low value, check if the part is high enough */ - if (CPU_VAR(midr) == var_low && CPU_PART(midr) < part_low) + /* If the variant is var_low, check if the revision is high enough */ + if (CPU_VAR(midr) == var_low && CPU_REV(midr) < rev_low) return (false); - /* If the variant is the high value, check if the part is low enough */ - if (CPU_VAR(midr) == var_high && CPU_PART(midr) > part_high) + /* If the variant is var_high, check if the revision is low enough */ + if (CPU_VAR(midr) == var_high && CPU_REV(midr) > rev_high) return (false); return (true);