git: 7be7bd677585 - main - arm64: Add explicit barrier after address translation instruction
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Date: Fri, 25 Mar 2022 16:49:47 UTC
The branch main has been updated by scottph:
URL: https://cgit.FreeBSD.org/src/commit/?id=7be7bd67758520ea2f9784a81ad244e99a7632f0
commit 7be7bd67758520ea2f9784a81ad244e99a7632f0
Author: D Scott Phillips <scottph@FreeBSD.org>
AuthorDate: 2022-03-25 16:04:47 +0000
Commit: D Scott Phillips <scottph@FreeBSD.org>
CommitDate: 2022-03-25 16:49:33 +0000
arm64: Add explicit barrier after address translation instruction
Following ARMARM sec D5.2.11, which says:
> Where an instruction results in an update to a System register,
> as is the case with the AT * address translation instructions,
> explicit synchronization must be performed before the result is
> guaranteed to be visible to subsequent direct reads of the
> PAR_EL1.
Reviewed By: andrew
MFC after: 3 weeks
Sponsored by: Ampere Computing
Differential Revision: https://reviews.freebsd.org/D34665
---
sys/arm64/include/cpu.h | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/sys/arm64/include/cpu.h b/sys/arm64/include/cpu.h
index d3b13470a9be..7659874e9bb4 100644
--- a/sys/arm64/include/cpu.h
+++ b/sys/arm64/include/cpu.h
@@ -222,7 +222,8 @@ arm64_address_translate_ ##stage (uint64_t addr) \
uint64_t ret; \
\
__asm __volatile( \
- "at " __STRING(stage) ", %1 \n" \
+ "at " __STRING(stage) ", %1 \n" \
+ "isb \n" \
"mrs %0, par_el1" : "=r"(ret) : "r"(addr)); \
\
return (ret); \