git: b5d1e0c5a492 - main - llvm: remove Mips target support
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Date: Thu, 24 Sep 2026 12:51:10 UTC
The branch main has been updated by dim:
URL: https://cgit.FreeBSD.org/src/commit/?id=b5d1e0c5a4929e2be3bc58aad8e5b707860ec0fd
commit b5d1e0c5a4929e2be3bc58aad8e5b707860ec0fd
Author: Dimitry Andric <dim@FreeBSD.org>
AuthorDate: 2026-09-24 12:50:47 +0000
Commit: Dimitry Andric <dim@FreeBSD.org>
CommitDate: 2026-09-24 12:50:47 +0000
llvm: remove Mips target support
The Mips architecture has been removed from all supported branches now.
MFC after: 1 week
---
lib/clang/include/llvm/Config/AsmParsers.def | 3 -
lib/clang/include/llvm/Config/AsmPrinters.def | 3 -
lib/clang/include/llvm/Config/Disassemblers.def | 3 -
lib/clang/include/llvm/Config/Targets.def | 3 -
lib/clang/include/llvm/Config/Targets.h | 4 --
lib/clang/libllvm/Makefile | 89 ++-----------------------
lib/clang/llvm.build.mk | 3 -
share/man/man5/src.conf.5 | 7 +-
share/mk/src.opts.mk | 2 +-
tools/build/options/WITHOUT_LLVM_TARGET_MIPS | 4 --
tools/build/options/WITH_LLVM_TARGET_MIPS | 4 --
11 files changed, 8 insertions(+), 117 deletions(-)
diff --git a/lib/clang/include/llvm/Config/AsmParsers.def b/lib/clang/include/llvm/Config/AsmParsers.def
index 3dccab75a285..8cf3ffd6b0d4 100644
--- a/lib/clang/include/llvm/Config/AsmParsers.def
+++ b/lib/clang/include/llvm/Config/AsmParsers.def
@@ -33,9 +33,6 @@ LLVM_ASM_PARSER(ARM)
#ifdef LLVM_TARGET_ENABLE_BPF
LLVM_ASM_PARSER(BPF)
#endif
-#ifdef LLVM_TARGET_ENABLE_MIPS
-LLVM_ASM_PARSER(Mips)
-#endif
#ifdef LLVM_TARGET_ENABLE_POWERPC
LLVM_ASM_PARSER(PowerPC)
#endif
diff --git a/lib/clang/include/llvm/Config/AsmPrinters.def b/lib/clang/include/llvm/Config/AsmPrinters.def
index 649b8353c926..b88e60ada874 100644
--- a/lib/clang/include/llvm/Config/AsmPrinters.def
+++ b/lib/clang/include/llvm/Config/AsmPrinters.def
@@ -33,9 +33,6 @@ LLVM_ASM_PRINTER(ARM)
#ifdef LLVM_TARGET_ENABLE_BPF
LLVM_ASM_PRINTER(BPF)
#endif
-#ifdef LLVM_TARGET_ENABLE_MIPS
-LLVM_ASM_PRINTER(Mips)
-#endif
#ifdef LLVM_TARGET_ENABLE_POWERPC
LLVM_ASM_PRINTER(PowerPC)
#endif
diff --git a/lib/clang/include/llvm/Config/Disassemblers.def b/lib/clang/include/llvm/Config/Disassemblers.def
index c44fa4e303e2..72c0dcab0ab3 100644
--- a/lib/clang/include/llvm/Config/Disassemblers.def
+++ b/lib/clang/include/llvm/Config/Disassemblers.def
@@ -33,9 +33,6 @@ LLVM_DISASSEMBLER(ARM)
#ifdef LLVM_TARGET_ENABLE_BPF
LLVM_DISASSEMBLER(BPF)
#endif
-#ifdef LLVM_TARGET_ENABLE_MIPS
-LLVM_DISASSEMBLER(Mips)
-#endif
#ifdef LLVM_TARGET_ENABLE_POWERPC
LLVM_DISASSEMBLER(PowerPC)
#endif
diff --git a/lib/clang/include/llvm/Config/Targets.def b/lib/clang/include/llvm/Config/Targets.def
index d3332a51a2cc..725efe253ced 100644
--- a/lib/clang/include/llvm/Config/Targets.def
+++ b/lib/clang/include/llvm/Config/Targets.def
@@ -32,9 +32,6 @@ LLVM_TARGET(ARM)
#ifdef LLVM_TARGET_ENABLE_BPF
LLVM_TARGET(BPF)
#endif
-#ifdef LLVM_TARGET_ENABLE_MIPS
-LLVM_TARGET(Mips)
-#endif
#ifdef LLVM_TARGET_ENABLE_POWERPC
LLVM_TARGET(PowerPC)
#endif
diff --git a/lib/clang/include/llvm/Config/Targets.h b/lib/clang/include/llvm/Config/Targets.h
index ce9bffebe10f..ccb524e96fa2 100644
--- a/lib/clang/include/llvm/Config/Targets.h
+++ b/lib/clang/include/llvm/Config/Targets.h
@@ -61,11 +61,7 @@
#define LLVM_HAS_M68K_TARGET 0
/* Define if the Mips target is built in */
-#ifdef LLVM_TARGET_ENABLE_MIPS
-#define LLVM_HAS_MIPS_TARGET 1
-#else
#define LLVM_HAS_MIPS_TARGET 0
-#endif
/* Define if the MSP430 target is built in */
#define LLVM_HAS_MSP430_TARGET 0
diff --git a/lib/clang/libllvm/Makefile b/lib/clang/libllvm/Makefile
index a234c73b15b9..9baa95c19242 100644
--- a/lib/clang/libllvm/Makefile
+++ b/lib/clang/libllvm/Makefile
@@ -27,15 +27,14 @@ CFLAGS+= -I${.OBJDIR}
CFLAGS+= -I${SRCTOP}/sys/contrib/zstd/lib
.if ${MK_LLVM_TARGET_AARCH64} == "no" && ${MK_LLVM_TARGET_ARM} == "no" && \
- ${MK_LLVM_TARGET_BPF} == "no" && ${MK_LLVM_TARGET_MIPS} == "no" && \
- ${MK_LLVM_TARGET_POWERPC} == "no" && ${MK_LLVM_TARGET_RISCV} == "no" && \
- ${MK_LLVM_TARGET_X86} == "no"
+ ${MK_LLVM_TARGET_BPF} == "no" && ${MK_LLVM_TARGET_POWERPC} == "no" && \
+ ${MK_LLVM_TARGET_RISCV} == "no" && ${MK_LLVM_TARGET_X86} == "no"
.error Please enable at least one of: MK_LLVM_TARGET_AARCH64,\
- MK_LLVM_TARGET_ARM, MK_LLVM_TARGET_BPF, MK_LLVM_TARGET_MIPS, \
- MK_LLVM_TARGET_POWERPC, MK_LLVM_TARGET_RISCV, or MK_LLVM_TARGET_X86
+ MK_LLVM_TARGET_ARM, MK_LLVM_TARGET_BPF, MK_LLVM_TARGET_POWERPC,\
+ MK_LLVM_TARGET_RISCV, or MK_LLVM_TARGET_X86
.endif
-.for arch in AArch64 ARM BPF Mips PowerPC RISCV X86
+.for arch in AArch64 ARM BPF PowerPC RISCV X86
. if ${MK_LLVM_TARGET_${arch:tu}} != "no"
CFLAGS+= -I${LLVM_SRCS}/lib/Target/${arch}
. endif
@@ -1544,65 +1543,6 @@ SRCS_MIN+= Target/BPF/MCTargetDesc/BPFMCCodeEmitter.cpp
SRCS_MIN+= Target/BPF/MCTargetDesc/BPFMCTargetDesc.cpp
SRCS_MIN+= Target/BPF/TargetInfo/BPFTargetInfo.cpp
.endif # MK_LLVM_TARGET_BPF
-.if ${MK_LLVM_TARGET_MIPS} != "no"
-SRCS_MIN+= Target/Mips/AsmParser/MipsAsmParser.cpp
-SRCS_XDW+= Target/Mips/Disassembler/MipsDisassembler.cpp
-SRCS_MIN+= Target/Mips/MCTargetDesc/MipsABIFlagsSection.cpp
-SRCS_MIN+= Target/Mips/MCTargetDesc/MipsABIInfo.cpp
-SRCS_MIN+= Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
-SRCS_MIN+= Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp
-SRCS_MIN+= Target/Mips/MCTargetDesc/MipsELFStreamer.cpp
-SRCS_MIN+= Target/Mips/MCTargetDesc/MipsInstPrinter.cpp
-SRCS_MIN+= Target/Mips/MCTargetDesc/MipsMCAsmInfo.cpp
-SRCS_MIN+= Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
-SRCS_MIN+= Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp
-SRCS_MIN+= Target/Mips/MCTargetDesc/MipsNaClELFStreamer.cpp
-SRCS_MIN+= Target/Mips/MCTargetDesc/MipsOptionRecord.cpp
-SRCS_MIN+= Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
-SRCS_MIN+= Target/Mips/MicroMipsSizeReduction.cpp
-SRCS_MIN+= Target/Mips/Mips16FrameLowering.cpp
-SRCS_MIN+= Target/Mips/Mips16HardFloat.cpp
-SRCS_MIN+= Target/Mips/Mips16HardFloatInfo.cpp
-SRCS_MIN+= Target/Mips/Mips16ISelDAGToDAG.cpp
-SRCS_MIN+= Target/Mips/Mips16ISelLowering.cpp
-SRCS_MIN+= Target/Mips/Mips16InstrInfo.cpp
-SRCS_MIN+= Target/Mips/Mips16RegisterInfo.cpp
-SRCS_MIN+= Target/Mips/MipsAnalyzeImmediate.cpp
-SRCS_MIN+= Target/Mips/MipsAsmPrinter.cpp
-SRCS_MIN+= Target/Mips/MipsBranchExpansion.cpp
-SRCS_MIN+= Target/Mips/MipsCCState.cpp
-SRCS_MIN+= Target/Mips/MipsCallLowering.cpp
-SRCS_MIN+= Target/Mips/MipsConstantIslandPass.cpp
-SRCS_MIN+= Target/Mips/MipsDelaySlotFiller.cpp
-SRCS_MIN+= Target/Mips/MipsExpandPseudo.cpp
-SRCS_MIN+= Target/Mips/MipsFastISel.cpp
-SRCS_MIN+= Target/Mips/MipsFrameLowering.cpp
-SRCS_MIN+= Target/Mips/MipsISelDAGToDAG.cpp
-SRCS_MIN+= Target/Mips/MipsISelLowering.cpp
-SRCS_MIN+= Target/Mips/MipsInstrInfo.cpp
-SRCS_MIN+= Target/Mips/MipsInstructionSelector.cpp
-SRCS_MIN+= Target/Mips/MipsLegalizerInfo.cpp
-SRCS_MIN+= Target/Mips/MipsMCInstLower.cpp
-SRCS_MIN+= Target/Mips/MipsMachineFunction.cpp
-SRCS_MIN+= Target/Mips/MipsModuleISelDAGToDAG.cpp
-SRCS_MIN+= Target/Mips/MipsMulMulBugPass.cpp
-SRCS_MIN+= Target/Mips/MipsOptimizePICCall.cpp
-SRCS_MIN+= Target/Mips/MipsOs16.cpp
-SRCS_MIN+= Target/Mips/MipsPostLegalizerCombiner.cpp
-SRCS_MIN+= Target/Mips/MipsPreLegalizerCombiner.cpp
-SRCS_MIN+= Target/Mips/MipsRegisterBankInfo.cpp
-SRCS_MIN+= Target/Mips/MipsRegisterInfo.cpp
-SRCS_MIN+= Target/Mips/MipsSEFrameLowering.cpp
-SRCS_MIN+= Target/Mips/MipsSEISelDAGToDAG.cpp
-SRCS_MIN+= Target/Mips/MipsSEISelLowering.cpp
-SRCS_MIN+= Target/Mips/MipsSEInstrInfo.cpp
-SRCS_MIN+= Target/Mips/MipsSERegisterInfo.cpp
-SRCS_MIN+= Target/Mips/MipsSubtarget.cpp
-SRCS_MIN+= Target/Mips/MipsTargetMachine.cpp
-SRCS_MIN+= Target/Mips/MipsTargetObjectFile.cpp
-SRCS_MIN+= Target/Mips/MipsTargetTransformInfo.cpp
-SRCS_MIN+= Target/Mips/TargetInfo/MipsTargetInfo.cpp
-.endif # MK_LLVM_TARGET_MIPS
.if ${MK_LLVM_TARGET_POWERPC} != "no"
SRCS_MIN+= Target/PowerPC/AsmParser/PPCAsmParser.cpp
SRCS_MIN+= Target/PowerPC/Disassembler/PPCDisassembler.cpp
@@ -2331,8 +2271,7 @@ beforebuild:
# Note: some rules are superfluous, not every combination is valid.
.for arch in \
- AArch64/AArch64 ARM/ARM BPF/BPF Mips/Mips PowerPC/PPC RISCV/RISCV \
- X86/X86
+ AArch64/AArch64 ARM/ARM BPF/BPF PowerPC/PPC RISCV/RISCV X86/X86
. for hdr in \
AsmMatcher/-gen-asm-matcher \
AsmWriter/-gen-asm-writer \
@@ -2425,22 +2364,6 @@ TGHDRS+= BPFGenRegisterBank.inc
TGHDRS+= BPFGenRegisterInfo.inc
TGHDRS+= BPFGenSubtargetInfo.inc
.endif # MK_LLVM_TARGET_BPF
-.if ${MK_LLVM_TARGET_MIPS} != "no"
-TGHDRS+= MipsGenAsmMatcher.inc
-TGHDRS+= MipsGenAsmWriter.inc
-TGHDRS+= MipsGenCallingConv.inc
-TGHDRS+= MipsGenDAGISel.inc
-TGHDRS+= MipsGenDisassemblerTables.inc
-TGHDRS+= MipsGenFastISel.inc
-TGHDRS+= MipsGenGlobalISel.inc
-TGHDRS+= MipsGenInstrInfo.inc
-TGHDRS+= MipsGenMCCodeEmitter.inc
-TGHDRS+= MipsGenMCPseudoLowering.inc
-TGHDRS+= MipsGenPostLegalizeGICombiner.inc
-TGHDRS+= MipsGenRegisterBank.inc
-TGHDRS+= MipsGenRegisterInfo.inc
-TGHDRS+= MipsGenSubtargetInfo.inc
-.endif # MK_LLVM_TARGET_MIPS
.if ${MK_LLVM_TARGET_POWERPC} != "no"
TGHDRS+= PPCGenAsmMatcher.inc
TGHDRS+= PPCGenAsmWriter.inc
diff --git a/lib/clang/llvm.build.mk b/lib/clang/llvm.build.mk
index b8b4be7dfe28..d06a2f42479c 100644
--- a/lib/clang/llvm.build.mk
+++ b/lib/clang/llvm.build.mk
@@ -71,9 +71,6 @@ LLVM_NATIVE_ARCH= ARM
.if ${MK_LLVM_TARGET_BPF} != "no"
CFLAGS+= -DLLVM_TARGET_ENABLE_BPF
.endif
-.if ${MK_LLVM_TARGET_MIPS} != "no"
-CFLAGS+= -DLLVM_TARGET_ENABLE_MIPS
-.endif
.if ${MK_LLVM_TARGET_POWERPC} != "no"
CFLAGS+= -DLLVM_TARGET_ENABLE_POWERPC
. if ${MACHINE_CPUARCH} == "powerpc"
diff --git a/share/man/man5/src.conf.5 b/share/man/man5/src.conf.5
index 10bf73581dc0..37747ac4fb53 100644
--- a/share/man/man5/src.conf.5
+++ b/share/man/man5/src.conf.5
@@ -1,5 +1,5 @@
.\" DO NOT EDIT-- this file is @generated by tools/build/options/makeman.
-.Dd September 21, 2026
+.Dd September 24, 2026
.Dt SRC.CONF 5
.Os
.Sh NAME
@@ -1043,11 +1043,6 @@ Build LLVM target support for BPF.
The
.Va LLVM_TARGET_ALL
option should be used rather than this in most cases.
-.It Va WITH_LLVM_TARGET_MIPS
-Build LLVM target support for MIPS.
-The
-.Va LLVM_TARGET_ALL
-option should be used rather than this in most cases.
.It Va WITHOUT_LLVM_TARGET_POWERPC
Do not build LLVM target support for PowerPC.
The
diff --git a/share/mk/src.opts.mk b/share/mk/src.opts.mk
index 0c6b97461b5e..8ca5fbd1873b 100644
--- a/share/mk/src.opts.mk
+++ b/share/mk/src.opts.mk
@@ -293,7 +293,7 @@ __DEFAULT_DEPENDENT_OPTIONS+= LLVM_TARGET_${__llt:${__LLVM_TARGET_FILT}:tu}/LLVM
.endif
.endfor
-__DEFAULT_NO_OPTIONS+=LLVM_TARGET_BPF LLVM_TARGET_MIPS
+__DEFAULT_NO_OPTIONS+=LLVM_TARGET_BPF
.include <bsd.compiler.mk>
diff --git a/tools/build/options/WITHOUT_LLVM_TARGET_MIPS b/tools/build/options/WITHOUT_LLVM_TARGET_MIPS
deleted file mode 100644
index 2b8218b2c8c4..000000000000
--- a/tools/build/options/WITHOUT_LLVM_TARGET_MIPS
+++ /dev/null
@@ -1,4 +0,0 @@
-Do not build LLVM target support for MIPS.
-The
-.Va LLVM_TARGET_ALL
-option should be used rather than this in most cases.
diff --git a/tools/build/options/WITH_LLVM_TARGET_MIPS b/tools/build/options/WITH_LLVM_TARGET_MIPS
deleted file mode 100644
index 4cc2a85cd34c..000000000000
--- a/tools/build/options/WITH_LLVM_TARGET_MIPS
+++ /dev/null
@@ -1,4 +0,0 @@
-Build LLVM target support for MIPS.
-The
-.Va LLVM_TARGET_ALL
-option should be used rather than this in most cases.