svn commit: r282446 - head/sys/dev/pccbb

[Warner Losh]

Author: imp
Date: Tue May  5 04:13:48 2015
New Revision: 282446
URL: https://svnweb.freebsd.org/changeset/base/282446

Log:
  When dealing with the TI12XX family of parts, we sometimes need to
  initialize the MFUNC registers. Our old test of assuming that if this
  register is set at all is not quite right. Many scenarios (including
  the power-on defaults for chips w/o EEPROMs) land us in trouble. The
  MFUNC0 pin should be set to signal #INTA and the MFUNC1 pin should be
  set to signal #INTB of multi-socketed devices. Since my memory recalls
  issues with blindly clearing the upper bytes of this register, perform
  the heuristic only when both MFUNC0 and 1 are clear. We won't work
  well using these pins for GPIO, and the serial interrupts won't save
  us because we go out of our way to generally disable them. They are
  needed to support legacy drivers for 16-bit PC Cards that are
  hard-wired to specific IRQ values. Since FreeBSD never had any of
  these, we configure the more reliable direct signaling. This was just
  one small piece of that which had been left out back in the day.

Modified:
  head/sys/dev/pccbb/pccbb_pci.c

Modified: head/sys/dev/pccbb/pccbb_pci.c
==============================================================================
--- head/sys/dev/pccbb/pccbb_pci.c	Tue May  5 03:17:32 2015	(r282445)
+++ head/sys/dev/pccbb/pccbb_pci.c	Tue May  5 04:13:48 2015	(r282446)
@@ -502,10 +502,19 @@ cbb_chipinit(struct cbb_softc *sc)
 		 * properly initialized.
 		 *
 		 * The TI125X parts have a different register.
+		 *
+		 * Note: Only the lower two nibbles matter. When set
+		 * to 0, the MFUNC{0,1} pins are GPIO, which isn't
+		 * going to work out too well because we specifically
+		 * program these parts to parallel interrupt signalling
+		 * elsewhere. We preserve the upper bits of this
+		 * register since changing them have subtle side effects
+		 * for different variants of the card and are
+		 * extremely difficult to exaustively test.
 		 */
 		mux = pci_read_config(sc->dev, CBBR_MFUNC, 4);
 		sysctrl = pci_read_config(sc->dev, CBBR_SYSCTRL, 4);
-		if (mux == 0) {
+		if ((mux & (CBBM_MFUNC_PIN0 | CBBM_MFUNC_PIN1)) == 0) {
 			mux = (mux & ~CBBM_MFUNC_PIN0) |
 			    CBBM_MFUNC_PIN0_INTA;
 			if ((sysctrl & CBBM_SYSCTRL_INTRTIE) == 0)
@@ -518,7 +527,8 @@ cbb_chipinit(struct cbb_softc *sc)
 		/*
 		 * Disable zoom video.  Some machines initialize this
 		 * improperly and exerpience has shown that this helps
-		 * prevent strange behavior.
+		 * prevent strange behavior. We don't support zoom
+		 * video anyway, so no harm can come from this.
 		 */
 		pci_write_config(sc->dev, CBBR_MMCTRL, 0, 4);
 		break;