PERFORCE change 136817 for review

Randall R. Stewart rrs at FreeBSD.org
Tue Mar 4 14:26:25 UTC 2008


http://perforce.freebsd.org/chv.cgi?CH=136817

Change 136817 by rrs at rrs-mips2-jnpr on 2008/03/04 14:25:58

	135973

Affected files ...

.. //depot/projects/mips2-jnpr/src/sys/mips/conf/OCTEON_rrs2#3 edit
.. //depot/projects/mips2-jnpr/src/sys/mips/mips32/octeon32/uart_dev_oct16550.c#15 edit

Differences ...

==== //depot/projects/mips2-jnpr/src/sys/mips/conf/OCTEON_rrs2#3 (text+ko) ====

@@ -75,7 +75,7 @@
 #
 # Use the following for  Compact Flash file-system
 #device 		cf
-options         ROOTDEVNAME = \"ufs:cf0s2a\"	# Unmask if compact flash is needed as RFS
+#options         ROOTDEVNAME = \"ufs:cf0s2a\"	# Unmask if compact flash is needed as RFS
 
 #
 # Use the following for RFS in mem-device

==== //depot/projects/mips2-jnpr/src/sys/mips/mips32/octeon32/uart_dev_oct16550.c#15 (text+ko) ====

@@ -87,7 +87,6 @@
 #define uart_getreg(bas, reg)	\
 	bus_space_read_8((bas)->bst, (bas)->bsh, uart_regofs(bas, reg))
 
-
 /*
  * Clear pending interrupts. THRE is cleared by reading IIR. Data
  * that may have been received gets lost here.
@@ -624,23 +623,43 @@
 {
 	struct uart_bas *bas;
 	int ipend = 0;
-	uint8_t iir, lsr;
+	uint8_t iir, lsr, iir2;
 
 	bas = &sc->sc_bas;
 	uart_lock(sc->sc_hwmtx);
 	
-	iir = uart_getreg(bas, OCT_REG_IIR) & IIR_IMASK;
+	iir2 = uart_getreg(bas, OCT_REG_IIR);
+	iir = iir2 & IIR_IMASK;
 	if (iir != IIR_NOPEND) {
-
-		if (iir == IIR_RLS) {
+	          if (iir == IIR_RLS) {
 			lsr = uart_getreg(bas, OCT_REG_LSR);
 			if (lsr & LSR_OE)
 				ipend |= SER_INT_OVERRUN;
-			if (lsr & LSR_BI)
-				ipend |= SER_INT_BREAK;
+			if (lsr & LSR_BI) {
+			        ipend |= SER_INT_BREAK;
+				lsr = uart_getreg(bas, OCT_REG_LSR);
+				if (lsr & LSR_RXRDY) {
+				  /* the uart gives us a '0' after we
+				   * clear the break by reading the lsr.
+				   * The upper layer uart_tty.c code
+				   * pushes in a 0, (it probably should
+				   * be pushing int a TTY_BI (I think
+				   * thats a bug). But regardless we don't
+				   * want to push in a subsequent 0.
+				   */
+				  unsigned int xc;
+				  xc = uart_getreg(bas, OCT_REG_RBR);
+				  if (xc != 0) {
+				    /* TSNH */
+				    printf("Warning  driver incorrectly tossed c %x\n",
+					   xc);
+				  }
+				  lsr = uart_getreg(bas, OCT_REG_LSR);
+				}
+			}
 			if (lsr & LSR_RXRDY)
-				ipend |= SER_INT_RXREADY;
-
+			  ipend |= SER_INT_RXREADY;
+			
 		} else if (iir == IIR_RXRDY) {
 			ipend |= SER_INT_RXREADY;
 
@@ -758,7 +777,6 @@
 	bas = &sc->sc_bas;
 	uart_lock(sc->sc_hwmtx);
 	lsr = uart_getreg(bas, OCT_REG_LSR);
-
 	while (lsr & LSR_RXRDY) {
 		if (uart_rx_full(sc)) {
 			sc->sc_rxbuf[sc->sc_rxput] = UART_STAT_OVERRUN;
@@ -777,9 +795,9 @@
 	 * First do a read/discard anyway, in case the UART was lying to us.
 	 * This was seen, when IIR said RBR, but LSR said no RXRDY
 	 */
-	(void)uart_getreg(bas, OCT_REG_RBR);
+	xc = uart_getreg(bas, OCT_REG_RBR);
 	while (lsr & LSR_RXRDY) {
-		(void)uart_getreg(bas, OCT_REG_RBR);
+		xc = uart_getreg(bas, OCT_REG_RBR);
 		uart_barrier(bas);
 		lsr = uart_getreg(bas, OCT_REG_LSR);
 	}


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