Thread Local Storage

Doug Rabson dfr at nlsystems.com
Tue Mar 30 00:25:15 PST 2004


On Tuesday 30 March 2004 00:18, Peter Wemm wrote:
> On Monday 29 March 2004 02:36 pm, Daniel Eischen wrote:
> [..]
>
> > > > > You don't need a syscall at thread switch if you do something
> > > > > like:
> > > > >
> > > > > 	_thread_switch(...)
> > > > > 	{
> > > > > 		if (tcb doesn't have LDT entry) {
> > > > > 			if (!free LDT entries)
> > > > > 				steal LDT entry from non-running thread;
> > > > > 			allocate LDT entry and point it at TLS goop for tcb.
> > > > > 		}
> > > > > 		load_gs(tcb's LDT sel);
> > > >
> > > > That's a system call on amd64.
> > >
> > > I'm not quite up to speed on amd64. So in 64-bit mode it doesn't
> > > really have an LDT at all, is that right?
> >
> > I'm not sure, but you have to make a system call to set it
> > or it's equivalent (amd64_set_fsbase()).
>
> Correct.  There are two ways to do these things on this cpu.  One is
> to use descriptor tables.  The catch is that using descriptor tables
> forces a 4GB limit.  It won't wrap around.  The other way is to write
> to the MSRs for fsbase/gsbase.  But the downside of that is that is a
> priviliged operation and needs to be done in supervisor mode.

What do you put in %fs and %gs for the non-table mode?

The TLS ABI for amd64 is a 64bit equivalent to the GNU i386 ABI (with 
%fs instead of %gs). It also allows stuff like 'movq %fs:x at tpoff, %rax' 
where x at tpoff resolves to the negative offset from the end of the TLS 
block to the location of x. I can't see any way of avoiding setting 
fsbase on thread switch here.

>
> I don't *have* an LDT on the amd64 kernel.  I'm dreading having to
> emulate the i386 sysarch LDT stuff already.

Segment registers. Not the worlds greatest idea...


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