8.1-RC2 MCE caused by some LAPIC/clock changes?
avg at icyb.net.ua
Wed Jul 21 08:33:19 UTC 2010
on 21/07/2010 03:57 Markus Gebert said the following:
> Another thing though: Today I compared verbose boot output from 8-stable and
> the current box. I saw that the ioapic sets up IRQ routing differently on
> these two systems although the hardware is the same. This seemed not so
> interesting at first, but then I noticed that 8-stable sets up two routes (to
> lapic0 and lapic2, or sometimes lapic3) for IRQ58 (mpt0), while current only
> uses one route (to lapic0).
My understanding that it's not "two routes", but re-routing.
During early boot all interrupts are bound to BSP; later, when APs become
online, the interrupts are re-distributed among available CPUs.
> I used 'cpuset -c -l 0 -x 58' in an attempt to make my 8-stable box behave
> like the one running current. Indeed, this seems to have changed IRQ58 to be
> routed to lapic0 only. And the box was running for hours without showing the
> I just checked boot verbose outpout of my 8-stable box again (booted with
> machdep.lapic_allclocks=0 as mentioned above). And now it seems to have set
> up IRQ routes just like the current box (one route for IRQ58 to lapic0).
Not sure how to interpret this properly.
One possibility is a hardware problem where interrupt message route between
ioapic2 and CPU to which lapic3 belongs is flaky.
Perhaps, this might be a FreeBSD problem: it could be that the system somehow
tells to not set up such routes, but we don't listen. But this is far fetched.
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