new version of polling for FreeBSD 6.x

Olivier Warin daffy at xview.net
Sat Sep 8 08:30:01 PDT 2007


Le 6 sept. 07 à 15:12, Fabien THOMAS a écrit :

> 	Hi,
>
> After many years of good services we will stop using FreeBSD 4.x :)
> During my performance regression tests under FreeBSD 6.2 i've found  
> that polling has lower performance than interrupt.
> To solve that issue i've rewritten the core of polling to be more  
> SMP ready.
>
> You can find a summary of all my tests and the source code at the  
> following address:
> http://www.netasq.com/opensource/pollng-rev1-freebsd.tgz
>
> Feel free to ask more detailed information if necessary and report  
> any bugs / comments.

Hello Fabien,

1- I have noticed you are not using GENERIC config file, can you  
provide us more information on how your KERNCONF differs from  
GENERIC ? I am pretty sure you have removed all the debug OPTIONs  
from the kernel, isn't it ?

2- Did you get a chance to try Jumbo Frames and evaluate jumbo mbufs  
(I never success to make them work for me, did someone had more  
chance ?). In any cases, PPS values are important for such tests.
Andre is right, with Fast Forward you get the best perfs for such test.

3- Did you monitor the DUT to see where CPU cycles were spend in each  
test ?

4- Have you considered measuring the time it takes for an interrupt  
to be handled and processed by the kernel Bottom/Top Half and ISR ? [1]

5- When I have performed some test using a Spirent SmartBits  
(SmartFlow) last summer I got the following results [2]. (For  
comparison purposes)

6- In the test with Spirent Avalanche, you are using Lighttpd as  
webserver, did you enable kqueue ? how many workers ?
You are using HTTP 1.0 wo Keep-Alive, what was your net.inet.tcp.msl  
MIB's value ?

7- Polling is known to introduce higher latency, I would expect its  
benefits to be less in 7-CURRENT compared to 6.x since (Scott ?) a  
FAST INTR Handler has been introduced around a year ago. Nonetheless,  
what you report sounds like a perf regression... Have you filled a  
PR ? Luigi might have a good explaination here. :-D

8- Lock profiling information were obtanied through KTR ?

9- I was wondering if you have explored Intr CPU affinity [3] and IRQ  
Swizzling  [4] ?

Thanks for your efforts and your valuable contribution, best regards,
/Olivier

[1] http://xview.net/papers/interrupt_latency_scheduler/ (WARNING:  
Never find the time to finish that doc and publish it) &&
http://xview.net/research/RTBench/

[2] http://xview.net/papers/jumbo_mbufs_freebsd/

[3] http://www.intel.com/cd/ids/developer/asmo-na/eng/188935.htm?prn=Y

[4] http://download.intel.com/design/chipsets/applnots/31433702.pdf
--
Olivier Warin




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