APIC/SMP on UP? (was Re: Load average with CURRENT)

[Justin Dossey]

On Tue, 9 Mar 2004, Conrad Sabatier wrote:

> I've been meaning to ask about this.  Is there anything to be gained on a UP
> box by enabling APIC and/or SMP?  I'm running on an Athlon here, with ULE:
>
> CPU: AMD Athlon(tm) Processor (998.07-MHz 686-class CPU)
>   Origin = "AuthenticAMD"  Id = 0x622  Stepping = 2  Features=0x183f9ff<FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,MMX,FXSR>
>   AMD Features=0xc0400000<AMIE,DSP,3DNow!>

I'd say yes, there is.  APIC reduces interrupt overhead and provides
an on-chip timer. It also provides better interrupt sharing.

-- 
Justin Dossey