Align exception (was: MMC cards support)
ticso at cicely12.cicely.de
Sat Dec 15 13:40:14 PST 2007
On Sun, Dec 16, 2007 at 12:10:14AM +0300, Stanislav Sedov wrote:
> On Sat, Dec 15, 2007 at 07:43:48PM +0300 Stanislav Sedov mentioned:
> > This address always comes from it->it_thread. and should obviously
> > reflect thread td structure:
> > td = it->it_thread;
> > c00ee064: e51b301c ldr r3, [fp, #-28]
> > c00ee068: e5933004 ldr r3, [r3, #4]
> > c00ee06c: e50b3018 str r3, [fp, #-24]
> > p = td->td_proc;
> > c00ee070: e51b3018 ldr r3, [fp, #-24]
> > c00ee074: e5933004 ldr r3, [r3, #4]
> > However the contents of td (r3) is always 42203735 when
> > it's loaded from it->it_thread. It looks like uart does
> > something awful with the interrupt thread pointer.
> It's even better, when ithread_create initializes
> structure for intr_thread, it does this correctly for all
> interrupts, however when intr_event_schedule_thread began to
> work on the uart0 interrupt event the intr_thread *it
> structure contents is entirely broken, though the address
> itself is correct. Very suspicios...
> Maybe I'm doing something wrong? What I did - I've build
> the kernel using usual buildworld/buildkernel sequence,
> loaded the resulting kernel image (I've tried both
> kernel and kernel.bin) using u-boot to the KERNPHYSADDR
> and jumped there. Though it seems to mount NFS correctly,
> so the memory should be ok in my case.
I'm not 100% sure if it is the same thing - would have to search in
We've seen a something like this with specific kernel on RM9200 systems.
I'm not aware of other ARM systems, so it's likely a problem in an
It comes and goes with adding/removing unrelated options.
I personally use spi support, which I don't need, to toggle the symptom
if this happens to me.
If you can find the real cause of this many people would be very happy.
B.Walter http://www.bwct.de http://www.fizon.de
bernd at bwct.de info at bwct.de support at fizon.de
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