[Doug Ledford]

[ I'm Cc:ing this to aic7xxx mailing list so other people can see the neat
little diagrams and maybe get something usefull out of it ]

Leif Johansson wrote:
> 
> Hi Doug,
> 
> Thank you for your reply, howerver...
> 
> I am already using 5.0.8 and I have tripple-checked the termination!
> 
> There is more: If I set (in bios) the speed to be 5MHz the disks
> turn up as 5MHz. If I set the speed to be 20MHz the disks turn up
> as 10MHz. The same goes for 32MHz (bios) - turns up as 16MHz. When
> the bios is set to 20MHz and the disks turn up as 10MHz everything
> seems to work fine (knock on wood). But you have to admit that there
> is something fishy going on here!?!?

Nope.  Sounds about right.  The difference is that the aic7xxx driver
reports MHz (as you've been saying all along), but the Adaptec BIOS is
configured in MBytes/s and assumes the device will negotiate wide
transfers.  So, 40MBytes/s in the Adaptec BIOS is equal to setting the
device to "Try 20MHz (Ultra) speed and 2 byte (Wide) transfers".  The lowest
setting of 5MByte/s must automatically disable wide negotiation.  Now, if
you actually have wide devices, then don't forget that you have to double
the MHz speed to get the MByte/s speed.

Now, to continue further, the cabling restrictions for Ultra speed transfers
(anything above 10MHz) are quite severe.  If the drives work fine at 10MHz
but start flaking out at 16 or 20MHz, then I would strongly suspect cabling
problems.  Here are a few things to keep in mind for proper Ultra speed
cabling:

1.  I don't recommend mixing internal and external devices when using Ultra
speeds, the majority of external devices have inferior termination that will
trash the bus at Ultra speeds.

2.  Maximum cable length, including all internal and external cables, on an
Ultra bus is 1.5m.

3.  Cable twists are a "Bad Thing".  I've seen timeout errors vanish
entirely by simply re-arranging how the cable snakes through the computer
cabinet.  In general, twists in the cable will cause reliability problems,
while gracefull loops will not.  Since my explanation isn't real clear, a
couple of diagrams:


       Twisted cable:          Looped cable:

         --device A              --device A
Cont----/ /           Cont------/ /
          |                       |
          X (cable twist)         | (Cable is straight)
          |                       |
          \device B - TERM        |  device B - TERM
                                  |  |
                                   \/ <---Graceful loop, no twist

Usually, by either changing which device is terminated and the order in
which devices are hooked to the cable, or by changing mounting locations for
devices, you can make this sort of re-arrangement possible.  In rare cases,
it may require a different cable in order to be able to do this.  However,
this has been "proven" (at least in my eyes by practical experience over a
*very* long test period, almost two years now) that just this sort of change
is capable of stopping timeout and reset errors entirely.

Now, I'm no electrical engineer, so I could be wrong, but my understanding
of why the above helps is that any inductance you get from that gracefull
loop will be same pin effects.  Aka, there is a signal coming down pin 5,
the inductive effects will mainly effect pin 5.  On the other hand, cable
twists can create cross pin inductance problems that confuse SCSI devices. 
Since inductance is primarily found in parallel wires, not perpendicular
wires, I also recommend that whenever you do have to make a change in
direction on the cable that you do something like this:

       Pin 1       Pin 50
       |                 |
       |_________________|______Pin 1
       \                 |
        \                |
         \               |
          \              |
           \             |
            \            |
             \           |
              \          |
               \         |
    This should \        |
    have been a  \       |
    45 degree ang \      |
    but that's char\     |
    cell sizing for \    |
    you.  Anyway,    \   |
    this line-------->\  |
    represents a strong\ |
    crease in the cable \|______Pin 50
    as one side is folded over the top of the other to make this
    cable direction switch.  Doing this minimizes the amount of
    parallel pins in an overlapping area and reduces inductance
    effects.


-- 

 Doug Ledford  <dledford at dialnet.net>
  Opinions expressed are my own, but
     they should be everybody's.

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