svn commit: r290916 - in user/ngie/more-tests2: contrib/netbsd-tests/kernel contrib/netbsd-tests/lib/libcrypt etc/mtree lib/libc/tests/sys lib/libcrypt/tests sbin/restore share/locale-links sys/mip...
Garrett Cooper
ngie at FreeBSD.org
Mon Nov 16 06:02:12 UTC 2015
Author: ngie
Date: Mon Nov 16 06:02:09 2015
New Revision: 290916
URL: https://svnweb.freebsd.org/changeset/base/290916
Log:
MFhead @ r290915
Added:
user/ngie/more-tests2/lib/libc/tests/sys/queue_test.c
- copied unchanged from r290915, head/lib/libc/tests/sys/queue_test.c
user/ngie/more-tests2/sys/mips/atheros/qca953x_chip.c
- copied unchanged from r290915, head/sys/mips/atheros/qca953x_chip.c
user/ngie/more-tests2/sys/mips/atheros/qca953x_chip.h
- copied unchanged from r290915, head/sys/mips/atheros/qca953x_chip.h
user/ngie/more-tests2/sys/mips/atheros/qca953xreg.h
- copied unchanged from r290915, head/sys/mips/atheros/qca953xreg.h
user/ngie/more-tests2/tests/sys/kern/pipe/
- copied from r290915, head/tests/sys/kern/pipe/
Deleted:
user/ngie/more-tests2/tools/regression/pipe/
Modified:
user/ngie/more-tests2/contrib/netbsd-tests/kernel/t_lockf.c
user/ngie/more-tests2/contrib/netbsd-tests/kernel/t_mqueue.c
user/ngie/more-tests2/contrib/netbsd-tests/lib/libcrypt/t_crypt.c
user/ngie/more-tests2/etc/mtree/BSD.tests.dist
user/ngie/more-tests2/lib/libc/tests/sys/Makefile
user/ngie/more-tests2/lib/libcrypt/tests/Makefile
user/ngie/more-tests2/sbin/restore/tape.c
user/ngie/more-tests2/share/locale-links/Makefile
user/ngie/more-tests2/sys/mips/atheros/ar71xx_ehci.c
user/ngie/more-tests2/sys/mips/atheros/ar71xx_gpio.c
user/ngie/more-tests2/sys/mips/atheros/ar71xx_setup.c
user/ngie/more-tests2/sys/mips/atheros/ar71xx_setup.h
user/ngie/more-tests2/sys/mips/atheros/files.ar71xx
user/ngie/more-tests2/sys/mips/atheros/if_arge.c
user/ngie/more-tests2/sys/vm/vm_pageout.c
user/ngie/more-tests2/tests/sys/kern/Makefile
user/ngie/more-tests2/usr.sbin/ypbind/ypbind.c
Directory Properties:
user/ngie/more-tests2/ (props changed)
user/ngie/more-tests2/lib/libc/ (props changed)
user/ngie/more-tests2/sbin/ (props changed)
user/ngie/more-tests2/share/ (props changed)
user/ngie/more-tests2/sys/ (props changed)
Modified: user/ngie/more-tests2/contrib/netbsd-tests/kernel/t_lockf.c
==============================================================================
--- user/ngie/more-tests2/contrib/netbsd-tests/kernel/t_lockf.c Mon Nov 16 05:52:04 2015 (r290915)
+++ user/ngie/more-tests2/contrib/netbsd-tests/kernel/t_lockf.c Mon Nov 16 06:02:09 2015 (r290916)
@@ -102,6 +102,9 @@ trylocks(int id)
(void)fcntl(fd, F_SETLKW, &fl);
if (usleep(sleeptime) < 0)
+#if defined(__FreeBSD__)
+ if (errno != EINTR)
+#endif
err(1, "usleep");
}
printf("%d: done\n", id);
Modified: user/ngie/more-tests2/contrib/netbsd-tests/kernel/t_mqueue.c
==============================================================================
--- user/ngie/more-tests2/contrib/netbsd-tests/kernel/t_mqueue.c Mon Nov 16 05:52:04 2015 (r290915)
+++ user/ngie/more-tests2/contrib/netbsd-tests/kernel/t_mqueue.c Mon Nov 16 06:02:09 2015 (r290916)
@@ -6,6 +6,13 @@
* This file is in the Public Domain.
*/
+#ifdef __FreeBSD__
+#include <sys/stat.h>
+#include <fcntl.h>
+
+#include "freebsd_test_suite/macros.h"
+#endif
+
#include <atf-c.h>
#include <stdio.h>
@@ -111,16 +118,28 @@ ATF_TC_BODY(mqueue, tc)
char template[32];
char mq_name[64];
+#ifdef __FreeBSD__
+ ATF_REQUIRE_KERNEL_MODULE("mqueuefs");
+#endif
+
strlcpy(template, "./t_mqueue.XXXXXX", sizeof(template));
tmpdir = mkdtemp(template);
ATF_REQUIRE_MSG(tmpdir != NULL, "mkdtemp failed: %d", errno);
+#ifdef __FreeBSD__
+ snprintf(mq_name, sizeof(mq_name), "/t_mqueue");
+#else
snprintf(mq_name, sizeof(mq_name), "%s/mq", tmpdir);
+#endif
mqd_t mqfd;
mqfd = mq_open(mq_name, O_RDWR | O_CREAT,
S_IRUSR | S_IRWXG | S_IROTH, NULL);
+#ifdef __FreeBSD__
+ ATF_REQUIRE_MSG(mqfd != (mqd_t)-1, "mq_open failed: %d", errno);
+#else
ATF_REQUIRE_MSG(mqfd != -1, "mq_open failed: %d", errno);
+#endif
send_msgs(mqfd);
receive_msgs(mqfd);
Modified: user/ngie/more-tests2/contrib/netbsd-tests/lib/libcrypt/t_crypt.c
==============================================================================
--- user/ngie/more-tests2/contrib/netbsd-tests/lib/libcrypt/t_crypt.c Mon Nov 16 05:52:04 2015 (r290915)
+++ user/ngie/more-tests2/contrib/netbsd-tests/lib/libcrypt/t_crypt.c Mon Nov 16 06:02:09 2015 (r290916)
@@ -124,6 +124,10 @@ ATF_TC_HEAD(crypt_salts, tc)
ATF_TC_BODY(crypt_salts, tc)
{
for (size_t i = 0; tests[i].hash; i++) {
+#if defined(__FreeBSD__)
+ if (22 <= i)
+ atf_tc_expect_fail("Old-style/bad inputs fail on FreeBSD");
+#endif
char *hash = crypt(tests[i].pw, tests[i].hash);
if (!hash) {
ATF_CHECK_MSG(0, "Test %zu NULL\n", i);
Modified: user/ngie/more-tests2/etc/mtree/BSD.tests.dist
==============================================================================
--- user/ngie/more-tests2/etc/mtree/BSD.tests.dist Mon Nov 16 05:52:04 2015 (r290915)
+++ user/ngie/more-tests2/etc/mtree/BSD.tests.dist Mon Nov 16 06:02:09 2015 (r290916)
@@ -377,6 +377,8 @@
..
execve
..
+ pipe
+ ..
..
kqueue
..
Modified: user/ngie/more-tests2/lib/libc/tests/sys/Makefile
==============================================================================
--- user/ngie/more-tests2/lib/libc/tests/sys/Makefile Mon Nov 16 05:52:04 2015 (r290915)
+++ user/ngie/more-tests2/lib/libc/tests/sys/Makefile Mon Nov 16 06:02:09 2015 (r290916)
@@ -2,6 +2,8 @@
.include <bsd.own.mk>
+ATF_TESTS_C+= queue_test
+
# TODO: clone, lwp_create, lwp_ctl, posix_fadvise, recvmmsg,
# swapcontext
NETBSD_ATF_TESTS_C+= access_test
Copied: user/ngie/more-tests2/lib/libc/tests/sys/queue_test.c (from r290915, head/lib/libc/tests/sys/queue_test.c)
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ user/ngie/more-tests2/lib/libc/tests/sys/queue_test.c Mon Nov 16 06:02:09 2015 (r290916, copy of r290915, head/lib/libc/tests/sys/queue_test.c)
@@ -0,0 +1,237 @@
+/*-
+ * Copyright (c) 2015 EMC Corp.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD$");
+
+#include <sys/queue.h>
+#include <stdio.h>
+#include <stdlib.h>
+
+#include <atf-c.h>
+
+ATF_TC(slist_test);
+ATF_TC_HEAD(slist_test, tc)
+{
+
+ atf_tc_set_md_var(tc, "descr", "SLIST macro feature tests");
+}
+
+ATF_TC_BODY(slist_test, tc)
+{
+ SLIST_HEAD(stailhead, entry) head = SLIST_HEAD_INITIALIZER(head);
+ struct entry {
+ SLIST_ENTRY(entry) entries;
+ int i;
+ } *n1, *n2, *n3, *np;
+ int i, j, length;
+
+ SLIST_INIT(&head);
+
+ printf("Ensuring SLIST_EMPTY works\n");
+
+ ATF_REQUIRE(SLIST_EMPTY(&head));
+
+ i = length = 0;
+
+ SLIST_FOREACH(np, &head, entries) {
+ length++;
+ }
+ ATF_REQUIRE_EQ(length, 0);
+
+ printf("Ensuring SLIST_INSERT_HEAD works\n");
+
+ n1 = malloc(sizeof(struct entry));
+ ATF_REQUIRE(n1 != NULL);
+ n1->i = i++;
+
+ SLIST_INSERT_HEAD(&head, n1, entries);
+
+ printf("Ensuring SLIST_FIRST returns element 1\n");
+ ATF_REQUIRE_EQ(SLIST_FIRST(&head), n1);
+
+ j = length = 0;
+ SLIST_FOREACH(np, &head, entries) {
+ ATF_REQUIRE_EQ_MSG(np->i, j,
+ "%d (entry counter) != %d (counter)", np->i, j);
+ j++;
+ length++;
+ }
+ ATF_REQUIRE_EQ(length, 1);
+
+ printf("Ensuring SLIST_INSERT_AFTER works\n");
+
+ n2 = malloc(sizeof(struct entry));
+ ATF_REQUIRE(n2 != NULL);
+ n2->i = i++;
+
+ SLIST_INSERT_AFTER(n1, n2, entries);
+
+ n3 = malloc(sizeof(struct entry));
+ ATF_REQUIRE(n3 != NULL);
+ n3->i = i++;
+
+ SLIST_INSERT_AFTER(n2, n3, entries);
+
+ j = length = 0;
+ SLIST_FOREACH(np, &head, entries) {
+ ATF_REQUIRE_EQ_MSG(np->i, j,
+ "%d (entry counter) != %d (counter)", np->i, j);
+ j++;
+ length++;
+ }
+ ATF_REQUIRE_EQ(length, 3);
+
+ printf("Ensuring SLIST_REMOVE_HEAD works\n");
+
+ printf("Ensuring SLIST_FIRST returns element 1\n");
+ ATF_REQUIRE_EQ(SLIST_FIRST(&head), n1);
+
+ SLIST_REMOVE_HEAD(&head, entries);
+
+ printf("Ensuring SLIST_FIRST now returns element 2\n");
+ ATF_REQUIRE_EQ(SLIST_FIRST(&head), n2);
+
+ j = 1; /* Starting point's 1 this time */
+ length = 0;
+ SLIST_FOREACH(np, &head, entries) {
+ ATF_REQUIRE_EQ_MSG(np->i, j,
+ "%d (entry counter) != %d (counter)", np->i, j);
+ j++;
+ length++;
+ }
+ ATF_REQUIRE_EQ(length, 2);
+
+ printf("Ensuring SLIST_REMOVE_AFTER works by removing the tail\n");
+
+ SLIST_REMOVE_AFTER(n2, entries);
+
+ j = 1; /* Starting point's 1 this time */
+ length = 0;
+ SLIST_FOREACH(np, &head, entries) {
+ ATF_REQUIRE_EQ_MSG(np->i, j,
+ "%d (entry counter) != %d (counter)", np->i, j);
+ j++;
+ length++;
+ }
+ ATF_REQUIRE_EQ(length, 1);
+
+ printf("Ensuring SLIST_FIRST returns element 2\n");
+ ATF_REQUIRE_EQ(SLIST_FIRST(&head), n2);
+
+}
+
+ATF_TC(stailq_test);
+ATF_TC_HEAD(stailq_test, tc)
+{
+
+ atf_tc_set_md_var(tc, "descr", "STAILQ macro feature tests");
+}
+
+ATF_TC_BODY(stailq_test, tc)
+{
+ STAILQ_HEAD(stailhead, entry) head = STAILQ_HEAD_INITIALIZER(head);
+ struct entry {
+ STAILQ_ENTRY(entry) entries;
+ int i;
+ } *n1, *n2, *n3, *np;
+ int i, j, length;
+
+ printf("Ensuring empty STAILQs are treated properly\n");
+ STAILQ_INIT(&head);
+ ATF_REQUIRE(STAILQ_EMPTY(&head));
+
+ i = length = 0;
+
+ STAILQ_FOREACH(np, &head, entries) {
+ length++;
+ }
+ ATF_REQUIRE_EQ(length, 0);
+
+ printf("Ensuring STAILQ_INSERT_HEAD works\n");
+
+ n1 = malloc(sizeof(struct entry));
+ ATF_REQUIRE(n1 != NULL);
+ n1->i = i++;
+
+ STAILQ_INSERT_HEAD(&head, n1, entries);
+
+ j = length = 0;
+ STAILQ_FOREACH(np, &head, entries) {
+ ATF_REQUIRE_EQ_MSG(np->i, j,
+ "%d (entry counter) != %d (counter)", np->i, j);
+ j++;
+ length++;
+ }
+ ATF_REQUIRE_EQ(length, 1);
+
+ printf("Ensuring STAILQ_INSERT_TAIL works\n");
+
+ n2 = malloc(sizeof(struct entry));
+ ATF_REQUIRE(n2 != NULL);
+ n2->i = i++;
+
+ STAILQ_INSERT_TAIL(&head, n2, entries);
+
+ n3 = malloc(sizeof(struct entry));
+ ATF_REQUIRE(n3 != NULL);
+ n3->i = i++;
+
+ STAILQ_INSERT_TAIL(&head, n3, entries);
+
+ j = length = 0;
+ STAILQ_FOREACH(np, &head, entries) {
+ ATF_REQUIRE_EQ_MSG(np->i, j,
+ "%d (entry counter) != %d (counter)", np->i, j);
+ j++;
+ length++;
+ }
+ ATF_REQUIRE_EQ(length, 3);
+
+ printf("Ensuring STAILQ_REMOVE_HEAD works\n");
+
+ STAILQ_REMOVE_HEAD(&head, entries);
+
+ j = 1; /* Starting point's 1 this time */
+ length = 0;
+ STAILQ_FOREACH(np, &head, entries) {
+ ATF_REQUIRE_EQ_MSG(np->i, j,
+ "%d (entry counter) != %d (counter)", np->i, j);
+ j++;
+ length++;
+ }
+ ATF_REQUIRE_EQ(length, 2);
+
+}
+
+ATF_TP_ADD_TCS(tp)
+{
+
+ ATF_TP_ADD_TC(tp, slist_test);
+ ATF_TP_ADD_TC(tp, stailq_test);
+
+ return (atf_no_error());
+}
Modified: user/ngie/more-tests2/lib/libcrypt/tests/Makefile
==============================================================================
--- user/ngie/more-tests2/lib/libcrypt/tests/Makefile Mon Nov 16 05:52:04 2015 (r290915)
+++ user/ngie/more-tests2/lib/libcrypt/tests/Makefile Mon Nov 16 06:02:09 2015 (r290916)
@@ -1,10 +1,12 @@
# $FreeBSD$
-# exercise libcrypt
+ATF_TESTS_C+= crypt_tests
-ATF_TESTS_C= crypt_tests
+NETBSD_ATF_TESTS_C+= crypt_test
CFLAGS+= -I${.CURDIR:H}
LIBADD= crypt
+.include <netbsd-tests.test.mk>
+
.include <bsd.test.mk>
Modified: user/ngie/more-tests2/sbin/restore/tape.c
==============================================================================
--- user/ngie/more-tests2/sbin/restore/tape.c Mon Nov 16 05:52:04 2015 (r290915)
+++ user/ngie/more-tests2/sbin/restore/tape.c Mon Nov 16 06:02:09 2015 (r290916)
@@ -107,6 +107,7 @@ static char *setupextattr(int);
static void xtrattr(char *, long);
static void set_extattr_link(char *, void *, int);
static void set_extattr_fd(int, char *, void *, int);
+static void skiphole(void (*)(char *, long), long *);
static int gethead(struct s_spcl *);
static void readtape(char *);
static void setdumpnum(void);
@@ -927,6 +928,20 @@ skipfile(void)
}
/*
+ * Skip a hole in an output file
+ */
+static void
+skiphole(void (*skip)(char *, long), long *seekpos)
+{
+ char buf[MAXBSIZE];
+
+ if (*seekpos > 0) {
+ (*skip)(buf, *seekpos);
+ *seekpos = 0;
+ }
+}
+
+/*
* Extract a file from the tape.
* When an allocated block is found it is passed to the fill function;
* when an unallocated block (hole) is found, a zeroed buffer is passed
@@ -938,14 +953,15 @@ getfile(void (*datafill)(char *, long),
{
int i;
off_t size;
+ long seekpos;
int curblk, attrsize;
void (*fillit)(char *, long);
- static char clearedbuf[MAXBSIZE];
char buf[MAXBSIZE / TP_BSIZE][TP_BSIZE];
char junk[TP_BSIZE];
curblk = 0;
size = spcl.c_size;
+ seekpos = 0;
attrsize = spcl.c_extsize;
if (spcl.c_type == TS_END)
panic("ran off end of tape\n");
@@ -974,22 +990,30 @@ loop:
if (readmapflag || spcl.c_addr[i]) {
readtape(&buf[curblk++][0]);
if (curblk == fssize / TP_BSIZE) {
+ skiphole(skip, &seekpos);
(*fillit)((char *)buf, (long)(size > TP_BSIZE ?
fssize : (curblk - 1) * TP_BSIZE + size));
curblk = 0;
}
} else {
if (curblk > 0) {
+ skiphole(skip, &seekpos);
(*fillit)((char *)buf, (long)(size > TP_BSIZE ?
curblk * TP_BSIZE :
(curblk - 1) * TP_BSIZE + size));
curblk = 0;
}
- (*skip)(clearedbuf, (long)(size > TP_BSIZE ?
- TP_BSIZE : size));
+ /*
+ * We have a block of a hole. Don't skip it
+ * now, because there may be next adjacent
+ * block of the hole in the file. Postpone the
+ * seek until next file write.
+ */
+ seekpos += (long)(size > TP_BSIZE ? TP_BSIZE : size);
}
if ((size -= TP_BSIZE) <= 0) {
if (size > -TP_BSIZE && curblk > 0) {
+ skiphole(skip, &seekpos);
(*fillit)((char *)buf,
(long)((curblk * TP_BSIZE) + size));
curblk = 0;
Modified: user/ngie/more-tests2/share/locale-links/Makefile
==============================================================================
--- user/ngie/more-tests2/share/locale-links/Makefile Mon Nov 16 05:52:04 2015 (r290915)
+++ user/ngie/more-tests2/share/locale-links/Makefile Mon Nov 16 06:02:09 2015 (r290916)
@@ -15,7 +15,7 @@ ALIASES= zh_Hans_CN.GB18030 zh_CN.GB1803
.for from to in ${ALIASES}
.for f in ${LC_FILES}
-SYMLINKS+= ${from}/${f} ${LOCALEDIR}/${to}/${f}
+SYMLINKS+= ../${from}/${f} ${LOCALEDIR}/${to}/${f}
.endfor
.endfor
Modified: user/ngie/more-tests2/sys/mips/atheros/ar71xx_ehci.c
==============================================================================
--- user/ngie/more-tests2/sys/mips/atheros/ar71xx_ehci.c Mon Nov 16 05:52:04 2015 (r290915)
+++ user/ngie/more-tests2/sys/mips/atheros/ar71xx_ehci.c Mon Nov 16 06:02:09 2015 (r290916)
@@ -173,6 +173,8 @@ ar71xx_ehci_attach(device_t self)
case AR71XX_SOC_AR9341:
case AR71XX_SOC_AR9342:
case AR71XX_SOC_AR9344:
+ case AR71XX_SOC_QCA9533:
+ case AR71XX_SOC_QCA9533_V2:
case AR71XX_SOC_QCA9556:
case AR71XX_SOC_QCA9558:
sc->sc_flags |= EHCI_SCFLG_TT | EHCI_SCFLG_NORESTERM;
Modified: user/ngie/more-tests2/sys/mips/atheros/ar71xx_gpio.c
==============================================================================
--- user/ngie/more-tests2/sys/mips/atheros/ar71xx_gpio.c Mon Nov 16 05:52:04 2015 (r290915)
+++ user/ngie/more-tests2/sys/mips/atheros/ar71xx_gpio.c Mon Nov 16 06:02:09 2015 (r290916)
@@ -54,6 +54,7 @@ __FBSDID("$FreeBSD$");
#include <dev/gpio/gpiobusvar.h>
#include <mips/atheros/ar933xreg.h>
#include <mips/atheros/ar934xreg.h>
+#include <mips/atheros/qca953xreg.h>
#include <mips/atheros/qca955xreg.h>
#include "gpio_if.h"
@@ -102,9 +103,15 @@ static int ar71xx_gpio_pin_toggle(device
static void
ar71xx_gpio_function_enable(struct ar71xx_gpio_softc *sc, uint32_t mask)
{
+
+ /*
+ * XXX TODO: refactor this out into a per-chipset method.
+ */
if (ar71xx_soc == AR71XX_SOC_AR9341 ||
ar71xx_soc == AR71XX_SOC_AR9342 ||
ar71xx_soc == AR71XX_SOC_AR9344 ||
+ ar71xx_soc == AR71XX_SOC_QCA9533 ||
+ ar71xx_soc == AR71XX_SOC_QCA9533_V2 ||
ar71xx_soc == AR71XX_SOC_QCA9556 ||
ar71xx_soc == AR71XX_SOC_QCA9558)
GPIO_SET_BITS(sc, AR934X_GPIO_REG_FUNC, mask);
@@ -115,9 +122,15 @@ ar71xx_gpio_function_enable(struct ar71x
static void
ar71xx_gpio_function_disable(struct ar71xx_gpio_softc *sc, uint32_t mask)
{
+
+ /*
+ * XXX TODO: refactor this out into a per-chipset method.
+ */
if (ar71xx_soc == AR71XX_SOC_AR9341 ||
ar71xx_soc == AR71XX_SOC_AR9342 ||
ar71xx_soc == AR71XX_SOC_AR9344 ||
+ ar71xx_soc == AR71XX_SOC_QCA9533 ||
+ ar71xx_soc == AR71XX_SOC_QCA9533_V2 ||
ar71xx_soc == AR71XX_SOC_QCA9556 ||
ar71xx_soc == AR71XX_SOC_QCA9558)
GPIO_CLEAR_BITS(sc, AR934X_GPIO_REG_FUNC, mask);
@@ -182,6 +195,10 @@ ar71xx_gpio_pin_max(device_t dev, int *m
case AR71XX_SOC_AR9344:
*maxpin = AR934X_GPIO_COUNT - 1;
break;
+ case AR71XX_SOC_QCA9533:
+ case AR71XX_SOC_QCA9533_V2:
+ *maxpin = QCA953X_GPIO_COUNT - 1;
+ break;
case AR71XX_SOC_QCA9556:
case AR71XX_SOC_QCA9558:
*maxpin = QCA955X_GPIO_COUNT - 1;
Modified: user/ngie/more-tests2/sys/mips/atheros/ar71xx_setup.c
==============================================================================
--- user/ngie/more-tests2/sys/mips/atheros/ar71xx_setup.c Mon Nov 16 05:52:04 2015 (r290915)
+++ user/ngie/more-tests2/sys/mips/atheros/ar71xx_setup.c Mon Nov 16 06:02:09 2015 (r290916)
@@ -55,6 +55,7 @@ __FBSDID("$FreeBSD$");
#include <mips/atheros/ar933xreg.h>
#include <mips/atheros/ar934xreg.h>
#include <mips/atheros/qca955xreg.h>
+#include <mips/atheros/qca953xreg.h>
#include <mips/atheros/ar71xx_setup.h>
@@ -65,6 +66,7 @@ __FBSDID("$FreeBSD$");
#include <mips/atheros/ar91xx_chip.h>
#include <mips/atheros/ar933x_chip.h>
#include <mips/atheros/ar934x_chip.h>
+#include <mips/atheros/qca953x_chip.h>
#include <mips/atheros/qca955x_chip.h>
#define AR71XX_SYS_TYPE_LEN 128
@@ -186,6 +188,22 @@ ar71xx_detect_sys_type(void)
ar71xx_cpu_ops = &ar934x_chip_def;
break;
+ case REV_ID_MAJOR_QCA9533:
+ minor = 0;
+ rev = (id & QCA953X_REV_ID_REVISION_MASK);
+ chip = "9533";
+ ar71xx_soc = AR71XX_SOC_QCA9533;
+ ar71xx_cpu_ops = &qca953x_chip_def;
+ break;
+
+ case REV_ID_MAJOR_QCA9533_V2:
+ minor = 0;
+ rev = (id & QCA953X_REV_ID_REVISION_MASK);
+ chip = "9533v2";
+ ar71xx_soc = AR71XX_SOC_QCA9533_V2;
+ ar71xx_cpu_ops = &qca953x_chip_def;
+ break;
+
case REV_ID_MAJOR_QCA9556:
minor = 0;
rev = (id & QCA955X_REV_ID_REVISION_MASK);
Modified: user/ngie/more-tests2/sys/mips/atheros/ar71xx_setup.h
==============================================================================
--- user/ngie/more-tests2/sys/mips/atheros/ar71xx_setup.h Mon Nov 16 05:52:04 2015 (r290915)
+++ user/ngie/more-tests2/sys/mips/atheros/ar71xx_setup.h Mon Nov 16 06:02:09 2015 (r290916)
@@ -46,6 +46,8 @@ enum ar71xx_soc_type {
AR71XX_SOC_AR9344,
AR71XX_SOC_QCA9556,
AR71XX_SOC_QCA9558,
+ AR71XX_SOC_QCA9533,
+ AR71XX_SOC_QCA9533_V2,
};
extern enum ar71xx_soc_type ar71xx_soc;
Modified: user/ngie/more-tests2/sys/mips/atheros/files.ar71xx
==============================================================================
--- user/ngie/more-tests2/sys/mips/atheros/files.ar71xx Mon Nov 16 05:52:04 2015 (r290915)
+++ user/ngie/more-tests2/sys/mips/atheros/files.ar71xx Mon Nov 16 06:02:09 2015 (r290916)
@@ -27,6 +27,7 @@ mips/atheros/ar724x_chip.c standard
mips/atheros/ar91xx_chip.c standard
mips/atheros/ar933x_chip.c standard
mips/atheros/ar934x_chip.c standard
+mips/atheros/qca953x_chip.c standard
mips/atheros/qca955x_chip.c standard
mips/atheros/ar71xx_fixup.c optional ar71xx_ath_eeprom
mips/atheros/qca955x_apb.c optional qca955x_apb
Modified: user/ngie/more-tests2/sys/mips/atheros/if_arge.c
==============================================================================
--- user/ngie/more-tests2/sys/mips/atheros/if_arge.c Mon Nov 16 05:52:04 2015 (r290915)
+++ user/ngie/more-tests2/sys/mips/atheros/if_arge.c Mon Nov 16 06:02:09 2015 (r290916)
@@ -94,6 +94,7 @@ MODULE_VERSION(arge, 1);
#include <mips/atheros/ar71xxreg.h>
#include <mips/atheros/ar934xreg.h> /* XXX tsk! */
+#include <mips/atheros/qca953xreg.h> /* XXX tsk! */
#include <mips/atheros/qca955xreg.h> /* XXX tsk! */
#include <mips/atheros/if_argevar.h>
#include <mips/atheros/ar71xx_setup.h>
@@ -399,6 +400,16 @@ arge_reset_mac(struct arge_softc *sc)
reset_reg |= QCA955X_RESET_GE1_MDIO;
}
}
+
+ if (ar71xx_soc == AR71XX_SOC_QCA9533 ||
+ ar71xx_soc == AR71XX_SOC_QCA9533_V2) {
+ if (sc->arge_mac_unit == 0) {
+ reset_reg |= QCA953X_RESET_GE0_MDIO;
+ } else {
+ reset_reg |= QCA953X_RESET_GE1_MDIO;
+ }
+ }
+
ar71xx_device_stop(reset_reg);
DELAY(100);
ar71xx_device_start(reset_reg);
@@ -470,6 +481,8 @@ arge_mdio_get_divider(struct arge_softc
case AR71XX_SOC_AR9341:
case AR71XX_SOC_AR9342:
case AR71XX_SOC_AR9344:
+ case AR71XX_SOC_QCA9533:
+ case AR71XX_SOC_QCA9533_V2:
case AR71XX_SOC_QCA9556:
case AR71XX_SOC_QCA9558:
table = ar933x_mdio_div_table;
@@ -561,6 +574,8 @@ arge_fetch_mdiobus_clock_rate(struct arg
case AR71XX_SOC_AR9341:
case AR71XX_SOC_AR9342:
case AR71XX_SOC_AR9344:
+ case AR71XX_SOC_QCA9533:
+ case AR71XX_SOC_QCA9533_V2:
case AR71XX_SOC_QCA9556:
case AR71XX_SOC_QCA9558:
return (MAC_MII_CFG_CLOCK_DIV_58);
@@ -681,6 +696,8 @@ arge_attach(device_t dev)
case AR71XX_SOC_AR9341:
case AR71XX_SOC_AR9342:
case AR71XX_SOC_AR9344:
+ case AR71XX_SOC_QCA9533:
+ case AR71XX_SOC_QCA9533_V2:
case AR71XX_SOC_QCA9556:
case AR71XX_SOC_QCA9558:
/* Arbitrary alignment */
@@ -904,6 +921,8 @@ arge_attach(device_t dev)
case AR71XX_SOC_AR9341:
case AR71XX_SOC_AR9342:
case AR71XX_SOC_AR9344:
+ case AR71XX_SOC_QCA9533:
+ case AR71XX_SOC_QCA9533_V2:
case AR71XX_SOC_QCA9556:
case AR71XX_SOC_QCA9558:
ARGE_WRITE(sc, AR71XX_MAC_FIFO_CFG1, 0x0010ffff);
@@ -1278,6 +1297,8 @@ arge_set_pll(struct arge_softc *sc, int
case AR71XX_SOC_AR9341:
case AR71XX_SOC_AR9342:
case AR71XX_SOC_AR9344:
+ case AR71XX_SOC_QCA9533:
+ case AR71XX_SOC_QCA9533_V2:
case AR71XX_SOC_QCA9556:
case AR71XX_SOC_QCA9558:
fifo_tx = 0x01f00140;
Copied: user/ngie/more-tests2/sys/mips/atheros/qca953x_chip.c (from r290915, head/sys/mips/atheros/qca953x_chip.c)
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ user/ngie/more-tests2/sys/mips/atheros/qca953x_chip.c Mon Nov 16 06:02:09 2015 (r290916, copy of r290915, head/sys/mips/atheros/qca953x_chip.c)
@@ -0,0 +1,393 @@
+/*-
+ * Copyright (c) 2015 Adrian Chadd <adrian at FreeBSD.org>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD$");
+
+#include "opt_ddb.h"
+
+#include <sys/param.h>
+#include <sys/conf.h>
+#include <sys/kernel.h>
+#include <sys/systm.h>
+#include <sys/bus.h>
+#include <sys/cons.h>
+#include <sys/kdb.h>
+#include <sys/reboot.h>
+
+#include <vm/vm.h>
+#include <vm/vm_page.h>
+
+#include <net/ethernet.h>
+
+#include <machine/clock.h>
+#include <machine/cpu.h>
+#include <machine/cpuregs.h>
+#include <machine/hwfunc.h>
+#include <machine/md_var.h>
+#include <machine/trap.h>
+#include <machine/vmparam.h>
+
+#include <mips/atheros/ar71xxreg.h>
+#include <mips/atheros/qca953xreg.h>
+
+#include <mips/atheros/ar71xx_cpudef.h>
+#include <mips/atheros/ar71xx_setup.h>
+
+#include <mips/atheros/ar71xx_chip.h>
+
+#include <mips/atheros/qca953x_chip.h>
+
+static void
+qca953x_chip_detect_mem_size(void)
+{
+}
+
+static void
+qca953x_chip_detect_sys_frequency(void)
+{
+ unsigned long ref_rate;
+ unsigned long cpu_rate;
+ unsigned long ddr_rate;
+ unsigned long ahb_rate;
+ uint32_t pll, out_div, ref_div, nint, frac, clk_ctrl, postdiv;
+ uint32_t cpu_pll, ddr_pll;
+ uint32_t bootstrap;
+
+ bootstrap = ATH_READ_REG(QCA953X_RESET_REG_BOOTSTRAP);
+ if (bootstrap & QCA953X_BOOTSTRAP_REF_CLK_40)
+ ref_rate = 40 * 1000 * 1000;
+ else
+ ref_rate = 25 * 1000 * 1000;
+
+ pll = ATH_READ_REG(QCA953X_PLL_CPU_CONFIG_REG);
+ out_div = (pll >> QCA953X_PLL_CPU_CONFIG_OUTDIV_SHIFT) &
+ QCA953X_PLL_CPU_CONFIG_OUTDIV_MASK;
+ ref_div = (pll >> QCA953X_PLL_CPU_CONFIG_REFDIV_SHIFT) &
+ QCA953X_PLL_CPU_CONFIG_REFDIV_MASK;
+ nint = (pll >> QCA953X_PLL_CPU_CONFIG_NINT_SHIFT) &
+ QCA953X_PLL_CPU_CONFIG_NINT_MASK;
+ frac = (pll >> QCA953X_PLL_CPU_CONFIG_NFRAC_SHIFT) &
+ QCA953X_PLL_CPU_CONFIG_NFRAC_MASK;
+
+ cpu_pll = nint * ref_rate / ref_div;
+ cpu_pll += frac * (ref_rate >> 6) / ref_div;
+ cpu_pll /= (1 << out_div);
+
+ pll = ATH_READ_REG(QCA953X_PLL_DDR_CONFIG_REG);
+ out_div = (pll >> QCA953X_PLL_DDR_CONFIG_OUTDIV_SHIFT) &
+ QCA953X_PLL_DDR_CONFIG_OUTDIV_MASK;
+ ref_div = (pll >> QCA953X_PLL_DDR_CONFIG_REFDIV_SHIFT) &
+ QCA953X_PLL_DDR_CONFIG_REFDIV_MASK;
+ nint = (pll >> QCA953X_PLL_DDR_CONFIG_NINT_SHIFT) &
+ QCA953X_PLL_DDR_CONFIG_NINT_MASK;
+ frac = (pll >> QCA953X_PLL_DDR_CONFIG_NFRAC_SHIFT) &
+ QCA953X_PLL_DDR_CONFIG_NFRAC_MASK;
+
+ ddr_pll = nint * ref_rate / ref_div;
+ ddr_pll += frac * (ref_rate >> 6) / (ref_div << 4);
+ ddr_pll /= (1 << out_div);
+
+ clk_ctrl = ATH_READ_REG(QCA953X_PLL_CLK_CTRL_REG);
+
+ postdiv = (clk_ctrl >> QCA953X_PLL_CLK_CTRL_CPU_POST_DIV_SHIFT) &
+ QCA953X_PLL_CLK_CTRL_CPU_POST_DIV_MASK;
+
+ if (clk_ctrl & QCA953X_PLL_CLK_CTRL_CPU_PLL_BYPASS)
+ cpu_rate = ref_rate;
+ else if (clk_ctrl & QCA953X_PLL_CLK_CTRL_CPUCLK_FROM_CPUPLL)
+ cpu_rate = cpu_pll / (postdiv + 1);
+ else
+ cpu_rate = ddr_pll / (postdiv + 1);
+
+ postdiv = (clk_ctrl >> QCA953X_PLL_CLK_CTRL_DDR_POST_DIV_SHIFT) &
+ QCA953X_PLL_CLK_CTRL_DDR_POST_DIV_MASK;
+
+ if (clk_ctrl & QCA953X_PLL_CLK_CTRL_DDR_PLL_BYPASS)
+ ddr_rate = ref_rate;
+ else if (clk_ctrl & QCA953X_PLL_CLK_CTRL_DDRCLK_FROM_DDRPLL)
+ ddr_rate = ddr_pll / (postdiv + 1);
+ else
+ ddr_rate = cpu_pll / (postdiv + 1);
+
+ postdiv = (clk_ctrl >> QCA953X_PLL_CLK_CTRL_AHB_POST_DIV_SHIFT) &
+ QCA953X_PLL_CLK_CTRL_AHB_POST_DIV_MASK;
+
+ if (clk_ctrl & QCA953X_PLL_CLK_CTRL_AHB_PLL_BYPASS)
+ ahb_rate = ref_rate;
+ else if (clk_ctrl & QCA953X_PLL_CLK_CTRL_AHBCLK_FROM_DDRPLL)
+ ahb_rate = ddr_pll / (postdiv + 1);
+ else
+ ahb_rate = cpu_pll / (postdiv + 1);
+
+ u_ar71xx_ddr_freq = ddr_rate;
+ u_ar71xx_cpu_freq = cpu_rate;
+ u_ar71xx_ahb_freq = ahb_rate;
+
+ u_ar71xx_wdt_freq = ref_rate;
+ u_ar71xx_uart_freq = ref_rate;
+ u_ar71xx_mdio_freq = ref_rate;
+ u_ar71xx_refclk = ref_rate;
+}
+
+static void
+qca953x_chip_device_stop(uint32_t mask)
+{
+ uint32_t reg;
+
+ reg = ATH_READ_REG(QCA953X_RESET_REG_RESET_MODULE);
+ ATH_WRITE_REG(QCA953X_RESET_REG_RESET_MODULE, reg | mask);
+}
+
+static void
+qca953x_chip_device_start(uint32_t mask)
+{
+ uint32_t reg;
+
+ reg = ATH_READ_REG(QCA953X_RESET_REG_RESET_MODULE);
+ ATH_WRITE_REG(QCA953X_RESET_REG_RESET_MODULE, reg & ~mask);
+}
+
+static int
+qca953x_chip_device_stopped(uint32_t mask)
+{
+ uint32_t reg;
+
+ reg = ATH_READ_REG(QCA953X_RESET_REG_RESET_MODULE);
+ return ((reg & mask) == mask);
+}
+
+static void
+qca953x_chip_set_mii_speed(uint32_t unit, uint32_t speed)
+{
+
+ /* XXX TODO */
+ return;
+}
+
+static void
+qca953x_chip_set_pll_ge(int unit, int speed, uint32_t pll)
+{
+ switch (unit) {
+ case 0:
+ ATH_WRITE_REG(QCA953X_PLL_ETH_XMII_CONTROL_REG, pll);
+ break;
+ case 1:
+ ATH_WRITE_REG(QCA953X_PLL_ETH_SGMII_CONTROL_REG, pll);
+ break;
+ default:
+ printf("%s: invalid PLL set for arge unit: %d\n",
+ __func__, unit);
+ return;
+ }
+}
+
+static void
+qca953x_chip_ddr_flush(ar71xx_flush_ddr_id_t id)
+{
+
+ switch (id) {
+ case AR71XX_CPU_DDR_FLUSH_GE0:
+ ar71xx_ddr_flush(QCA953X_DDR_REG_FLUSH_GE0);
+ break;
+ case AR71XX_CPU_DDR_FLUSH_GE1:
+ ar71xx_ddr_flush(QCA953X_DDR_REG_FLUSH_GE1);
+ break;
+ case AR71XX_CPU_DDR_FLUSH_USB:
+ ar71xx_ddr_flush(QCA953X_DDR_REG_FLUSH_USB);
+ break;
+ case AR71XX_CPU_DDR_FLUSH_PCIE:
+ ar71xx_ddr_flush(QCA953X_DDR_REG_FLUSH_PCIE);
+ break;
+ case AR71XX_CPU_DDR_FLUSH_WMAC:
+ ar71xx_ddr_flush(QCA953X_DDR_REG_FLUSH_WMAC);
+ break;
+ default:
+ printf("%s: invalid flush (%d)\n", __func__, id);
+ }
+}
+
+static uint32_t
+qca953x_chip_get_eth_pll(unsigned int mac, int speed)
+{
+ uint32_t pll;
+
+ switch (speed) {
+ case 10:
+ pll = QCA953X_PLL_VAL_10;
+ break;
+ case 100:
+ pll = QCA953X_PLL_VAL_100;
+ break;
+ case 1000:
+ pll = QCA953X_PLL_VAL_1000;
+ break;
+ default:
+ printf("%s%d: invalid speed %d\n", __func__, mac, speed);
+ pll = 0;
+ }
+ return (pll);
+}
+
+static void
+qca953x_chip_reset_ethernet_switch(void)
+{
+}
+
+static void
+qca953x_configure_gmac(uint32_t gmac_cfg)
+{
+ uint32_t reg;
+
+ reg = ATH_READ_REG(QCA953X_GMAC_REG_ETH_CFG);
+ printf("%s: ETH_CFG=0x%08x\n", __func__, reg);
+ reg &= ~(QCA953X_ETH_CFG_SW_ONLY_MODE |
+ QCA953X_ETH_CFG_SW_PHY_SWAP |
+ QCA953X_ETH_CFG_SW_APB_ACCESS |
+ QCA953X_ETH_CFG_SW_ACC_MSB_FIRST);
+
+ reg |= gmac_cfg;
+ ATH_WRITE_REG(QCA953X_GMAC_REG_ETH_CFG, reg);
+}
+
+static void
+qca953x_chip_init_usb_peripheral(void)
+{
+ uint32_t bootstrap;
+
+ bootstrap = ATH_READ_REG(QCA953X_RESET_REG_BOOTSTRAP);
+
+ ar71xx_device_stop(QCA953X_RESET_USBSUS_OVERRIDE);
+ DELAY(1000);
+
+ ar71xx_device_start(QCA953X_RESET_USB_PHY);
+ DELAY(1000);
+
+ ar71xx_device_start(QCA953X_RESET_USB_PHY_ANALOG);
+ DELAY(1000);
+
+ ar71xx_device_start(QCA953X_RESET_USB_HOST);
+ DELAY(1000);
+}
+
+static void
+qca953x_chip_set_mii_if(uint32_t unit, uint32_t mii_mode)
+{
+
+ /*
+ * XXX !
+ *
+ * Nothing to see here; although gmac0 can have its
+ * MII configuration changed, the register values
+ * are slightly different.
+ */
+}
+
+/*
+ * XXX TODO: fetch default MII divider configuration
+ */
+
+static void
+qca953x_chip_reset_wmac(void)
+{
+
+ /* XXX TODO */
+}
+
+static void
+qca953x_chip_init_gmac(void)
+{
+ long gmac_cfg;
+
+ if (resource_long_value("qca953x_gmac", 0, "gmac_cfg",
+ &gmac_cfg) == 0) {
+ printf("%s: gmac_cfg=0x%08lx\n",
+ __func__,
+ (long) gmac_cfg);
+ qca953x_configure_gmac((uint32_t) gmac_cfg);
+ }
+}
+
+/*
+ * Reset the NAND Flash Controller.
+ *
+ * + active=1 means "make it active".
+ * + active=0 means "make it inactive".
+ */
+static void
+qca953x_chip_reset_nfc(int active)
+{
+}
+
+/*
+ * Configure the GPIO output mux setup.
+ *
+ * The QCA953x has an output mux which allowed
+ * certain functions to be configured on any pin.
+ * Specifically, the switch PHY link LEDs and
+ * WMAC external RX LNA switches are not limited to
+ * a specific GPIO pin.
+ */
+static void
+qca953x_chip_gpio_output_configure(int gpio, uint8_t func)
+{
+ uint32_t reg, s;
+ uint32_t t;
*** DIFF OUTPUT TRUNCATED AT 1000 LINES ***
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