svn commit: r257479 - in user/andre/mbuf_staging: arm/freescale/imx dev/usb dev/usb/serial ia64/ia64 ia64/include kern net powerpc/pseries
Andre Oppermann
andre at FreeBSD.org
Thu Oct 31 23:39:33 UTC 2013
Author: andre
Date: Thu Oct 31 23:39:31 2013
New Revision: 257479
URL: http://svnweb.freebsd.org/changeset/base/257479
Log:
IFC @257478.
Added:
user/andre/mbuf_staging/arm/freescale/imx/imx6_anatop.c
- copied unchanged from r257478, head/sys/arm/freescale/imx/imx6_anatop.c
user/andre/mbuf_staging/arm/freescale/imx/imx6_anatopreg.h
- copied unchanged from r257478, head/sys/arm/freescale/imx/imx6_anatopreg.h
user/andre/mbuf_staging/arm/freescale/imx/imx6_anatopvar.h
- copied unchanged from r257478, head/sys/arm/freescale/imx/imx6_anatopvar.h
user/andre/mbuf_staging/arm/freescale/imx/imx6_ccm.c
- copied unchanged from r257478, head/sys/arm/freescale/imx/imx6_ccm.c
user/andre/mbuf_staging/arm/freescale/imx/imx6_ccmreg.h
- copied unchanged from r257478, head/sys/arm/freescale/imx/imx6_ccmreg.h
user/andre/mbuf_staging/arm/freescale/imx/imx6_usbphy.c
- copied unchanged from r257478, head/sys/arm/freescale/imx/imx6_usbphy.c
user/andre/mbuf_staging/arm/freescale/imx/imx_sdhci.c
- copied unchanged from r257478, head/sys/arm/freescale/imx/imx_sdhci.c
Modified:
user/andre/mbuf_staging/arm/freescale/imx/imx_machdep.h
user/andre/mbuf_staging/dev/usb/serial/umodem.c
user/andre/mbuf_staging/dev/usb/usb.h
user/andre/mbuf_staging/ia64/ia64/mp_machdep.c
user/andre/mbuf_staging/ia64/ia64/pmap.c
user/andre/mbuf_staging/ia64/include/pmap.h
user/andre/mbuf_staging/kern/uipc_socket.c
user/andre/mbuf_staging/net/if_var.h
user/andre/mbuf_staging/powerpc/pseries/mmu_phyp.c
Directory Properties:
user/andre/mbuf_staging/ (props changed)
Copied: user/andre/mbuf_staging/arm/freescale/imx/imx6_anatop.c (from r257478, head/sys/arm/freescale/imx/imx6_anatop.c)
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ user/andre/mbuf_staging/arm/freescale/imx/imx6_anatop.c Thu Oct 31 23:39:31 2013 (r257479, copy of r257478, head/sys/arm/freescale/imx/imx6_anatop.c)
@@ -0,0 +1,155 @@
+/*-
+ * Copyright (c) 2013 Ian Lepore <ian at freebsd.org>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD$");
+
+/*
+ * Analog PLL and power regulator driver for Freescale i.MX6 family of SoCs.
+ *
+ * We don't really do anything with analog PLLs, but the registers for
+ * controlling them belong to the same block as the power regulator registers.
+ * Since the newbus hierarchy makes it hard for anyone other than us to get at
+ * them, we just export a couple public functions to allow the imx6 CCM clock
+ * driver to read and write those registers.
+ *
+ * We also don't do anything about power regulation yet, but when the need
+ * arises, this would be the place for that code to live.
+ *
+ * I have no idea where the "anatop" name comes from. It's in the standard DTS
+ * source describing i.MX6 SoCs, and in the linux and u-boot code which comes
+ * from Freescale, but it's not in the SoC manual.
+ */
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/kernel.h>
+#include <sys/module.h>
+#include <sys/bus.h>
+#include <sys/rman.h>
+
+#include <dev/ofw/ofw_bus.h>
+#include <dev/ofw/ofw_bus_subr.h>
+
+#include <machine/bus.h>
+
+#include <arm/freescale/imx/imx6_anatopreg.h>
+#include <arm/freescale/imx/imx6_anatopvar.h>
+
+struct imx6_anatop_softc {
+ device_t dev;
+ struct resource *mem_res;
+};
+
+static struct imx6_anatop_softc *imx6_anatop_sc;
+
+uint32_t
+imx6_anatop_read_4(bus_size_t offset)
+{
+
+ return (bus_read_4(imx6_anatop_sc->mem_res, offset));
+}
+
+void
+imx6_anatop_write_4(bus_size_t offset, uint32_t value)
+{
+
+ bus_write_4(imx6_anatop_sc->mem_res, offset, value);
+}
+
+static int
+imx6_anatop_detach(device_t dev)
+{
+ struct imx6_anatop_softc *sc;
+
+ sc = device_get_softc(dev);
+
+ if (sc->mem_res != NULL)
+ bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->mem_res);
+
+ return (0);
+}
+
+static int
+imx6_anatop_attach(device_t dev)
+{
+ struct imx6_anatop_softc *sc;
+ int err, rid;
+
+ sc = device_get_softc(dev);
+
+ /* Allocate bus_space resources. */
+ rid = 0;
+ sc->mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
+ RF_ACTIVE);
+ if (sc->mem_res == NULL) {
+ device_printf(dev, "Cannot allocate memory resources\n");
+ err = ENXIO;
+ goto out;
+ }
+
+ imx6_anatop_sc = sc;
+ err = 0;
+
+out:
+
+ if (err != 0)
+ imx6_anatop_detach(dev);
+
+ return (err);
+}
+
+static int
+imx6_anatop_probe(device_t dev)
+{
+
+ if (ofw_bus_is_compatible(dev, "fsl,imx6q-anatop") == 0)
+ return (ENXIO);
+
+ device_set_desc(dev, "Freescale i.MX6 Analog PLLs and Power");
+
+ return (BUS_PROBE_DEFAULT);
+}
+
+static device_method_t imx6_anatop_methods[] = {
+ /* Device interface */
+ DEVMETHOD(device_probe, imx6_anatop_probe),
+ DEVMETHOD(device_attach, imx6_anatop_attach),
+ DEVMETHOD(device_detach, imx6_anatop_detach),
+
+ DEVMETHOD_END
+};
+
+static driver_t imx6_anatop_driver = {
+ "imx6_anatop",
+ imx6_anatop_methods,
+ sizeof(struct imx6_anatop_softc)
+};
+
+static devclass_t imx6_anatop_devclass;
+
+DRIVER_MODULE(imx6_anatop, simplebus, imx6_anatop_driver, imx6_anatop_devclass, 0, 0);
+
Copied: user/andre/mbuf_staging/arm/freescale/imx/imx6_anatopreg.h (from r257478, head/sys/arm/freescale/imx/imx6_anatopreg.h)
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ user/andre/mbuf_staging/arm/freescale/imx/imx6_anatopreg.h Thu Oct 31 23:39:31 2013 (r257479, copy of r257478, head/sys/arm/freescale/imx/imx6_anatopreg.h)
@@ -0,0 +1,130 @@
+/*-
+ * Copyright (c) 2013 Ian Lepore <ian at freebsd.org>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ */
+
+#ifndef IMX6_ANATOPREG_H
+#define IMX6_ANATOPREG_H
+
+#define IMX6_ANALOG_CCM_PLL_ARM 0x000
+#define IMX6_ANALOG_CCM_PLL_ARM_SET 0x004
+#define IMX6_ANALOG_CCM_PLL_ARM_CLR 0x008
+#define IMX6_ANALOG_CCM_PLL_ARM_TOG 0x00C
+#define IMX6_ANALOG_CCM_PLL_USB1 0x010
+#define IMX6_ANALOG_CCM_PLL_USB1_SET 0x014
+#define IMX6_ANALOG_CCM_PLL_USB1_CLR 0x018
+#define IMX6_ANALOG_CCM_PLL_USB1_TOG 0x01C
+#define IMX6_ANALOG_CCM_PLL_USB_LOCK (1 << 31)
+#define IMX6_ANALOG_CCM_PLL_USB_BYPASS (1 << 16)
+#define IMX6_ANALOG_CCM_PLL_USB_ENABLE (1 << 13)
+#define IMX6_ANALOG_CCM_PLL_USB_POWER (1 << 12)
+#define IMX6_ANALOG_CCM_PLL_USB_EN_USB_CLKS (1 << 6)
+#define IMX6_ANALOG_CCM_PLL_USB2 0x020
+#define IMX6_ANALOG_CCM_PLL_USB2_SET 0x024
+#define IMX6_ANALOG_CCM_PLL_USB2_CLR 0x028
+#define IMX6_ANALOG_CCM_PLL_USB2_TOG 0x02C
+#define IMX6_ANALOG_CCM_PLL_SYS 0x030
+#define IMX6_ANALOG_CCM_PLL_SYS_SET 0x034
+#define IMX6_ANALOG_CCM_PLL_SYS_CLR 0x038
+#define IMX6_ANALOG_CCM_PLL_SYS_TOG 0x03C
+#define IMX6_ANALOG_CCM_PLL_SYS_SS 0x040
+#define IMX6_ANALOG_CCM_PLL_SYS_NUM 0x050
+#define IMX6_ANALOG_CCM_PLL_SYS_DENOM 0x060
+#define IMX6_ANALOG_CCM_PLL_AUDIO 0x070
+#define IMX6_ANALOG_CCM_PLL_AUDIO_SET 0x074
+#define IMX6_ANALOG_CCM_PLL_AUDIO_CLR 0x078
+#define IMX6_ANALOG_CCM_PLL_AUDIO_TOG 0x07C
+#define IMX6_ANALOG_CCM_PLL_AUDIO_NUM 0x080
+#define IMX6_ANALOG_CCM_PLL_AUDIO_DENOM 0x090
+#define IMX6_ANALOG_CCM_PLL_VIDEO 0x0A0
+#define IMX6_ANALOG_CCM_PLL_VIDEO_SET 0x0A4
+#define IMX6_ANALOG_CCM_PLL_VIDEO_CLR 0x0A8
+#define IMX6_ANALOG_CCM_PLL_VIDEO_TOG 0x0AC
+#define IMX6_ANALOG_CCM_PLL_VIDEO_NUM 0x0B0
+#define IMX6_ANALOG_CCM_PLL_VIDEO_DENOM 0x0C0
+#define IMX6_ANALOG_CCM_PLL_MLB 0x0D0
+#define IMX6_ANALOG_CCM_PLL_MLB_SET 0x0D4
+#define IMX6_ANALOG_CCM_PLL_MLB_CLR 0x0D8
+#define IMX6_ANALOG_CCM_PLL_MLB_TOG 0x0DC
+#define IMX6_ANALOG_CCM_PLL_ENET 0x0E0
+#define IMX6_ANALOG_CCM_PLL_ENET_SET 0x0E4
+#define IMX6_ANALOG_CCM_PLL_ENET_CLR 0x0E8
+#define IMX6_ANALOG_CCM_PLL_ENET_TOG 0x0EC
+#define IMX6_ANALOG_CCM_PFD_480 0x0F0
+#define IMX6_ANALOG_CCM_PFD_480_SET 0x0F4
+#define IMX6_ANALOG_CCM_PFD_480_CLR 0x0F8
+#define IMX6_ANALOG_CCM_PFD_480_TOG 0x0FC
+#define IMX6_ANALOG_CCM_PFD_528 0x100
+#define IMX6_ANALOG_CCM_PFD_528_SET 0x104
+#define IMX6_ANALOG_CCM_PFD_528_CLR 0x108
+#define IMX6_ANALOG_CCM_PFD_528_TOG 0x10C
+#define IMX6_ANALOG_CCM_MISC0 0x150
+#define IMX6_ANALOG_CCM_MISC0_SET 0x154
+#define IMX6_ANALOG_CCM_MISC0_CLR 0x158
+#define IMX6_ANALOG_CCM_MISC0_TOG 0x15C
+#define IMX6_ANALOG_CCM_MISC2 0x170
+#define IMX6_ANALOG_CCM_MISC2_SET 0x174
+#define IMX6_ANALOG_CCM_MISC2_CLR 0x178
+#define IMX6_ANALOG_CCM_MISC2_TOG 0x17C
+
+#define IMX6_ANALOG_USB1_VBUS_DETECT 0x1A0
+#define IMX6_ANALOG_USB1_VBUS_DETECT_SET 0x1A4
+#define IMX6_ANALOG_USB1_VBUS_DETECT_CLR 0x1A8
+#define IMX6_ANALOG_USB1_VBUS_DETECT_TOG 0x1AC
+#define IMX6_ANALOG_USB1_CHRG_DETECT 0x1B0
+#define IMX6_ANALOG_USB1_CHRG_DETECT_SET 0x1B4
+#define IMX6_ANALOG_USB1_CHRG_DETECT_CLR 0x1B8
+#define IMX6_ANALOG_USB1_CHRG_DETECT_TOG 0x1BC
+#define IMX6_ANALOG_USB_CHRG_DETECT_N_ENABLE (1 << 20) /* EN_B */
+#define IMX6_ANALOG_USB_CHRG_DETECT_N_CHK_CHRG (1 << 19) /* CHK_CHRG_B */
+#define IMX6_ANALOG_USB_CHRG_DETECT_CHK_CONTACT (1 << 18)
+#define IMX6_ANALOG_USB1_VBUS_DETECT_STAT 0x1C0
+#define IMX6_ANALOG_USB1_CHRG_DETECT_STAT 0x1D0
+#define IMX6_ANALOG_USB1_MISC 0x1F0
+#define IMX6_ANALOG_USB1_MISC_SET 0x1F4
+#define IMX6_ANALOG_USB1_MISC_CLR 0x1F8
+#define IMX6_ANALOG_USB1_MISC_TOG 0x1FC
+#define IMX6_ANALOG_USB2_VBUS_DETECT 0x200
+#define IMX6_ANALOG_USB2_VBUS_DETECT_SET 0x204
+#define IMX6_ANALOG_USB2_VBUS_DETECT_CLR 0x208
+#define IMX6_ANALOG_USB2_VBUS_DETECT_TOG 0x20C
+#define IMX6_ANALOG_USB2_CHRG_DETECT 0x210
+#define IMX6_ANALOG_USB2_CHRG_DETECT_SET 0x214
+#define IMX6_ANALOG_USB2_CHRG_DETECT_CLR 0x218
+#define IMX6_ANALOG_USB2_CHRG_DETECT_TOG 0x21C
+#define IMX6_ANALOG_USB2_VBUS_DETECT_STAT 0x220
+#define IMX6_ANALOG_USB2_CHRG_DETECT_STAT 0x230
+#define IMX6_ANALOG_USB2_MISC 0x250
+#define IMX6_ANALOG_USB2_MISC_SET 0x254
+#define IMX6_ANALOG_USB2_MISC_CLR 0x258
+#define IMX6_ANALOG_USB2_MISC_TOG 0x25C
+#define IMX6_ANALOG_DIGPROG 0x260
+#define IMX6_ANALOG_DIGPROG_SL 0x280
+#define IMX6_ANALOG_DIGPROG_SOCTYPE_SHIFT 16
+#define IMX6_ANALOG_DIGPROG_SOCTYPE_MASK \
+ (0xff << IMX6_ANALOG_DIGPROG_SOCTYPE_SHIFT)
+
+#endif
Copied: user/andre/mbuf_staging/arm/freescale/imx/imx6_anatopvar.h (from r257478, head/sys/arm/freescale/imx/imx6_anatopvar.h)
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ user/andre/mbuf_staging/arm/freescale/imx/imx6_anatopvar.h Thu Oct 31 23:39:31 2013 (r257479, copy of r257478, head/sys/arm/freescale/imx/imx6_anatopvar.h)
@@ -0,0 +1,43 @@
+/*-
+ * Copyright (c) 2013 Ian Lepore <ian at freebsd.org>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ */
+
+#ifndef IMX6_ANATOPVAR_H
+#define IMX6_ANATOPVAR_H
+
+/*
+ * All registers controlling various analog aspects of the SoC (such as PLLs or
+ * voltage regulators or USB VBUS detection) are gathered together under the
+ * anatop device (because of newbus hierarchical resource management), but other
+ * drivers such as CMM or USBPHY need access to these registers. These
+ * functions let them have at the hardware directly. No effort is made by these
+ * functions to mediate concurrent access.
+ */
+uint32_t imx6_anatop_read_4(bus_size_t _offset);
+void imx6_anatop_write_4(bus_size_t _offset, uint32_t _value);
+
+#endif
Copied: user/andre/mbuf_staging/arm/freescale/imx/imx6_ccm.c (from r257478, head/sys/arm/freescale/imx/imx6_ccm.c)
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ user/andre/mbuf_staging/arm/freescale/imx/imx6_ccm.c Thu Oct 31 23:39:31 2013 (r257479, copy of r257478, head/sys/arm/freescale/imx/imx6_ccm.c)
@@ -0,0 +1,225 @@
+/*-
+ * Copyright (c) 2013 Ian Lepore <ian at freebsd.org>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD$");
+
+/*
+ * Clocks and power control driver for Freescale i.MX6 family of SoCs.
+ */
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/kernel.h>
+#include <sys/module.h>
+#include <sys/bus.h>
+#include <sys/rman.h>
+
+#include <dev/ofw/ofw_bus.h>
+#include <dev/ofw/ofw_bus_subr.h>
+
+#include <machine/bus.h>
+
+#include <arm/freescale/imx/imx6_anatopreg.h>
+#include <arm/freescale/imx/imx6_anatopvar.h>
+#include <arm/freescale/imx/imx_machdep.h>
+#include <arm/freescale/imx/imx6_ccmreg.h>
+
+
+/* XXX temp kludge for imx51_get_clock. */
+#include <arm/freescale/imx/imx51_ccmvar.h>
+#include <arm/freescale/imx/imx51_ccmreg.h>
+
+struct ccm_softc {
+ device_t dev;
+ struct resource *mem_res;
+};
+
+static struct ccm_softc *ccm_sc;
+
+static inline uint32_t
+RD4(struct ccm_softc *sc, bus_size_t off)
+{
+
+ return (bus_read_4(sc->mem_res, off));
+}
+
+static inline void
+WR4(struct ccm_softc *sc, bus_size_t off, uint32_t val)
+{
+
+ bus_write_4(sc->mem_res, off, val);
+}
+
+static int
+ccm_detach(device_t dev)
+{
+ struct ccm_softc *sc;
+
+ sc = device_get_softc(dev);
+
+ if (sc->mem_res != NULL)
+ bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->mem_res);
+
+ return (0);
+}
+
+static int
+ccm_attach(device_t dev)
+{
+ struct ccm_softc *sc;
+ int err, rid;
+
+ sc = device_get_softc(dev);
+ err = 0;
+
+ /* Allocate bus_space resources. */
+ rid = 0;
+ sc->mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
+ RF_ACTIVE);
+ if (sc->mem_res == NULL) {
+ device_printf(dev, "Cannot allocate memory resources\n");
+ err = ENXIO;
+ goto out;
+ }
+
+ ccm_sc = sc;
+ err = 0;
+
+out:
+
+ if (err != 0)
+ ccm_detach(dev);
+
+ return (err);
+}
+
+static int
+ccm_probe(device_t dev)
+{
+
+ if (ofw_bus_is_compatible(dev, "fsl,imx6q-ccm") == 0)
+ return (ENXIO);
+
+ device_set_desc(dev, "Freescale i.MX6 Clock Control Module");
+
+ return (BUS_PROBE_DEFAULT);
+}
+
+void
+imx_ccm_usb_enable(device_t _usbdev)
+{
+
+ /*
+ * For imx6, the USBOH3 clock gate is bits 0-1 of CCGR6, so no need for
+ * shifting and masking here, just set the low-order two bits to ALWAYS.
+ */
+ WR4(ccm_sc, CCM_CCGR6, RD4(ccm_sc, CCM_CCGR6) | CCGR_CLK_MODE_ALWAYS);
+}
+
+void
+imx_ccm_usbphy_enable(device_t _phydev)
+{
+ /*
+ * XXX Which unit?
+ * Right now it's not clear how to figure from fdt data which phy unit
+ * we're supposed to operate on. Until this is worked out, just enable
+ * both PHYs.
+ */
+#if 0
+ int phy_num, regoff;
+
+ phy_num = 0; /* XXX */
+
+ switch (phy_num) {
+ case 0:
+ regoff = 0;
+ break;
+ case 1:
+ regoff = 0x10;
+ break;
+ default:
+ device_printf(ccm_sc->dev, "Bad PHY number %u,\n",
+ phy_num);
+ return;
+ }
+
+ imx6_anatop_write_4(IMX6_ANALOG_CCM_PLL_USB1 + regoff,
+ IMX6_ANALOG_CCM_PLL_USB_ENABLE |
+ IMX6_ANALOG_CCM_PLL_USB_POWER |
+ IMX6_ANALOG_CCM_PLL_USB_EN_USB_CLKS);
+#else
+ imx6_anatop_write_4(IMX6_ANALOG_CCM_PLL_USB1 + 0,
+ IMX6_ANALOG_CCM_PLL_USB_ENABLE |
+ IMX6_ANALOG_CCM_PLL_USB_POWER |
+ IMX6_ANALOG_CCM_PLL_USB_EN_USB_CLKS);
+
+ imx6_anatop_write_4(IMX6_ANALOG_CCM_PLL_USB1 + 0x10,
+ IMX6_ANALOG_CCM_PLL_USB_ENABLE |
+ IMX6_ANALOG_CCM_PLL_USB_POWER |
+ IMX6_ANALOG_CCM_PLL_USB_EN_USB_CLKS);
+#endif
+}
+
+
+
+
+
+// XXX Fix this. This has to be here for other code to link,
+// but it doesn't have to return anything useful for imx6 right now.
+u_int
+imx51_get_clock(enum imx51_clock clk)
+{
+ switch (clk)
+ {
+ case IMX51CLK_IPG_CLK_ROOT:
+ return 66000000;
+ default:
+ printf("imx51_get_clock() on imx6 doesn't know about clock %d\n", clk);
+ break;
+ }
+ return 0;
+}
+
+static device_method_t ccm_methods[] = {
+ /* Device interface */
+ DEVMETHOD(device_probe, ccm_probe),
+ DEVMETHOD(device_attach, ccm_attach),
+ DEVMETHOD(device_detach, ccm_detach),
+
+ DEVMETHOD_END
+};
+
+static driver_t ccm_driver = {
+ "ccm",
+ ccm_methods,
+ sizeof(struct ccm_softc)
+};
+
+static devclass_t ccm_devclass;
+
+DRIVER_MODULE(ccm, simplebus, ccm_driver, ccm_devclass, 0, 0);
+
Copied: user/andre/mbuf_staging/arm/freescale/imx/imx6_ccmreg.h (from r257478, head/sys/arm/freescale/imx/imx6_ccmreg.h)
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ user/andre/mbuf_staging/arm/freescale/imx/imx6_ccmreg.h Thu Oct 31 23:39:31 2013 (r257479, copy of r257478, head/sys/arm/freescale/imx/imx6_ccmreg.h)
@@ -0,0 +1,41 @@
+/*-
+ * Copyright (c) 2013 Ian Lepore <ian at freebsd.org>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ */
+
+#ifndef IMX6_CCMREG_H
+#define IMX6_CCMREG_H
+
+#define CCM_CCGR1 0x06C
+#define CCM_CCGR2 0x070
+#define CCM_CCGR3 0x074
+#define CCM_CCGR4 0x078
+#define CCM_CCGR5 0x07C
+#define CCM_CCGR6 0x080
+#define CCM_CMEOR 0x088
+
+
+#endif
Copied: user/andre/mbuf_staging/arm/freescale/imx/imx6_usbphy.c (from r257478, head/sys/arm/freescale/imx/imx6_usbphy.c)
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ user/andre/mbuf_staging/arm/freescale/imx/imx6_usbphy.c Thu Oct 31 23:39:31 2013 (r257479, copy of r257478, head/sys/arm/freescale/imx/imx6_usbphy.c)
@@ -0,0 +1,189 @@
+/*-
+ * Copyright (c) 2013 Ian Lepore <ian at freebsd.org>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD$");
+
+/*
+ * USBPHY driver for Freescale i.MX6 family of SoCs.
+ */
+
+#include "opt_bus.h"
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/kernel.h>
+#include <sys/module.h>
+#include <sys/bus.h>
+#include <sys/rman.h>
+
+#include <dev/ofw/ofw_bus.h>
+#include <dev/ofw/ofw_bus_subr.h>
+
+#include <machine/bus.h>
+
+#include <arm/freescale/imx/imx_machdep.h>
+#include <arm/freescale/imx/imx6_anatopreg.h>
+#include <arm/freescale/imx/imx6_anatopvar.h>
+
+/*
+ * Hardware register defines.
+ */
+#define PWD_REG 0x0000
+#define CTRL_STATUS_REG 0x0030
+#define CTRL_SET_REG 0x0034
+#define CTRL_CLR_REG 0x0038
+#define CTRL_TOGGLE_REG 0x003c
+#define CTRL_SFTRST (1 << 31)
+#define CTRL_CLKGATE (1 << 30)
+#define CTRL_ENUTMILEVEL3 (1 << 15)
+#define CTRL_ENUTMILEVEL2 (1 << 14)
+
+struct usbphy_softc {
+ device_t dev;
+ struct resource *mem_res;
+ u_int phy_num;
+};
+
+static int
+usbphy_detach(device_t dev)
+{
+ struct usbphy_softc *sc;
+
+ sc = device_get_softc(dev);
+
+ if (sc->mem_res != NULL)
+ bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->mem_res);
+
+ return (0);
+}
+
+static int
+usbphy_attach(device_t dev)
+{
+ struct usbphy_softc *sc;
+ int err, regoff, rid;
+
+ sc = device_get_softc(dev);
+ err = 0;
+
+ /* Allocate bus_space resources. */
+ rid = 0;
+ sc->mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
+ RF_ACTIVE);
+ if (sc->mem_res == NULL) {
+ device_printf(dev, "Cannot allocate memory resources\n");
+ err = ENXIO;
+ goto out;
+ }
+
+ /*
+ * XXX Totally lame way to get the unit number (but not quite as lame as
+ * adding an ad-hoc property to the fdt data). This works as long as
+ * this driver is used for imx6 only.
+ */
+ const uint32_t PWD_PHY1_REG_PHYSADDR = 0x020c9000;
+ if (BUS_SPACE_PHYSADDR(sc->mem_res, 0) == PWD_PHY1_REG_PHYSADDR) {
+ sc->phy_num = 0;
+ regoff = 0;
+ } else {
+ sc->phy_num = 1;
+ regoff = 0x60;
+ }
+
+ /*
+ * Based on a note in the u-boot source code, disable charger detection
+ * to avoid degrading the differential signaling on the DP line. Note
+ * that this disables (by design) both charger detection and contact
+ * detection, because of the screwball mix of active-high and active-low
+ * bits in this register.
+ */
+ imx6_anatop_write_4(IMX6_ANALOG_USB1_CHRG_DETECT + regoff,
+ IMX6_ANALOG_USB_CHRG_DETECT_N_ENABLE |
+ IMX6_ANALOG_USB_CHRG_DETECT_N_CHK_CHRG);
+
+ imx6_anatop_write_4(IMX6_ANALOG_USB1_CHRG_DETECT + regoff,
+ IMX6_ANALOG_USB_CHRG_DETECT_N_ENABLE |
+ IMX6_ANALOG_USB_CHRG_DETECT_N_CHK_CHRG);
+
+ /* XXX Configure the overcurrent detection here. */
+
+ /*
+ * Turn on the phy clocks.
+ */
+ imx_ccm_usbphy_enable(dev);
+
+ /*
+ * Set the software reset bit, then clear both it and the clock gate bit
+ * to bring the device out of reset with the clock running.
+ */
+ bus_write_4(sc->mem_res, CTRL_SET_REG, CTRL_SFTRST);
+ bus_write_4(sc->mem_res, CTRL_CLR_REG, CTRL_SFTRST | CTRL_CLKGATE);
+
+ /* Power up: clear all bits in the powerdown register. */
+ bus_write_4(sc->mem_res, PWD_REG, 0);
+
+ err = 0;
+
+out:
+
+ if (err != 0)
+ usbphy_detach(dev);
+
+ return (err);
+}
+
+static int
+usbphy_probe(device_t dev)
+{
+
+ if (ofw_bus_is_compatible(dev, "fsl,imx6q-usbphy") == 0)
+ return (ENXIO);
+
+ device_set_desc(dev, "Freescale i.MX6 USB PHY");
+
+ return (BUS_PROBE_DEFAULT);
+}
+
+static device_method_t usbphy_methods[] = {
+ /* Device interface */
+ DEVMETHOD(device_probe, usbphy_probe),
+ DEVMETHOD(device_attach, usbphy_attach),
+ DEVMETHOD(device_detach, usbphy_detach),
+
+ DEVMETHOD_END
+};
+
+static driver_t usbphy_driver = {
+ "usbphy",
+ usbphy_methods,
+ sizeof(struct usbphy_softc)
+};
+
+static devclass_t usbphy_devclass;
+
+DRIVER_MODULE(usbphy, simplebus, usbphy_driver, usbphy_devclass, 0, 0);
+
Modified: user/andre/mbuf_staging/arm/freescale/imx/imx_machdep.h
==============================================================================
--- user/andre/mbuf_staging/arm/freescale/imx/imx_machdep.h Thu Oct 31 23:08:30 2013 (r257478)
+++ user/andre/mbuf_staging/arm/freescale/imx/imx_machdep.h Thu Oct 31 23:39:31 2013 (r257479)
@@ -36,24 +36,27 @@
void imx_devmap_addentry(vm_paddr_t _pa, vm_size_t _sz);
void imx_wdog_cpu_reset(vm_offset_t _wdcr_phys) __attribute__((__noreturn__));
+/* From here down, routines are implemented in imxNN_machdep.c. */
+
/*
* SoC identity.
+ * According to the documentation, there is such a thing as an i.MX6 Dual
+ * (non-lite flavor). However, Freescale doesn't seem to have assigned it a
+ * number in their code for determining the SoC type in u-boot.
+ *
+ * To-do: put silicon revision numbers into the low-order bits somewhere.
*/
-#define IMXSOC_51 0x05000100
-#define IMXSOC_53 0x05000300
-#define IMXSOC_6S 0x06000010
-#define IMXSOC_6SL 0x06000011
-#define IMXSOC_6D 0x06000020
-#define IMXSOC_6DL 0x06000021
-#define IMXSOC_6Q 0x06000040
-#define IMXSOC_6QL 0x06000041
-#define IMXSOC_FAMSHIFT 24
+#define IMXSOC_51 0x51000000
+#define IMXSOC_53 0x53000000
+#define IMXSOC_6SL 0x60000000
+#define IMXSOC_6DL 0x61000000
+#define IMXSOC_6S 0x62000000
+#define IMXSOC_6Q 0x63000000
+#define IMXSOC_FAMSHIFT 28
u_int imx_soc_type(void);
u_int imx_soc_family(void);
-/* From here down, routines are implemented in imxNN_machdep.c. */
-
void imx_devmap_init(void);
/*
Copied: user/andre/mbuf_staging/arm/freescale/imx/imx_sdhci.c (from r257478, head/sys/arm/freescale/imx/imx_sdhci.c)
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ user/andre/mbuf_staging/arm/freescale/imx/imx_sdhci.c Thu Oct 31 23:39:31 2013 (r257479, copy of r257478, head/sys/arm/freescale/imx/imx_sdhci.c)
@@ -0,0 +1,704 @@
+/*-
+ * Copyright (c) 2013 Ian Lepore <ian at freebsd.org>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ */
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD$");
+
+/*
+ * SDHCI driver glue for Freescale i.MX SoC family.
+ *
+ * This supports both eSDHC (earlier SoCs) and uSDHC (more recent SoCs).
+ */
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/bus.h>
+#include <sys/kernel.h>
+#include <sys/malloc.h>
+#include <sys/module.h>
+#include <sys/resource.h>
+#include <sys/rman.h>
+#include <sys/taskqueue.h>
+
+#include <machine/bus.h>
+#include <machine/resource.h>
+#include <machine/intr.h>
+
+#include <arm/freescale/imx/imx51_ccmvar.h>
+
+#include <dev/ofw/ofw_bus.h>
+#include <dev/ofw/ofw_bus_subr.h>
+
+#include <dev/mmc/bridge.h>
+#include <dev/mmc/mmcreg.h>
+#include <dev/mmc/mmcbrvar.h>
+
+#include <dev/sdhci/sdhci.h>
+#include "sdhci_if.h"
+
+struct imx_sdhci_softc {
+ device_t dev;
+ struct resource * mem_res;
+ struct resource * irq_res;
+ void * intr_cookie;
+ struct sdhci_slot slot;
+ uint32_t baseclk_hz;
+ uint32_t sdclockreg_freq_bits;
+ uint32_t cmd_and_mode;
+ uint32_t r1bfix_intmask;
+ uint8_t r1bfix_type;
+ uint8_t hwtype;
+};
+
+#define R1BFIX_NONE 0 /* No fix needed at next interrupt. */
+#define R1BFIX_NODATA 1 /* Synthesize DATA_END for R1B w/o data. */
+#define R1BFIX_AC12 2 /* Wait for busy after auto command 12. */
+
+#define HWTYPE_NONE 0 /* Hardware not recognized/supported. */
+#define HWTYPE_ESDHC 1 /* imx5x and earlier. */
+#define HWTYPE_USDHC 2 /* imx6. */
+
+#define SDHC_WTMK_LVL 0x44 /* Watermark Level register. */
+#define USDHC_MIX_CONTROL 0x48 /* Mix(ed) Control register. */
+#define SDHC_VEND_SPEC 0xC0 /* Vendor-specific register. */
+#define SDHC_VEND_FRC_SDCLK_ON (1 << 8)
+#define SDHC_VEND_IPGEN (1 << 11)
+#define SDHC_VEND_HCKEN (1 << 12)
+#define SDHC_VEND_PEREN (1 << 13)
+
+#define SDHC_PROT_CTRL 0x28
+#define SDHC_PROT_LED (1 << 0)
+#define SDHC_PROT_WIDTH_1BIT (0 << 1)
+#define SDHC_PROT_WIDTH_4BIT (1 << 1)
+#define SDHC_PROT_WIDTH_8BIT (2 << 1)
+#define SDHC_PROT_WIDTH_MASK (3 << 1)
+#define SDHC_PROT_D3CD (1 << 3)
+#define SDHC_PROT_EMODE_BIG (0 << 4)
+#define SDHC_PROT_EMODE_HALF (1 << 4)
+#define SDHC_PROT_EMODE_LITTLE (2 << 4)
+#define SDHC_PROT_EMODE_MASK (3 << 4)
+#define SDHC_PROT_SDMA (0 << 8)
+#define SDHC_PROT_ADMA1 (1 << 8)
+#define SDHC_PROT_ADMA2 (2 << 8)
+#define SDHC_PROT_ADMA264 (3 << 8)
+#define SDHC_PROT_DMA_MASK (3 << 8)
+#define SDHC_PROT_CDTL (1 << 6)
+#define SDHC_PROT_CDSS (1 << 7)
+
+#define SDHC_CLK_IPGEN (1 << 0)
+#define SDHC_CLK_HCKEN (1 << 1)
+#define SDHC_CLK_PEREN (1 << 2)
+#define SDHC_CLK_DIVISOR_MASK 0x000000f0
+#define SDHC_CLK_DIVISOR_SHIFT 4
+#define SDHC_CLK_PRESCALE_MASK 0x0000ff00
+#define SDHC_CLK_PRESCALE_SHIFT 8
+
+static struct ofw_compat_data compat_data[] = {
+ {"fsl,imx6q-usdhc", HWTYPE_USDHC},
+ {"fsl,imx6sl-usdhc", HWTYPE_USDHC},
+ {"fsl,imx53-esdhc", HWTYPE_ESDHC},
+ {"fsl,imx51-esdhc", HWTYPE_ESDHC},
+ {NULL, HWTYPE_NONE},
+};;
+
+static void imx_sdhc_set_clock(struct imx_sdhci_softc *sc, int enable);
+
+static inline uint32_t
+RD4(struct imx_sdhci_softc *sc, bus_size_t off)
+{
+
+ return (bus_read_4(sc->mem_res, off));
+}
+
+static inline void
+WR4(struct imx_sdhci_softc *sc, bus_size_t off, uint32_t val)
+{
+
+ bus_write_4(sc->mem_res, off, val);
+}
+
+static uint8_t
+imx_sdhci_read_1(device_t dev, struct sdhci_slot *slot, bus_size_t off)
+{
+ struct imx_sdhci_softc *sc = device_get_softc(dev);
+ uint32_t val32, wrk32;
+
+ /*
+ * Most of the things in the standard host control register are in the
+ * hardware's wider protocol control register, but some of the bits are
+ * moved around.
+ */
+ if (off == SDHCI_HOST_CONTROL) {
+ wrk32 = RD4(sc, SDHC_PROT_CTRL);
*** DIFF OUTPUT TRUNCATED AT 1000 LINES ***
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