svn commit: r257443 - in user/andre/mbuf_staging: amd64/amd64 amd64/conf amd64/vmm amd64/vmm/intel amd64/vmm/io arm/arm arm/at91 arm/conf arm/econa arm/freescale/imx arm/include arm/lpc arm/mv arm/...

Andre Oppermann andre at FreeBSD.org
Thu Oct 31 12:59:32 UTC 2013 

Author: andre
Date: Thu Oct 31 12:59:25 2013
New Revision: 257443
URL: http://svnweb.freebsd.org/changeset/base/257443

Log:
  IFC @257441.

Added:
  user/andre/mbuf_staging/arm/freescale/imx/imx_nop_usbphy.c
     - copied unchanged from r257441, head/sys/arm/freescale/imx/imx_nop_usbphy.c
  user/andre/mbuf_staging/net/ifq.h
     - copied unchanged from r257441, head/sys/net/ifq.h
  user/andre/mbuf_staging/x86/iommu/
     - copied from r257441, head/sys/x86/iommu/
Deleted:
  user/andre/mbuf_staging/modules/netgraph/fec/
  user/andre/mbuf_staging/netgraph/ng_fec.c
  user/andre/mbuf_staging/netgraph/ng_fec.h
Modified:
  user/andre/mbuf_staging/amd64/amd64/trap.c
  user/andre/mbuf_staging/amd64/conf/GENERIC
  user/andre/mbuf_staging/amd64/conf/NOTES
  user/andre/mbuf_staging/amd64/vmm/intel/vmcs.c
  user/andre/mbuf_staging/amd64/vmm/intel/vmx.c
  user/andre/mbuf_staging/amd64/vmm/intel/vmx_genassym.c
  user/andre/mbuf_staging/amd64/vmm/intel/vtd.c
  user/andre/mbuf_staging/amd64/vmm/io/vlapic.c
  user/andre/mbuf_staging/amd64/vmm/vmm.c
  user/andre/mbuf_staging/amd64/vmm/vmm_dev.c
  user/andre/mbuf_staging/amd64/vmm/vmm_instruction_emul.c
  user/andre/mbuf_staging/amd64/vmm/vmm_ktr.h
  user/andre/mbuf_staging/arm/arm/cpufunc.c
  user/andre/mbuf_staging/arm/arm/cpufunc_asm_pj4b.S
  user/andre/mbuf_staging/arm/arm/gic.c
  user/andre/mbuf_staging/arm/arm/identcpu.c
  user/andre/mbuf_staging/arm/arm/locore.S
  user/andre/mbuf_staging/arm/arm/mp_machdep.c
  user/andre/mbuf_staging/arm/at91/at91.c
  user/andre/mbuf_staging/arm/at91/if_ate.c
  user/andre/mbuf_staging/arm/conf/DIGI-CCWMX53
  user/andre/mbuf_staging/arm/econa/econa.c
  user/andre/mbuf_staging/arm/econa/if_ece.c
  user/andre/mbuf_staging/arm/freescale/imx/files.imx51
  user/andre/mbuf_staging/arm/freescale/imx/files.imx53
  user/andre/mbuf_staging/arm/freescale/imx/imx51_ccm.c
  user/andre/mbuf_staging/arm/freescale/imx/imx51_ccmreg.h
  user/andre/mbuf_staging/arm/freescale/imx/imx_gpt.c
  user/andre/mbuf_staging/arm/freescale/imx/imx_machdep.h
  user/andre/mbuf_staging/arm/freescale/imx/tzic.c
  user/andre/mbuf_staging/arm/include/armreg.h
  user/andre/mbuf_staging/arm/include/cpufunc.h
  user/andre/mbuf_staging/arm/include/pmap.h
  user/andre/mbuf_staging/arm/lpc/if_lpe.c
  user/andre/mbuf_staging/arm/mv/armadaxp/std.armadaxp
  user/andre/mbuf_staging/arm/mv/common.c
  user/andre/mbuf_staging/arm/mv/mv_machdep.c
  user/andre/mbuf_staging/arm/s3c2xx0/s3c24x0.c
  user/andre/mbuf_staging/arm/sa11x0/sa11x0.c
  user/andre/mbuf_staging/arm/ti/cpsw/if_cpsw.c
  user/andre/mbuf_staging/arm/versatile/if_smc_fdt.c
  user/andre/mbuf_staging/arm/xscale/i80321/iq80321.c
  user/andre/mbuf_staging/arm/xscale/ixp425/if_npe.c
  user/andre/mbuf_staging/arm/xscale/pxa/if_smc_smi.c
  user/andre/mbuf_staging/arm/xscale/pxa/pxa_obio.c
  user/andre/mbuf_staging/boot/fdt/dts/digi-ccwmx53.dts
  user/andre/mbuf_staging/boot/fdt/dts/efikamx.dts
  user/andre/mbuf_staging/boot/fdt/dts/imx51x.dtsi
  user/andre/mbuf_staging/boot/fdt/dts/imx53-qsb.dts
  user/andre/mbuf_staging/boot/fdt/dts/imx53x.dtsi
  user/andre/mbuf_staging/boot/forth/loader.conf
  user/andre/mbuf_staging/cam/cam.h
  user/andre/mbuf_staging/cam/cam_xpt.c
  user/andre/mbuf_staging/cam/scsi/scsi_xpt.c
  user/andre/mbuf_staging/cddl/dev/dtrace/amd64/dtrace_subr.c
  user/andre/mbuf_staging/compat/svr4/svr4_sockio.c
  user/andre/mbuf_staging/conf/Makefile.arm
  user/andre/mbuf_staging/conf/NOTES
  user/andre/mbuf_staging/conf/files
  user/andre/mbuf_staging/conf/files.amd64
  user/andre/mbuf_staging/conf/files.i386
  user/andre/mbuf_staging/conf/options
  user/andre/mbuf_staging/contrib/ipfilter/netinet/radix_ipf.c
  user/andre/mbuf_staging/dev/acpica/acpi.c
  user/andre/mbuf_staging/dev/acpica/acpi_pci.c
  user/andre/mbuf_staging/dev/adb/adb_kbd.c
  user/andre/mbuf_staging/dev/altera/atse/if_atse_fdt.c
  user/andre/mbuf_staging/dev/altera/atse/if_atse_nexus.c
  user/andre/mbuf_staging/dev/altera/avgen/altera_avgen_nexus.c
  user/andre/mbuf_staging/dev/altera/jtag_uart/altera_jtag_uart_nexus.c
  user/andre/mbuf_staging/dev/altera/sdcard/altera_sdcard_nexus.c
  user/andre/mbuf_staging/dev/arcmsr/arcmsr.c
  user/andre/mbuf_staging/dev/asr/asr.c
  user/andre/mbuf_staging/dev/ath/if_ath_ahb.c
  user/andre/mbuf_staging/dev/ath/if_ath_tx.c
  user/andre/mbuf_staging/dev/bce/if_bce.c
  user/andre/mbuf_staging/dev/cesa/cesa.c
  user/andre/mbuf_staging/dev/cfe/cfe_resource.c
  user/andre/mbuf_staging/dev/cm/if_cm_isa.c
  user/andre/mbuf_staging/dev/cs/if_cs_isa.c
  user/andre/mbuf_staging/dev/cs/if_cs_pccard.c
  user/andre/mbuf_staging/dev/cs/if_csvar.h
  user/andre/mbuf_staging/dev/cxgbe/tom/t4_connect.c
  user/andre/mbuf_staging/dev/ep/if_ep_mca.c
  user/andre/mbuf_staging/dev/etherswitch/arswitch/arswitch.c
  user/andre/mbuf_staging/dev/etherswitch/arswitch/arswitch_phy.c
  user/andre/mbuf_staging/dev/etherswitch/arswitch/arswitch_vlans.c
  user/andre/mbuf_staging/dev/etherswitch/miiproxy.c
  user/andre/mbuf_staging/dev/etherswitch/rtl8366/rtl8366rb.c
  user/andre/mbuf_staging/dev/etherswitch/ukswitch/ukswitch.c
  user/andre/mbuf_staging/dev/firewire/sbp.c
  user/andre/mbuf_staging/dev/gxemul/disk/gxemul_disk.c
  user/andre/mbuf_staging/dev/gxemul/ether/if_gx.c
  user/andre/mbuf_staging/dev/hme/if_hme_sbus.c
  user/andre/mbuf_staging/dev/hptiop/hptiop.c
  user/andre/mbuf_staging/dev/hyperv/netvsc/hv_netvsc_drv_freebsd.c
  user/andre/mbuf_staging/dev/hyperv/vmbus/hv_vmbus_drv_freebsd.c
  user/andre/mbuf_staging/dev/ie/if_ie_isa.c
  user/andre/mbuf_staging/dev/ipmi/ipmi.c
  user/andre/mbuf_staging/dev/iscsi_initiator/isc_cam.c
  user/andre/mbuf_staging/dev/isp/isp_freebsd.c
  user/andre/mbuf_staging/dev/isp/isp_freebsd.h
  user/andre/mbuf_staging/dev/iwn/if_iwn.c
  user/andre/mbuf_staging/dev/le/if_le_ledma.c
  user/andre/mbuf_staging/dev/mii/miidevs
  user/andre/mbuf_staging/dev/mii/rgephy.c
  user/andre/mbuf_staging/dev/mps/mps_sas.c
  user/andre/mbuf_staging/dev/mpt/mpt_cam.c
  user/andre/mbuf_staging/dev/pdq/if_fea.c
  user/andre/mbuf_staging/dev/re/if_re.c
  user/andre/mbuf_staging/dev/rt/if_rt.c
  user/andre/mbuf_staging/dev/sbni/if_sbni_isa.c
  user/andre/mbuf_staging/dev/snc/dp83932.c
  user/andre/mbuf_staging/dev/snc/if_snc.c
  user/andre/mbuf_staging/dev/snc/if_snc_pccard.c
  user/andre/mbuf_staging/dev/terasic/de4led/terasic_de4led_nexus.c
  user/andre/mbuf_staging/dev/terasic/mtl/terasic_mtl_nexus.c
  user/andre/mbuf_staging/dev/tsec/if_tsec_fdt.c
  user/andre/mbuf_staging/dev/twa/tw_osl_cam.c
  user/andre/mbuf_staging/dev/usb/controller/ehci_imx.c
  user/andre/mbuf_staging/dev/usb/storage/umass.c
  user/andre/mbuf_staging/dev/usb/usbdevs
  user/andre/mbuf_staging/dev/usb/wlan/if_run.c
  user/andre/mbuf_staging/dev/usb/wlan/if_runreg.h
  user/andre/mbuf_staging/dev/vx/if_vx_eisa.c
  user/andre/mbuf_staging/dev/wds/wd7000.c
  user/andre/mbuf_staging/dev/xen/console/console.c
  user/andre/mbuf_staging/dev/xen/netback/netback.c
  user/andre/mbuf_staging/dev/xen/netfront/netfront.c
  user/andre/mbuf_staging/dev/xen/pcifront/pcifront.c
  user/andre/mbuf_staging/dev/xen/timer/timer.c
  user/andre/mbuf_staging/i386/conf/NOTES
  user/andre/mbuf_staging/i386/i386/bpf_jit_machdep.c
  user/andre/mbuf_staging/i386/i386/trap.c
  user/andre/mbuf_staging/mips/adm5120/if_admsw.c
  user/andre/mbuf_staging/mips/adm5120/obio.c
  user/andre/mbuf_staging/mips/alchemy/obio.c
  user/andre/mbuf_staging/mips/atheros/apb.c
  user/andre/mbuf_staging/mips/atheros/ar71xx_ehci.c
  user/andre/mbuf_staging/mips/atheros/ar71xx_pci.c
  user/andre/mbuf_staging/mips/atheros/ar71xx_spi.c
  user/andre/mbuf_staging/mips/atheros/ar71xx_wdog.c
  user/andre/mbuf_staging/mips/atheros/ar724x_pci.c
  user/andre/mbuf_staging/mips/atheros/if_arge.c
  user/andre/mbuf_staging/mips/cavium/ciu.c
  user/andre/mbuf_staging/mips/cavium/octe/ethernet-common.c
  user/andre/mbuf_staging/mips/cavium/octe/ethernet-mdio.c
  user/andre/mbuf_staging/mips/cavium/octe/ethernet-mem.c
  user/andre/mbuf_staging/mips/cavium/octe/ethernet-rgmii.c
  user/andre/mbuf_staging/mips/cavium/octe/ethernet-rx.c
  user/andre/mbuf_staging/mips/cavium/octe/ethernet-sgmii.c
  user/andre/mbuf_staging/mips/cavium/octe/ethernet-spi.c
  user/andre/mbuf_staging/mips/cavium/octe/ethernet-tx.c
  user/andre/mbuf_staging/mips/cavium/octe/ethernet-xaui.c
  user/andre/mbuf_staging/mips/cavium/octe/ethernet.c
  user/andre/mbuf_staging/mips/cavium/octeon_ebt3000_cf.c
  user/andre/mbuf_staging/mips/cavium/octeon_pmc.c
  user/andre/mbuf_staging/mips/cavium/octeon_rnd.c
  user/andre/mbuf_staging/mips/cavium/octeon_rtc.c
  user/andre/mbuf_staging/mips/idt/if_kr.c
  user/andre/mbuf_staging/mips/idt/obio.c
  user/andre/mbuf_staging/mips/malta/gt.c
  user/andre/mbuf_staging/mips/mips/tick.c
  user/andre/mbuf_staging/mips/mips/trap.c
  user/andre/mbuf_staging/mips/nlm/dev/net/xlpge.c
  user/andre/mbuf_staging/mips/nlm/tick.c
  user/andre/mbuf_staging/mips/nlm/xlp_pci.c
  user/andre/mbuf_staging/mips/rmi/dev/nlge/if_nlge.c
  user/andre/mbuf_staging/mips/rmi/iodi.c
  user/andre/mbuf_staging/mips/rmi/tick.c
  user/andre/mbuf_staging/mips/rt305x/obio.c
  user/andre/mbuf_staging/mips/sibyte/sb_zbbus.c
  user/andre/mbuf_staging/modules/netgraph/Makefile
  user/andre/mbuf_staging/net/bpf.h
  user/andre/mbuf_staging/net/if_clone.h
  user/andre/mbuf_staging/net/if_var.h
  user/andre/mbuf_staging/net/if_vlan_var.h
  user/andre/mbuf_staging/net80211/ieee80211_alq.c
  user/andre/mbuf_staging/net80211/ieee80211_amrr.c
  user/andre/mbuf_staging/net80211/ieee80211_superg.c
  user/andre/mbuf_staging/netinet/in_mcast.c
  user/andre/mbuf_staging/netinet/in_var.h
  user/andre/mbuf_staging/netinet/sctp_pcb.c
  user/andre/mbuf_staging/netinet/sctp_timer.c
  user/andre/mbuf_staging/netinet/sctp_usrreq.c
  user/andre/mbuf_staging/netpfil/pf/pf.c
  user/andre/mbuf_staging/pci/if_rlreg.h
  user/andre/mbuf_staging/powerpc/aim/trap.c
  user/andre/mbuf_staging/powerpc/ps3/if_glc.c
  user/andre/mbuf_staging/powerpc/pseries/phyp_llan.c
  user/andre/mbuf_staging/powerpc/pseries/phyp_vscsi.c
  user/andre/mbuf_staging/powerpc/pseries/plpar_iommu.c
  user/andre/mbuf_staging/sys/dtrace_bsd.h
  user/andre/mbuf_staging/sys/eventhandler.h
  user/andre/mbuf_staging/sys/mount.h
  user/andre/mbuf_staging/x86/include/busdma_impl.h
  user/andre/mbuf_staging/x86/include/trap.h
Directory Properties:
  user/andre/mbuf_staging/   (props changed)
  user/andre/mbuf_staging/amd64/vmm/   (props changed)
  user/andre/mbuf_staging/boot/   (props changed)
  user/andre/mbuf_staging/conf/   (props changed)
  user/andre/mbuf_staging/contrib/ipfilter/   (props changed)
  user/andre/mbuf_staging/dev/hyperv/   (props changed)

Modified: user/andre/mbuf_staging/amd64/amd64/trap.c
==============================================================================
--- user/andre/mbuf_staging/amd64/amd64/trap.c	Thu Oct 31 12:57:00 2013	(r257442)
+++ user/andre/mbuf_staging/amd64/amd64/trap.c	Thu Oct 31 12:59:25 2013	(r257443)
@@ -114,9 +114,8 @@ dtrace_doubletrap_func_t	dtrace_doubletr
 systrace_probe_func_t	systrace_probe_func;
 
 /*
- * These hooks are necessary for the pid, usdt and fasttrap providers.
+ * These hooks are necessary for the pid and usdt providers.
  */
-dtrace_fasttrap_probe_ptr_t	dtrace_fasttrap_probe_ptr;
 dtrace_pid_probe_ptr_t		dtrace_pid_probe_ptr;
 dtrace_return_probe_ptr_t	dtrace_return_probe_ptr;
 #endif
@@ -128,7 +127,7 @@ void dblfault_handler(struct trapframe *
 static int trap_pfault(struct trapframe *, int);
 static void trap_fatal(struct trapframe *, vm_offset_t);
 
-#define MAX_TRAP_MSG		33
+#define MAX_TRAP_MSG		32
 static char *trap_msg[] = {
 	"",					/*  0 unused */
 	"privileged instruction fault",		/*  1 T_PRIVINFLT */
@@ -163,7 +162,6 @@ static char *trap_msg[] = {
 	"reserved (unknown) fault",		/* 30 T_RESERVED */
 	"",					/* 31 unused (reserved) */
 	"DTrace pid return trap",		/* 32 T_DTRACE_RET */
-	"DTrace fasttrap probe trap",		/* 33 T_DTRACE_PROBE */
 };
 
 #ifdef KDB
@@ -255,16 +253,11 @@ trap(struct trapframe *frame)
 	 * handled the trap and modified the trap frame so that this
 	 * function can return normally.
 	 */
-	if (type == T_DTRACE_PROBE || type == T_DTRACE_RET ||
-	    type == T_BPTFLT) {
+	if (type == T_DTRACE_RET || type == T_BPTFLT) {
 		struct reg regs;
 
 		fill_frame_regs(frame, &regs);
-		if (type == T_DTRACE_PROBE &&
-		    dtrace_fasttrap_probe_ptr != NULL &&
-		    dtrace_fasttrap_probe_ptr(&regs) == 0)
-			goto out;
-		else if (type == T_BPTFLT &&
+		if (type == T_BPTFLT &&
 		    dtrace_pid_probe_ptr != NULL &&
 		    dtrace_pid_probe_ptr(&regs) == 0)
 			goto out;

Modified: user/andre/mbuf_staging/amd64/conf/GENERIC
==============================================================================
--- user/andre/mbuf_staging/amd64/conf/GENERIC	Thu Oct 31 12:57:00 2013	(r257442)
+++ user/andre/mbuf_staging/amd64/conf/GENERIC	Thu Oct 31 12:59:25 2013	(r257443)
@@ -94,6 +94,7 @@ device		cpufreq
 
 # Bus support.
 device		acpi
+options 	ACPI_DMAR
 device		pci
 
 # Floppy drives

Modified: user/andre/mbuf_staging/amd64/conf/NOTES
==============================================================================
--- user/andre/mbuf_staging/amd64/conf/NOTES	Thu Oct 31 12:57:00 2013	(r257442)
+++ user/andre/mbuf_staging/amd64/conf/NOTES	Thu Oct 31 12:59:25 2013	(r257443)
@@ -473,6 +473,12 @@ device		virtio_blk	# VirtIO Block device
 device		virtio_scsi	# VirtIO SCSI device
 device		virtio_balloon	# VirtIO Memory Balloon device
 
+device 		hyperv		# HyperV drivers
+
+# Xen HVM Guest Optimizations
+options 	XENHVM		# Xen HVM kernel infrastructure 
+device 		xenpci		# Xen HVM Hypervisor services driver
+
 #####################################################################
 
 #

Modified: user/andre/mbuf_staging/amd64/vmm/intel/vmcs.c
==============================================================================
--- user/andre/mbuf_staging/amd64/vmm/intel/vmcs.c	Thu Oct 31 12:57:00 2013	(r257442)
+++ user/andre/mbuf_staging/amd64/vmm/intel/vmcs.c	Thu Oct 31 12:59:25 2013	(r257443)
@@ -39,8 +39,6 @@ __FBSDID("$FreeBSD$");
 #include <vm/pmap.h>
 
 #include <machine/segments.h>
-#include <machine/pmap.h>
-
 #include <machine/vmm.h>
 #include "vmm_host.h"
 #include "vmcs.h"

Modified: user/andre/mbuf_staging/amd64/vmm/intel/vmx.c
==============================================================================
--- user/andre/mbuf_staging/amd64/vmm/intel/vmx.c	Thu Oct 31 12:57:00 2013	(r257442)
+++ user/andre/mbuf_staging/amd64/vmm/intel/vmx.c	Thu Oct 31 12:59:25 2013	(r257443)
@@ -44,7 +44,6 @@ __FBSDID("$FreeBSD$");
 #include <machine/psl.h>
 #include <machine/cpufunc.h>
 #include <machine/md_var.h>
-#include <machine/pmap.h>
 #include <machine/segments.h>
 #include <machine/specialreg.h>
 #include <machine/vmparam.h>
@@ -308,8 +307,8 @@ vmx_setjmp_rc2str(int rc)
 	}
 }
 
-#define	SETJMP_TRACE(vmx, vcpu, vmxctx, regname)			  \
-	VMM_CTR1((vmx)->vm, (vcpu), "setjmp trace " #regname " 0x%016lx", \
+#define	SETJMP_TRACE(vmx, vcpu, vmxctx, regname)			    \
+	VCPU_CTR1((vmx)->vm, (vcpu), "setjmp trace " #regname " 0x%016lx",  \
 		 (vmxctx)->regname)
 
 static void
@@ -321,14 +320,14 @@ vmx_setjmp_trace(struct vmx *vmx, int vc
 		panic("vmx_setjmp_trace: invalid vmxctx %p; should be %p",
 			vmxctx, &vmx->ctx[vcpu]);
 
-	VMM_CTR1((vmx)->vm, (vcpu), "vmxctx = %p", vmxctx);
-	VMM_CTR2((vmx)->vm, (vcpu), "setjmp return code %s(%d)",
+	VCPU_CTR1((vmx)->vm, (vcpu), "vmxctx = %p", vmxctx);
+	VCPU_CTR2((vmx)->vm, (vcpu), "setjmp return code %s(%d)",
 		 vmx_setjmp_rc2str(rc), rc);
 
 	host_rsp = host_rip = ~0;
 	vmread(VMCS_HOST_RIP, &host_rip);
 	vmread(VMCS_HOST_RSP, &host_rsp);
-	VMM_CTR2((vmx)->vm, (vcpu), "vmcs host_rip 0x%016lx, host_rsp 0x%016lx",
+	VCPU_CTR2((vmx)->vm, (vcpu), "vmcs host_rip 0x%016lx, host_rsp %#lx",
 		 host_rip, host_rsp);
 
 	SETJMP_TRACE(vmx, vcpu, vmxctx, host_r15);
@@ -887,7 +886,7 @@ static __inline void
 vmx_run_trace(struct vmx *vmx, int vcpu)
 {
 #ifdef KTR
-	VMM_CTR1(vmx->vm, vcpu, "Resume execution at 0x%0lx", vmcs_guest_rip());
+	VCPU_CTR1(vmx->vm, vcpu, "Resume execution at %#lx", vmcs_guest_rip());
 #endif
 }
 
@@ -896,7 +895,7 @@ vmx_exit_trace(struct vmx *vmx, int vcpu
 	       int handled)
 {
 #ifdef KTR
-	VMM_CTR3(vmx->vm, vcpu, "%s %s vmexit at 0x%0lx",
+	VCPU_CTR3(vmx->vm, vcpu, "%s %s vmexit at 0x%0lx",
 		 handled ? "handled" : "unhandled",
 		 exit_reason_to_str(exit_reason), rip);
 #endif
@@ -906,7 +905,7 @@ static __inline void
 vmx_astpending_trace(struct vmx *vmx, int vcpu, uint64_t rip)
 {
 #ifdef KTR
-	VMM_CTR1(vmx->vm, vcpu, "astpending vmexit at 0x%0lx", rip);
+	VCPU_CTR1(vmx->vm, vcpu, "astpending vmexit at 0x%0lx", rip);
 #endif
 }
 
@@ -1055,7 +1054,7 @@ vmx_inject_nmi(struct vmx *vmx, int vcpu
 	if (error)
 		panic("vmx_inject_nmi: vmwrite(intrinfo) %d", error);
 
-	VMM_CTR0(vmx->vm, vcpu, "Injecting vNMI");
+	VCPU_CTR0(vmx->vm, vcpu, "Injecting vNMI");
 
 	/* Clear the request */
 	vm_nmi_clear(vmx->vm, vcpu);
@@ -1068,7 +1067,7 @@ nmiblocked:
 	 */
 	vmx_set_nmi_window_exiting(vmx, vcpu);
 
-	VMM_CTR0(vmx->vm, vcpu, "Enabling NMI window exiting");
+	VCPU_CTR0(vmx->vm, vcpu, "Enabling NMI window exiting");
 	return (1);
 }
 
@@ -1134,7 +1133,7 @@ vmx_inject_interrupts(struct vmx *vmx, i
 	/* Update the Local APIC ISR */
 	lapic_intr_accepted(vmx->vm, vcpu, vector);
 
-	VMM_CTR1(vmx->vm, vcpu, "Injecting hwintr at vector %d", vector);
+	VCPU_CTR1(vmx->vm, vcpu, "Injecting hwintr at vector %d", vector);
 
 	return;
 
@@ -1145,7 +1144,7 @@ cantinject:
 	 */
 	vmx_set_int_window_exiting(vmx, vcpu);
 
-	VMM_CTR0(vmx->vm, vcpu, "Enabling interrupt window exiting");
+	VCPU_CTR0(vmx->vm, vcpu, "Enabling interrupt window exiting");
 }
 
 static int
@@ -1435,7 +1434,7 @@ vmx_exit_process(struct vmx *vmx, int vc
 	case EXIT_REASON_INTR_WINDOW:
 		vmm_stat_incr(vmx->vm, vcpu, VMEXIT_INTR_WINDOW, 1);
 		vmx_clear_int_window_exiting(vmx, vcpu);
-		VMM_CTR0(vmx->vm, vcpu, "Disabling interrupt window exiting");
+		VCPU_CTR0(vmx->vm, vcpu, "Disabling interrupt window exiting");
 		return (1);
 	case EXIT_REASON_EXT_INTR:
 		/*
@@ -1458,7 +1457,7 @@ vmx_exit_process(struct vmx *vmx, int vc
 		/* Exit to allow the pending virtual NMI to be injected */
 		vmm_stat_incr(vmx->vm, vcpu, VMEXIT_NMI_WINDOW, 1);
 		vmx_clear_nmi_window_exiting(vmx, vcpu);
-		VMM_CTR0(vmx->vm, vcpu, "Disabling NMI window exiting");
+		VCPU_CTR0(vmx->vm, vcpu, "Disabling NMI window exiting");
 		return (1);
 	case EXIT_REASON_INOUT:
 		vmm_stat_incr(vmx->vm, vcpu, VMEXIT_INOUT, 1);
@@ -1659,7 +1658,7 @@ vmx_run(void *arg, int vcpu, register_t 
 	if (!handled)
 		vmm_stat_incr(vmx->vm, vcpu, VMEXIT_USERSPACE, 1);
 
-	VMM_CTR1(vmx->vm, vcpu, "goto userland: exitcode %d",vmexit->exitcode);
+	VCPU_CTR1(vmx->vm, vcpu, "goto userland: exitcode %d",vmexit->exitcode);
 
 	/*
 	 * XXX

Modified: user/andre/mbuf_staging/amd64/vmm/intel/vmx_genassym.c
==============================================================================
--- user/andre/mbuf_staging/amd64/vmm/intel/vmx_genassym.c	Thu Oct 31 12:57:00 2013	(r257442)
+++ user/andre/mbuf_staging/amd64/vmm/intel/vmx_genassym.c	Thu Oct 31 12:59:25 2013	(r257443)
@@ -38,8 +38,6 @@ __FBSDID("$FreeBSD$");
 #include <vm/vm.h>
 #include <vm/pmap.h>
 
-#include <machine/pmap.h>
-
 #include <machine/vmm.h>
 #include "vmx.h"
 #include "vmx_cpufunc.h"

Modified: user/andre/mbuf_staging/amd64/vmm/intel/vtd.c
==============================================================================
--- user/andre/mbuf_staging/amd64/vmm/intel/vtd.c	Thu Oct 31 12:57:00 2013	(r257442)
+++ user/andre/mbuf_staging/amd64/vmm/intel/vtd.c	Thu Oct 31 12:59:25 2013	(r257443)
@@ -39,7 +39,6 @@ __FBSDID("$FreeBSD$");
 
 #include <dev/pci/pcireg.h>
 
-#include <machine/pmap.h>
 #include <machine/vmparam.h>
 #include <contrib/dev/acpica/include/acpi.h>
 

Modified: user/andre/mbuf_staging/amd64/vmm/io/vlapic.c
==============================================================================
--- user/andre/mbuf_staging/amd64/vmm/io/vlapic.c	Thu Oct 31 12:57:00 2013	(r257442)
+++ user/andre/mbuf_staging/amd64/vmm/io/vlapic.c	Thu Oct 31 12:59:25 2013	(r257443)
@@ -48,10 +48,10 @@ __FBSDID("$FreeBSD$");
 #include "vlapic.h"
 
 #define	VLAPIC_CTR0(vlapic, format)					\
-	VMM_CTR0((vlapic)->vm, (vlapic)->vcpuid, format)
+	VCPU_CTR0((vlapic)->vm, (vlapic)->vcpuid, format)
 
 #define	VLAPIC_CTR1(vlapic, format, p1)					\
-	VMM_CTR1((vlapic)->vm, (vlapic)->vcpuid, format, p1)
+	VCPU_CTR1((vlapic)->vm, (vlapic)->vcpuid, format, p1)
 
 #define	VLAPIC_CTR_IRR(vlapic, msg)					\
 do {									\

Modified: user/andre/mbuf_staging/amd64/vmm/vmm.c
==============================================================================
--- user/andre/mbuf_staging/amd64/vmm/vmm.c	Thu Oct 31 12:57:00 2013	(r257442)
+++ user/andre/mbuf_staging/amd64/vmm/vmm.c	Thu Oct 31 12:59:25 2013	(r257443)
@@ -56,7 +56,6 @@ __FBSDID("$FreeBSD$");
 #include <machine/pcb.h>
 #include <machine/smp.h>
 #include <x86/apicreg.h>
-#include <machine/pmap.h>
 #include <machine/vmparam.h>
 
 #include <machine/vmm.h>
@@ -919,8 +918,8 @@ vm_handle_paging(struct vm *vm, int vcpu
 	map = &vm->vmspace->vm_map;
 	rv = vm_fault(map, vme->u.paging.gpa, ftype, VM_FAULT_NORMAL);
 
-	VMM_CTR3(vm, vcpuid, "vm_handle_paging rv = %d, gpa = %#lx, ftype = %d",
-		 rv, vme->u.paging.gpa, ftype);
+	VCPU_CTR3(vm, vcpuid, "vm_handle_paging rv = %d, gpa = %#lx, "
+	    "ftype = %d", rv, vme->u.paging.gpa, ftype);
 
 	if (rv != KERN_SUCCESS)
 		return (EFAULT);

Modified: user/andre/mbuf_staging/amd64/vmm/vmm_dev.c
==============================================================================
--- user/andre/mbuf_staging/amd64/vmm/vmm_dev.c	Thu Oct 31 12:57:00 2013	(r257442)
+++ user/andre/mbuf_staging/amd64/vmm/vmm_dev.c	Thu Oct 31 12:59:25 2013	(r257443)
@@ -46,7 +46,6 @@ __FBSDID("$FreeBSD$");
 #include <vm/pmap.h>
 #include <vm/vm_map.h>
 
-#include <machine/pmap.h>
 #include <machine/vmparam.h>
 
 #include <machine/vmm.h>

Modified: user/andre/mbuf_staging/amd64/vmm/vmm_instruction_emul.c
==============================================================================
--- user/andre/mbuf_staging/amd64/vmm/vmm_instruction_emul.c	Thu Oct 31 12:57:00 2013	(r257442)
+++ user/andre/mbuf_staging/amd64/vmm/vmm_instruction_emul.c	Thu Oct 31 12:59:25 2013	(r257443)
@@ -38,7 +38,6 @@ __FBSDID("$FreeBSD$");
 #include <vm/vm.h>
 #include <vm/pmap.h>
 
-#include <machine/pmap.h>
 #include <machine/vmparam.h>
 #include <machine/vmm.h>
 #else	/* !_KERNEL */

Modified: user/andre/mbuf_staging/amd64/vmm/vmm_ktr.h
==============================================================================
--- user/andre/mbuf_staging/amd64/vmm/vmm_ktr.h	Thu Oct 31 12:57:00 2013	(r257442)
+++ user/andre/mbuf_staging/amd64/vmm/vmm_ktr.h	Thu Oct 31 12:59:25 2013	(r257443)
@@ -34,18 +34,30 @@
 
 #define	KTR_VMM	KTR_GEN
 
-#define	VMM_CTR0(vm, vcpuid, format)					\
+#define	VCPU_CTR0(vm, vcpuid, format)					\
 CTR3(KTR_VMM, "vm %s-%d(%d): " format, vm_name((vm)), (vcpuid), curcpu)
 
-#define	VMM_CTR1(vm, vcpuid, format, p1)				\
+#define	VCPU_CTR1(vm, vcpuid, format, p1)				\
 CTR4(KTR_VMM, "vm %s-%d(%d): " format, vm_name((vm)), (vcpuid), curcpu, \
 			(p1))
 
-#define	VMM_CTR2(vm, vcpuid, format, p1, p2)				\
+#define	VCPU_CTR2(vm, vcpuid, format, p1, p2)				\
 CTR5(KTR_VMM, "vm %s-%d(%d): " format, vm_name((vm)), (vcpuid), curcpu, \
 			(p1), (p2))
 
-#define	VMM_CTR3(vm, vcpuid, format, p1, p2, p3)			\
+#define	VCPU_CTR3(vm, vcpuid, format, p1, p2, p3)			\
 CTR6(KTR_VMM, "vm %s-%d(%d): " format, vm_name((vm)), (vcpuid), curcpu, \
 			(p1), (p2), (p3))
+
+#define	VM_CTR0(vm, format)						\
+CTR2(KTR_VMM, "vm %s(%d): " format, vm_name((vm)), curcpu)
+
+#define	VM_CTR1(vm, format, p1)						\
+CTR3(KTR_VMM, "vm %s(%d): " format, vm_name((vm)), curcpu, (p1))
+
+#define	VM_CTR2(vm, format, p1, p2)					\
+CTR4(KTR_VMM, "vm %s(%d): " format, vm_name((vm)), curcpu, (p1), (p2))
+
+#define	VM_CTR3(vm, format, p1, p2, p3)					\
+CTR5(KTR_VMM, "vm %s(%d): " format, vm_name((vm)), curcpu, (p1), (p2), (p3))
 #endif

Modified: user/andre/mbuf_staging/arm/arm/cpufunc.c
==============================================================================
--- user/andre/mbuf_staging/arm/arm/cpufunc.c	Thu Oct 31 12:57:00 2013	(r257442)
+++ user/andre/mbuf_staging/arm/arm/cpufunc.c	Thu Oct 31 12:59:25 2013	(r257443)
@@ -541,65 +541,6 @@ struct cpu_functions pj4bv7_cpufuncs = {
 
 	pj4bv7_setup			/* cpu setup		*/
 };
-
-struct cpu_functions pj4bv6_cpufuncs = {
-	/* CPU functions */
-
-	cpufunc_id,			/* id			*/
-	arm11_drain_writebuf,		/* cpwait		*/
-
-	/* MMU functions */
-
-	cpufunc_control,		/* control		*/
-	cpufunc_domains,		/* Domain		*/
-	pj4b_setttb,			/* Setttb		*/
-	cpufunc_faultstatus,		/* Faultstatus		*/
-	cpufunc_faultaddress,		/* Faultaddress		*/
-
-	/* TLB functions */
-
-	arm11_tlb_flushID,		/* tlb_flushID		*/
-	arm11_tlb_flushID_SE,		/* tlb_flushID_SE	*/
-	arm11_tlb_flushI,		/* tlb_flushI		*/
-	arm11_tlb_flushI_SE,		/* tlb_flushI_SE	*/
-	arm11_tlb_flushD,		/* tlb_flushD		*/
-	arm11_tlb_flushD_SE,		/* tlb_flushD_SE	*/
-
-	/* Cache operations */
-	armv6_icache_sync_all,		/* icache_sync_all	*/
-	pj4b_icache_sync_range,		/* icache_sync_range	*/
-
-	armv6_dcache_wbinv_all,		/* dcache_wbinv_all	*/
-	pj4b_dcache_wbinv_range,	/* dcache_wbinv_range	*/
-	pj4b_dcache_inv_range,		/* dcache_inv_range	*/
-	pj4b_dcache_wb_range,		/* dcache_wb_range	*/
-
-	armv6_idcache_wbinv_all,	/* idcache_wbinv_all	*/
-	pj4b_idcache_wbinv_range,	/* idcache_wbinv_all	*/
-
-	(void *)cpufunc_nullop,		/* l2cache_wbinv_all	*/
-	(void *)cpufunc_nullop,		/* l2cache_wbinv_range	*/
-	(void *)cpufunc_nullop,		/* l2cache_inv_range	*/
-	(void *)cpufunc_nullop,		/* l2cache_wb_range	*/
-
-	/* Other functions */
-
-	pj4b_drain_readbuf,		/* flush_prefetchbuf	*/
-	arm11_drain_writebuf,		/* drain_writebuf	*/
-	pj4b_flush_brnchtgt_all,	/* flush_brnchtgt_C	*/
-	pj4b_flush_brnchtgt_va,		/* flush_brnchtgt_E	*/
-
-	(void *)cpufunc_nullop,		/* sleep		*/
-
-	/* Soft functions */
-
-	cpufunc_null_fixup,		/* dataabt_fixup	*/
-	cpufunc_null_fixup,		/* prefetchabt_fixup	*/
-
-	arm11_context_switch,		/* context_switch	*/
-
-	pj4bv6_setup			/* cpu setup		*/
-};
 #endif /* CPU_MV_PJ4B */
 
 #ifdef CPU_SA110
@@ -1497,27 +1438,14 @@ set_cpufuncs()
 #endif /* CPU_CORTEXA */
 		
 #if defined(CPU_MV_PJ4B)
-	if (cputype == CPU_ID_MV88SV581X_V6 ||
-	    cputype == CPU_ID_MV88SV581X_V7 ||
+	if (cputype == CPU_ID_MV88SV581X_V7 ||
 	    cputype == CPU_ID_MV88SV584X_V7 ||
-	    cputype == CPU_ID_ARM_88SV581X_V6 ||
 	    cputype == CPU_ID_ARM_88SV581X_V7) {
-		if (cpu_pfr(0) & ARM_PFR0_THUMBEE_MASK)
-			cpufuncs = pj4bv7_cpufuncs;
-		else
-			cpufuncs = pj4bv6_cpufuncs;
-
-		get_cachetype_cp15();
-		pmap_pte_init_mmu_v6();
-		goto out;
-	} else if (cputype == CPU_ID_ARM_88SV584X_V6 ||
-	    cputype == CPU_ID_MV88SV584X_V6) {
-		cpufuncs = pj4bv6_cpufuncs;
+		cpufuncs = pj4bv7_cpufuncs;
 		get_cachetype_cp15();
 		pmap_pte_init_mmu_v6();
 		goto out;
 	}
-
 #endif /* CPU_MV_PJ4B */
 #ifdef CPU_SA110
 	if (cputype == CPU_ID_SA110) {
@@ -2447,44 +2375,6 @@ arm11x6_setup(char *args)
 
 #ifdef CPU_MV_PJ4B
 void
-pj4bv6_setup(char *args)
-{
-	int cpuctrl;
-
-	pj4b_config();
-
-	cpuctrl = CPU_CONTROL_MMU_ENABLE;
-#ifndef ARM32_DISABLE_ALIGNMENT_FAULTS
-	cpuctrl |= CPU_CONTROL_AFLT_ENABLE;
-#endif
-	cpuctrl |= CPU_CONTROL_DC_ENABLE;
-	cpuctrl |= (0xf << 3);
-#ifdef __ARMEB__
-	cpuctrl |= CPU_CONTROL_BEND_ENABLE;
-#endif
-	cpuctrl |= CPU_CONTROL_SYST_ENABLE;
-	cpuctrl |= CPU_CONTROL_BPRD_ENABLE;
-	cpuctrl |= CPU_CONTROL_IC_ENABLE;
-	if (vector_page == ARM_VECTORS_HIGH)
-		cpuctrl |= CPU_CONTROL_VECRELOC;
-	cpuctrl |= (0x5 << 16);
-	cpuctrl |= CPU_CONTROL_V6_EXTPAGE;
-	/* XXX not yet */
-	/* cpuctrl |= CPU_CONTROL_L2_ENABLE; */
-
-	/* Make sure caches are clean.  */
-	cpu_idcache_wbinv_all();
-	cpu_l2cache_wbinv_all();
-
-	/* Set the control register */
-	ctrl = cpuctrl;
-	cpu_control(0xffffffff, cpuctrl);
-
-	cpu_idcache_wbinv_all();
-	cpu_l2cache_wbinv_all();
-}
-
-void
 pj4bv7_setup(args)
 	char *args;
 {

Modified: user/andre/mbuf_staging/arm/arm/cpufunc_asm_pj4b.S
==============================================================================
--- user/andre/mbuf_staging/arm/arm/cpufunc_asm_pj4b.S	Thu Oct 31 12:57:00 2013	(r257442)
+++ user/andre/mbuf_staging/arm/arm/cpufunc_asm_pj4b.S	Thu Oct 31 12:59:25 2013	(r257443)
@@ -34,9 +34,6 @@ __FBSDID("$FreeBSD$");
 
 #include <machine/param.h>
 
-.Lpj4b_cache_line_size:
-	.word	_C_LABEL(arm_pdcache_line_size)
-
 .Lpj4b_sf_ctrl_reg:
 	.word	0xf1021820
 
@@ -52,135 +49,6 @@ ENTRY(pj4b_setttb)
 	RET
 END(pj4b_setttb)
 
-ENTRY_NP(armv6_icache_sync_all)
-	/*
-	 * We assume that the code here can never be out of sync with the
-	 * dcache, so that we can safely flush the Icache and fall through
-	 * into the Dcache cleaning code.
-	 */
-	mov	r0, #0
-	mcr	p15, 0, r0, c7, c5, 0	/* Invalidate ICache */
-	mcr	p15, 0, r0, c7, c10, 0	/* Clean (don't invalidate) DCache */
-	mcr	p15, 0, r0, c7, c10, 4	/* drain the write buffer */
-	RET
-END(armv6_icache_sync_all)
-
-ENTRY(pj4b_icache_sync_range)
-	sub	r1, r1, #1
-	add	r1, r0, r1
-	mcrr	p15, 0, r1, r0, c5	/* invalidate IC range */
-	mcrr	p15, 0, r1, r0, c12	/* clean DC range */
-	mcr	p15, 0, r0, c7, c10, 4	/* drain the write buffer */
-	RET
-END(pj4b_icache_sync_range)
-
-ENTRY(pj4b_dcache_inv_range)
-	ldr	ip, .Lpj4b_cache_line_size
-	ldr	ip, [ip]
-	sub	r1, r1, #1		/* Don't overrun */
-	sub	r3, ip, #1
-	and	r2, r0, r3
-	add	r1, r1, r2
-	bic	r0, r0, r3
-
-	mcr	p15, 0, r0, c7, c10, 5  /* Data Memory Barrier err:4413 */
-1:
-	mcr	p15, 0, r0, c7, c6, 1
-	add	r0, r0, ip
-	subs	r1, r1, ip
-	bpl	1b
-	mcr	p15, 0, r0, c7, c10, 4	/* drain the write buffer */
-	RET
-END(pj4b_dcache_inv_range)
-
-ENTRY(armv6_idcache_wbinv_all)
-	mov	r0, #0
-	mcr	p15, 0, r0, c7, c5, 0	/* invalidate ICache */
-	mcr	p15, 0, r0, c7, c14, 0	/* clean and invalidate DCache */
-	mcr	p15, 0, r0, c7, c10, 4	/* drain the write buffer */
-	RET
-END(armv6_idcache_wbinv_all)
-
-ENTRY(armv6_dcache_wbinv_all)
-	mov	r0, #0
-	mcr	p15, 0, r0, c7, c14, 0	/* clean and invalidate DCache */
-	mcr	p15, 0, r0, c7, c10, 4	/* drain the write buffer */
-	RET
-END(armv6_dcache_wbinv_all)
-
-ENTRY(pj4b_idcache_wbinv_range)
-	ldr	ip, .Lpj4b_cache_line_size
-	ldr	ip, [ip]
-	sub	r1, r1, #1		/* Don't overrun */
-	sub	r3, ip, #1
-	and	r2, r0, r3
-	add	r1, r1, r2
-	bic	r0, r0, r3
-
-	mcr	p15, 0, r0, c7, c10, 5  /* Data Memory Barrier err:4611 */
-1:
-#ifdef SMP
-	/* Request for ownership */
-	ldr	r2, [r0]
-	str	r2, [r0]
-#endif
-	mcr	p15, 0, r0, c7, c5, 1
-	mcr	p15, 0, r0, c7, c14, 1	/* L2C clean and invalidate entry */
-	add	r0, r0, ip
-	subs	r1, r1, ip
-	bpl	1b
-	mcr	p15, 0, r0, c7, c10, 4	/* drain the write buffer */
-	RET
-END(pj4b_idcache_wbinv_range)
-
-ENTRY(pj4b_dcache_wbinv_range)
-	ldr	ip, .Lpj4b_cache_line_size
-	ldr	ip, [ip]
-	sub	r1, r1, #1		/* Don't overrun */
-	sub	r3, ip, #1
-	and	r2, r0, r3
-	add	r1, r1, r2
-	bic	r0, r0, r3
-
-	mcr	p15, 0, r0, c7, c10, 5  /* Data Memory Barrier err:4611 */
-1:
-#ifdef SMP
-	/* Request for ownership */
-	ldr	r2, [r0]
-	str	r2, [r0]
-#endif
-	mcr	p15, 0, r0, c7, c14, 1
-	add	r0, r0, ip
-	subs	r1, r1, ip
-	bpl	1b
-	mcr	p15, 0, r0, c7, c10, 4	/* drain the write buffer */
-	RET
-END(pj4b_dcache_wbinv_range)
-
-ENTRY(pj4b_dcache_wb_range)
-	ldr	ip, .Lpj4b_cache_line_size
-	ldr	ip, [ip]
-	sub	r1, r1, #1		/* Don't overrun */
-	sub	r3, ip, #1
-	and	r2, r0, r3
-	add	r1, r1, r2
-	bic	r0, r0, r3
-
-	mcr	p15, 0, r0, c7, c10, 5  /* Data Memory Barrier err:4611 */
-1:
-#ifdef SMP
-	/* Request for ownership */
-	ldr	r2, [r0]
-	str	r2, [r0]
-#endif
-	mcr	p15, 0, r0, c7, c10, 1	/* L2C clean single entry by MVA */
-	add	r0, r0, ip
-	subs	r1, r1, ip
-	bpl	1b
-	mcr	p15, 0, r0, c7, c10, 4	/* drain the write buffer */
-	RET
-END(pj4b_dcache_wb_range)
-
 ENTRY(pj4b_drain_readbuf)
 	mcr	p15, 0, r0, c7, c5, 4	/* flush prefetch buffers */
 	RET

Modified: user/andre/mbuf_staging/arm/arm/gic.c
==============================================================================
--- user/andre/mbuf_staging/arm/arm/gic.c	Thu Oct 31 12:57:00 2013	(r257442)
+++ user/andre/mbuf_staging/arm/arm/gic.c	Thu Oct 31 12:59:25 2013	(r257443)
@@ -271,7 +271,6 @@ arm_get_next_irq(int last_irq)
 			printf("Spurious interrupt detected [0x%08x]\n", active_irq);
 		return -1;
 	}
-	gic_c_write_4(GICC_EOIR, active_irq);
 
 	return active_irq;
 }
@@ -279,14 +278,15 @@ arm_get_next_irq(int last_irq)
 void
 arm_mask_irq(uintptr_t nb)
 {
+
 	gic_d_write_4(GICD_ICENABLER(nb >> 5), (1UL << (nb & 0x1F)));
+	gic_c_write_4(GICC_EOIR, nb);
 }
 
 void
 arm_unmask_irq(uintptr_t nb)
 {
 
-	gic_c_write_4(GICC_EOIR, nb);
 	gic_d_write_4(GICD_ISENABLER(nb >> 5), (1UL << (nb & 0x1F)));
 }
 

Modified: user/andre/mbuf_staging/arm/arm/identcpu.c
==============================================================================
--- user/andre/mbuf_staging/arm/arm/identcpu.c	Thu Oct 31 12:57:00 2013	(r257442)
+++ user/andre/mbuf_staging/arm/arm/identcpu.c	Thu Oct 31 12:59:25 2013	(r257443)
@@ -323,18 +323,10 @@ const struct cpuidtab cpuids[] = {
 
 	{ CPU_ID_MV88FR571_VD,	CPU_CLASS_MARVELL,	"Feroceon 88FR571-VD",
 	  generic_steppings },
-	{ CPU_ID_MV88SV581X_V6,	CPU_CLASS_MARVELL,	"Sheeva 88SV581x",
-	  generic_steppings },
-	{ CPU_ID_ARM_88SV581X_V6, CPU_CLASS_MARVELL,	"Sheeva 88SV581x",
-	  generic_steppings },
 	{ CPU_ID_MV88SV581X_V7,	CPU_CLASS_MARVELL,	"Sheeva 88SV581x",
 	  generic_steppings },
 	{ CPU_ID_ARM_88SV581X_V7, CPU_CLASS_MARVELL,	"Sheeva 88SV581x",
 	  generic_steppings },
-	{ CPU_ID_MV88SV584X_V6,	CPU_CLASS_MARVELL,	"Sheeva 88SV584x",
-	  generic_steppings },
-	{ CPU_ID_ARM_88SV584X_V6, CPU_CLASS_MARVELL,	"Sheeva 88SV584x",
-	  generic_steppings },
 	{ CPU_ID_MV88SV584X_V7,	CPU_CLASS_MARVELL,	"Sheeva 88SV584x",
 	  generic_steppings },
 

Modified: user/andre/mbuf_staging/arm/arm/locore.S
==============================================================================
--- user/andre/mbuf_staging/arm/arm/locore.S	Thu Oct 31 12:57:00 2013	(r257442)
+++ user/andre/mbuf_staging/arm/arm/locore.S	Thu Oct 31 12:59:25 2013	(r257443)
@@ -266,10 +266,6 @@ mmu_init_table:
 	/* map VA 0xc0000000..0xc3ffffff to PA */
 	MMU_INIT(KERNBASE, PHYSADDR, 64, L1_TYPE_S|L1_SHARED|L1_S_C|L1_S_AP(AP_KRW))
 	MMU_INIT(0x48000000, 0x48000000, 1, L1_TYPE_S|L1_SHARED|L1_S_C|L1_S_AP(AP_KRW))
-#if defined(CPU_MV_PJ4B)
-	/* map VA 0xf1000000..0xf1100000 to PA 0xd0000000 */
-	MMU_INIT(0xf1000000, 0xd0000000, 1, L1_TYPE_S|L1_SHARED|L1_S_B|L1_S_AP(AP_KRW))
-#endif /* CPU_MV_PJ4B */
 #endif /* SMP */
 	.word 0	/* end of table */
 #endif

Modified: user/andre/mbuf_staging/arm/arm/mp_machdep.c
==============================================================================
--- user/andre/mbuf_staging/arm/arm/mp_machdep.c	Thu Oct 31 12:57:00 2013	(r257442)
+++ user/andre/mbuf_staging/arm/arm/mp_machdep.c	Thu Oct 31 12:59:25 2013	(r257443)
@@ -52,6 +52,10 @@ __FBSDID("$FreeBSD$");
 #ifdef VFP
 #include <machine/vfp.h>
 #endif
+#ifdef CPU_MV_PJ4B
+#include <arm/mv/mvwin.h>
+#include <dev/fdt/fdt_common.h>
+#endif
 
 #include "opt_smp.h"
 
@@ -131,8 +135,8 @@ cpu_mp_start(void)
 
 #if defined(CPU_MV_PJ4B)
 	/* Add ARMADAXP registers required for snoop filter initialization */
-	((int *)(temp_pagetable_va))[0xf1000000 >> L1_S_SHIFT] =
-	    L1_TYPE_S|L1_SHARED|L1_S_B|L1_S_AP(AP_KRW)|0xd0000000;
+	((int *)(temp_pagetable_va))[MV_BASE >> L1_S_SHIFT] =
+	    L1_TYPE_S|L1_SHARED|L1_S_B|L1_S_AP(AP_KRW)|fdt_immr_pa;
 #endif
 
 	temp_pagetable = (void*)(vtophys(temp_pagetable_va));

Modified: user/andre/mbuf_staging/arm/at91/at91.c
==============================================================================
--- user/andre/mbuf_staging/arm/at91/at91.c	Thu Oct 31 12:57:00 2013	(r257442)
+++ user/andre/mbuf_staging/arm/at91/at91.c	Thu Oct 31 12:59:25 2013	(r257443)
@@ -231,8 +231,7 @@ at91_probe(device_t dev)
 {
 
 	device_set_desc(dev, "AT91 device bus");
-	arm_post_filter = at91_eoi;
-	return (0);
+	return (BUS_PROBE_NOWILDCARD);
 }
 
 static void
@@ -261,6 +260,8 @@ at91_attach(device_t dev)
 	const struct pmap_devmap *pdevmap;
 	int i;
 
+	arm_post_filter = at91_eoi;
+
 	at91_softc = sc;
 	sc->sc_st = &at91_bs_tag;
 	sc->sc_sh = AT91_BASE;

Modified: user/andre/mbuf_staging/arm/at91/if_ate.c
==============================================================================
--- user/andre/mbuf_staging/arm/at91/if_ate.c	Thu Oct 31 12:57:00 2013	(r257442)
+++ user/andre/mbuf_staging/arm/at91/if_ate.c	Thu Oct 31 12:59:25 2013	(r257443)
@@ -54,6 +54,7 @@ __FBSDID("$FreeBSD$");
 #include <net/if_media.h>
 #include <net/if_mib.h>
 #include <net/if_types.h>
+#include <net/if_var.h>
 
 #ifdef INET
 #include <netinet/in.h>

Modified: user/andre/mbuf_staging/arm/conf/DIGI-CCWMX53
==============================================================================
--- user/andre/mbuf_staging/arm/conf/DIGI-CCWMX53	Thu Oct 31 12:57:00 2013	(r257442)
+++ user/andre/mbuf_staging/arm/conf/DIGI-CCWMX53	Thu Oct 31 12:59:25 2013	(r257443)
@@ -65,7 +65,7 @@ options 	VFP			# vfp/neon
 #options 	BOOTP_COMPAT
 #options 	BOOTP_NFSROOT
 #options 	BOOTP_NFSV3
-#options 	BOOTP_WIRED_TO=ue0
+#options 	BOOTP_WIRED_TO=ffec0
 
 #options 	ROOTDEVNAME=\"ufs:ada0s2a\"
 
@@ -105,8 +105,12 @@ device		ether		# Ethernet support
 #device		faith		# IPv6-to-IPv4 relaying (translation)
 #device		firmware	# firmware assist module
 
+# Ethernet
+device		ffec		# Freescale Fast Ethernet Controller
+device		miibus		# Standard mii bus
+
 # Serial (COM) ports
-#device		uart		# Multi-uart driver
+device		uart		# Multi-uart driver
 options 	ALT_BREAK_TO_DEBUGGER
 
 device		ata
@@ -130,13 +134,13 @@ device		cd		# CD
 device		pass		# Passthrough device (direct SCSI access)
 
 # USB support
-#options 	USB_DEBUG	# enable debug msgs
-#device		ehci		# OHCI USB interface
-#device		usb		# USB Bus (required)
-#device		umass		# Disks/Mass storage - Requires scbus and da
-#device		uhid		# "Human Interface Devices"
+options 	USB_DEBUG	# enable debug msgs
+device		ehci		# OHCI USB interface
+device		usb		# USB Bus (required)
+device		umass		# Disks/Mass storage - Requires scbus and da
+device		uhid		# "Human Interface Devices"
 #device		ukbd		# Allow keyboard like HIDs to control console
-#device		ums
+device		ums
 
 # USB Ethernet, requires miibus
 #device		miibus

Modified: user/andre/mbuf_staging/arm/econa/econa.c
==============================================================================
--- user/andre/mbuf_staging/arm/econa/econa.c	Thu Oct 31 12:57:00 2013	(r257442)
+++ user/andre/mbuf_staging/arm/econa/econa.c	Thu Oct 31 12:59:25 2013	(r257443)
@@ -172,7 +172,7 @@ econa_probe(device_t dev)
 {
 
 	device_set_desc(dev, "ECONA device bus");
-	return (0);
+	return (BUS_PROBE_NOWILDCARD);
 }
 
 static void

Modified: user/andre/mbuf_staging/arm/econa/if_ece.c
==============================================================================
--- user/andre/mbuf_staging/arm/econa/if_ece.c	Thu Oct 31 12:57:00 2013	(r257442)
+++ user/andre/mbuf_staging/arm/econa/if_ece.c	Thu Oct 31 12:59:25 2013	(r257443)
@@ -46,6 +46,7 @@ __FBSDID("$FreeBSD$");
 #include <net/if_dl.h>
 #include <net/if_media.h>
 #include <net/if_types.h>
+#include <net/if_var.h>
 #include <net/if_vlan_var.h>
 
 #ifdef INET

Modified: user/andre/mbuf_staging/arm/freescale/imx/files.imx51
==============================================================================
--- user/andre/mbuf_staging/arm/freescale/imx/files.imx51	Thu Oct 31 12:57:00 2013	(r257442)
+++ user/andre/mbuf_staging/arm/freescale/imx/files.imx51	Thu Oct 31 12:59:25 2013	(r257443)
@@ -37,7 +37,8 @@ dev/ata/chipsets/ata-fsl.c		optional imx
 # UART driver
 dev/uart/uart_dev_imx.c			optional uart
 
-# USB join controller (1 OTG, 3 EHCI)
+# USB OH3 controller (1 OTG, 3 EHCI)
+arm/freescale/imx/imx_nop_usbphy.c	optional echi
 dev/usb/controller/ehci_imx.c		optional ehci
 
 # Watchdog

Modified: user/andre/mbuf_staging/arm/freescale/imx/files.imx53
==============================================================================
--- user/andre/mbuf_staging/arm/freescale/imx/files.imx53	Thu Oct 31 12:57:00 2013	(r257442)
+++ user/andre/mbuf_staging/arm/freescale/imx/files.imx53	Thu Oct 31 12:59:25 2013	(r257443)
@@ -37,7 +37,8 @@ arm/freescale/imx/imx51_ccm.c		standard
 # i.MX5xx PATA controller
 dev/ata/chipsets/ata-fsl.c		optional imxata
 
-# USB join controller (1 OTG, 3 EHCI)
+# USB OH3 controller (1 OTG, 3 EHCI)
+arm/freescale/imx/imx_nop_usbphy.c	optional ehci
 dev/usb/controller/ehci_imx.c		optional ehci
 
 # Watchdog

Modified: user/andre/mbuf_staging/arm/freescale/imx/imx51_ccm.c
==============================================================================
--- user/andre/mbuf_staging/arm/freescale/imx/imx51_ccm.c	Thu Oct 31 12:57:00 2013	(r257442)
+++ user/andre/mbuf_staging/arm/freescale/imx/imx51_ccm.c	Thu Oct 31 12:59:25 2013	(r257443)
@@ -83,6 +83,7 @@ __FBSDID("$FreeBSD$");
 #include <arm/freescale/imx/imx51_ccmvar.h>
 #include <arm/freescale/imx/imx51_ccmreg.h>
 #include <arm/freescale/imx/imx51_dpllreg.h>
+#include <arm/freescale/imx/imx_machdep.h>
 
 #define	IMXCCMDEBUG
 #undef	IMXCCMDEBUG
@@ -473,3 +474,78 @@ imx51_get_clk_gating(int clk_src)
 	return ((reg >> (clk_src % CCMR_CCGR_NSOURCE) * 2) & 0x03);
 }
 
+/*
+ * Code from here down is temporary, in lieu of a SoC-independent clock API.
+ */
+
+void
+imx_ccm_usb_enable(device_t dev)
+{
+	uint32_t regval;
+
+	/*
+	 * Select PLL2 as the source for the USB clock.
+	 * The default is PLL3, but U-boot changes it to PLL2.
+	 */
+	regval = bus_read_4(ccm_softc->res[0], CCMC_CSCMR1);
+	regval &= ~CSCMR1_USBOH3_CLK_SEL_MASK;
+	regval |= 1 << CSCMR1_USBOH3_CLK_SEL_SHIFT;
+	bus_write_4(ccm_softc->res[0], CCMC_CSCMR1, regval);
+
+	/*
+	 * Set the USB clock pre-divider to div-by-5, post-divider to div-by-2.
+	 */
+	regval = bus_read_4(ccm_softc->res[0], CCMC_CSCDR1);
+	regval &= ~CSCDR1_USBOH3_CLK_PODF_MASK;
+	regval &= ~CSCDR1_USBOH3_CLK_PRED_MASK;
+	regval |= 4 << CSCDR1_USBOH3_CLK_PRED_SHIFT;
+	regval |= 1 << CSCDR1_USBOH3_CLK_PODF_SHIFT;
+	bus_write_4(ccm_softc->res[0], CCMC_CSCDR1, regval);
+
+	/*
+	 * The same two clocks gates are used on imx51 and imx53.
+	 */
+	imx51_clk_gating(CCGR_USBOH3_IPG_AHB_CLK, CCGR_CLK_MODE_ALWAYS);
+	imx51_clk_gating(CCGR_USBOH3_60M_CLK, CCGR_CLK_MODE_ALWAYS);
+}
+
+void
+imx_ccm_usbphy_enable(device_t dev)
+{
+	uint32_t regval;
+
+	/*
+	 * Select PLL3 as the source for the USBPHY clock.  U-boot does this 
+	 * only for imx53, but the bit exists on imx51.  That seems a bit
+	 * strange, but we'll go with it until more is known.
+	 */
+	if (imx_soc_type() == IMXSOC_53) {
+		regval = bus_read_4(ccm_softc->res[0], CCMC_CSCMR1);
+		regval |= 1 << CSCMR1_USBPHY_CLK_SEL_SHIFT;
+		bus_write_4(ccm_softc->res[0], CCMC_CSCMR1, regval);
+	}
+
+	/*
+	 * For the imx51 there's just one phy gate control, enable it.
+	 */
+	if (imx_soc_type() == IMXSOC_51) {
+		imx51_clk_gating(CCGR_USB_PHY_CLK, CCGR_CLK_MODE_ALWAYS);
+		return;
+	}
+
+	/*
+	 * For imx53 we don't have a full set of clock defines yet, but the
+	 * datasheet says:
+	 *   gate reg 4, bits 13-12 usb ph2 clock (usb_phy2_clk_enable)
+	 *   gate reg 4, bits 11-10 usb ph1 clock (usb_phy1_clk_enable)
+	 *
+	 * We should use the fdt data for the device to figure out which of
+	 * the two we're working on, but for now just turn them both on.
+	 */
+	if (imx_soc_type() == IMXSOC_53) {
+		imx51_clk_gating(__CCGR_NUM(4, 5), CCGR_CLK_MODE_ALWAYS);
+		imx51_clk_gating(__CCGR_NUM(4, 6), CCGR_CLK_MODE_ALWAYS);
+		return;
+	}
+}
+

Modified: user/andre/mbuf_staging/arm/freescale/imx/imx51_ccmreg.h
==============================================================================
--- user/andre/mbuf_staging/arm/freescale/imx/imx51_ccmreg.h	Thu Oct 31 12:57:00 2013	(r257442)
+++ user/andre/mbuf_staging/arm/freescale/imx/imx51_ccmreg.h	Thu Oct 31 12:59:25 2013	(r257443)
@@ -114,12 +114,20 @@
 #define	CCMC_CSCMR1	0x001c
 #define		CSCMR1_UART_CLK_SEL_SHIFT	24
 #define		CSCMR1_UART_CLK_SEL_MASK	0x03000000
+#define		CSCMR1_USBPHY_CLK_SEL_SHIFT	26
+#define		CSCMR1_USBPHY_CLK_SEL_MASK	0x04000000
+#define		CSCMR1_USBOH3_CLK_SEL_SHIFT	22
+#define		CSCMR1_USBOH3_CLK_SEL_MASK	0x00c00000
 #define	CCMC_CSCMR2	0x0020
 #define	CCMC_CSCDR1	0x0024
 #define		CSCDR1_UART_CLK_PRED_SHIFT	3
 #define		CSCDR1_UART_CLK_PRED_MASK	0x00000038
 #define		CSCDR1_UART_CLK_PODF_SHIFT	0
 #define		CSCDR1_UART_CLK_PODF_MASK	0x00000007
+#define		CSCDR1_USBOH3_CLK_PRED_SHIFT	8
+#define		CSCDR1_USBOH3_CLK_PRED_MASK	0x00000700
+#define		CSCDR1_USBOH3_CLK_PODF_SHIFT	6
+#define		CSCDR1_USBOH3_CLK_PODF_MASK	0x000000c0
 #define	CCMC_CS1CDR	0x0028
 #define	CCMC_CS2CDR	0x002c
 #define	CCMC_CDCDR	0x0030

Modified: user/andre/mbuf_staging/arm/freescale/imx/imx_gpt.c
==============================================================================
--- user/andre/mbuf_staging/arm/freescale/imx/imx_gpt.c	Thu Oct 31 12:57:00 2013	(r257442)
+++ user/andre/mbuf_staging/arm/freescale/imx/imx_gpt.c	Thu Oct 31 12:59:25 2013	(r257443)
@@ -95,7 +95,7 @@ struct imx_gpt_softc *imx_gpt_sc = NULL;
 static const int imx_gpt_delay_count = 78;
 
 /* Try to divide down an available fast clock to this frequency. */
-#define	TARGET_FREQUENCY	1000000
+#define	TARGET_FREQUENCY	10000000
 
 /* Don't try to set an event timer period smaller than this. */
 #define	MIN_ET_PERIOD		10LLU
@@ -107,16 +107,26 @@ static struct resource_spec imx_gpt_spec
 	{ -1, 0 }
 };
 
+static struct ofw_compat_data compat_data[] = {
+	{"fsl,imx6q-gpt",  1},
+	{"fsl,imx53-gpt",  1},
+	{"fsl,imx51-gpt",  1},
+	{"fsl,imx31-gpt",  1},
+	{"fsl,imx27-gpt",  1},
+	{"fsl,imx25-gpt",  1},
+	{NULL,             0}
+};
+
 static int
 imx_gpt_probe(device_t dev)
 {
 
-	if (!ofw_bus_is_compatible(dev, "fsl,imx51-gpt") &&
-	    !ofw_bus_is_compatible(dev, "fsl,imx53-gpt"))
-		return (ENXIO);
+	if (ofw_bus_search_compatible(dev, compat_data)->ocd_data != 0) {
+		device_set_desc(dev, "Freescale i.MX GPT timer");
+		return (BUS_PROBE_DEFAULT);
+	}
 
-	device_set_desc(dev, "Freescale i.MX GPT timer");
-	return (BUS_PROBE_DEFAULT);
+	return (ENXIO);
 }
 
 static int
@@ -142,10 +152,7 @@ imx_gpt_attach(device_t dev)
 	 * we're running on.  Eventually we could allow selection from the fdt;
 	 * the code in this driver will cope with any clock frequency.
 	 */
-	if (ofw_bus_is_compatible(dev, "fsl,imx6-gpt"))
-		sc->sc_clksrc = GPT_CR_CLKSRC_24M;
-	else
-		sc->sc_clksrc = GPT_CR_CLKSRC_IPG;
+	sc->sc_clksrc = GPT_CR_CLKSRC_IPG;
 
 	ctlreg = 0;
 
@@ -270,14 +277,9 @@ imx_gpt_timer_start(struct eventtimer *e
 		WRITE4(sc, IMX_GPT_OCR2, READ4(sc, IMX_GPT_CNT) + sc->sc_period);
 		/* Enable compare register 2 Interrupt */
 		SET4(sc, IMX_GPT_IR, GPT_IR_OF2);
+		return (0);
 	} else if (first != 0) {
 		ticks = ((uint32_t)et->et_frequency * first) >> 32;
-

*** DIFF OUTPUT TRUNCATED AT 1000 LINES ***

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