svn commit: r256922 - in user/andre/mbuf_staging: arm/allwinner arm/broadcom/bcm2835 arm/conf arm/freescale/imx boot/fdt/dts cam cam/ata cam/ctl cam/scsi cddl/contrib/opensolaris/uts/common/fs/zfs ...
Andre Oppermann
andre at FreeBSD.org
Tue Oct 22 18:39:46 UTC 2013
Author: andre
Date: Tue Oct 22 18:39:43 2013
New Revision: 256922
URL: http://svnweb.freebsd.org/changeset/base/256922
Log:
IFC @256921.
Added:
user/andre/mbuf_staging/arm/conf/IMX53-QSB
- copied unchanged from r256921, head/sys/arm/conf/IMX53-QSB
user/andre/mbuf_staging/boot/fdt/dts/beri-sim.dts
- copied unchanged from r256921, head/sys/boot/fdt/dts/beri-sim.dts
user/andre/mbuf_staging/boot/fdt/dts/beripad-de4.dts
- copied unchanged from r256921, head/sys/boot/fdt/dts/beripad-de4.dts
user/andre/mbuf_staging/boot/fdt/dts/imx53-qsb.dts
- copied unchanged from r256921, head/sys/boot/fdt/dts/imx53-qsb.dts
- copied unchanged from r256921, head/sys/dev/fdt/fdt_ic_if.m
user/andre/mbuf_staging/dev/ffec/
- copied from r256921, head/sys/dev/ffec/
user/andre/mbuf_staging/dev/usb/controller/dwc_otg_fdt.c
- copied unchanged from r256921, head/sys/dev/usb/controller/dwc_otg_fdt.c
user/andre/mbuf_staging/mips/beri/beri_pic.c
- copied unchanged from r256921, head/sys/mips/beri/beri_pic.c
user/andre/mbuf_staging/mips/conf/BERI_DE4_BASE
- copied unchanged from r256921, head/sys/mips/conf/BERI_DE4_BASE
user/andre/mbuf_staging/mips/conf/BERI_SIM_BASE
- copied unchanged from r256921, head/sys/mips/conf/BERI_SIM_BASE
user/andre/mbuf_staging/mips/conf/BERI_SIM_SDROOT
- copied unchanged from r256921, head/sys/mips/conf/BERI_SIM_SDROOT
user/andre/mbuf_staging/powerpc/ofw/openpic_ofw.c
- copied unchanged from r256921, head/sys/powerpc/ofw/openpic_ofw.c
user/andre/mbuf_staging/powerpc/powerpc/clock.c
- copied unchanged from r256921, head/sys/powerpc/powerpc/clock.c
user/andre/mbuf_staging/powerpc/powerpc/nexus.c
- copied unchanged from r256921, head/sys/powerpc/powerpc/nexus.c
user/andre/mbuf_staging/powerpc/powerpc/vm_machdep.c
- copied unchanged from r256921, head/sys/powerpc/powerpc/vm_machdep.c
Directory Properties:
user/andre/mbuf_staging/dev/fdt/fdt_ic_if.m (props changed)
Deleted:
user/andre/mbuf_staging/arm/broadcom/bcm2835/dwc_otg_brcm.c
user/andre/mbuf_staging/dev/isf/
user/andre/mbuf_staging/powerpc/aim/clock.c
user/andre/mbuf_staging/powerpc/aim/nexus.c
user/andre/mbuf_staging/powerpc/aim/vm_machdep.c
user/andre/mbuf_staging/powerpc/booke/clock.c
user/andre/mbuf_staging/powerpc/booke/vm_machdep.c
user/andre/mbuf_staging/powerpc/mambo/mambo_openpic.c
user/andre/mbuf_staging/powerpc/mpc85xx/nexus.c
user/andre/mbuf_staging/powerpc/powermac/openpic_macio.c
user/andre/mbuf_staging/powerpc/powerpc/openpic_fdt.c
Modified:
user/andre/mbuf_staging/arm/allwinner/a10_wdog.c
user/andre/mbuf_staging/arm/broadcom/bcm2835/bcm2835_wdog.c
user/andre/mbuf_staging/arm/broadcom/bcm2835/files.bcm2835
user/andre/mbuf_staging/arm/freescale/imx/files.imx53
user/andre/mbuf_staging/boot/fdt/dts/digi-ccwmx53.dts
user/andre/mbuf_staging/cam/ata/ata_da.c
user/andre/mbuf_staging/cam/ata/ata_pmp.c
user/andre/mbuf_staging/cam/ata/ata_xpt.c
user/andre/mbuf_staging/cam/cam_ccb.h
user/andre/mbuf_staging/cam/cam_periph.c
user/andre/mbuf_staging/cam/cam_periph.h
user/andre/mbuf_staging/cam/cam_queue.c
user/andre/mbuf_staging/cam/cam_queue.h
user/andre/mbuf_staging/cam/cam_sim.c
user/andre/mbuf_staging/cam/cam_sim.h
user/andre/mbuf_staging/cam/cam_xpt.c
user/andre/mbuf_staging/cam/cam_xpt.h
user/andre/mbuf_staging/cam/cam_xpt_internal.h
user/andre/mbuf_staging/cam/cam_xpt_sim.h
user/andre/mbuf_staging/cam/ctl/ctl_frontend_cam_sim.c
user/andre/mbuf_staging/cam/ctl/scsi_ctl.c
user/andre/mbuf_staging/cam/scsi/scsi_cd.c
user/andre/mbuf_staging/cam/scsi/scsi_ch.c
user/andre/mbuf_staging/cam/scsi/scsi_da.c
user/andre/mbuf_staging/cam/scsi/scsi_enc.c
user/andre/mbuf_staging/cam/scsi/scsi_enc_internal.h
user/andre/mbuf_staging/cam/scsi/scsi_enc_safte.c
user/andre/mbuf_staging/cam/scsi/scsi_enc_ses.c
user/andre/mbuf_staging/cam/scsi/scsi_pass.c
user/andre/mbuf_staging/cam/scsi/scsi_pt.c
user/andre/mbuf_staging/cam/scsi/scsi_sa.c
user/andre/mbuf_staging/cam/scsi/scsi_sg.c
user/andre/mbuf_staging/cam/scsi/scsi_targ_bh.c
user/andre/mbuf_staging/cam/scsi/scsi_target.c
user/andre/mbuf_staging/cam/scsi/scsi_xpt.c
user/andre/mbuf_staging/cddl/contrib/opensolaris/uts/common/fs/zfs/arc.c
user/andre/mbuf_staging/cddl/contrib/opensolaris/uts/common/fs/zfs/vdev_geom.c
user/andre/mbuf_staging/cddl/contrib/opensolaris/uts/common/fs/zfs/zvol.c
user/andre/mbuf_staging/cddl/contrib/opensolaris/uts/intel/dtrace/fasttrap_isa.c
user/andre/mbuf_staging/cddl/dev/dtrace/amd64/dtrace_isa.c
user/andre/mbuf_staging/conf/files
user/andre/mbuf_staging/conf/files.powerpc
user/andre/mbuf_staging/dev/aha/aha.c
user/andre/mbuf_staging/dev/ahci/ahci.c
user/andre/mbuf_staging/dev/ahci/ahci.h
user/andre/mbuf_staging/dev/aic7xxx/aic79xx.c
user/andre/mbuf_staging/dev/aic7xxx/aic7xxx.c
user/andre/mbuf_staging/dev/ata/ata-all.c
user/andre/mbuf_staging/dev/buslogic/bt.c
user/andre/mbuf_staging/dev/cfi/cfi_bus_nexus.c
user/andre/mbuf_staging/dev/drm2/i915/i915_drv.c
user/andre/mbuf_staging/dev/fdt/fdt_common.c
user/andre/mbuf_staging/dev/fdt/fdt_common.h
user/andre/mbuf_staging/dev/fdt/fdt_mips.c
user/andre/mbuf_staging/dev/fdt/fdt_pci.c
user/andre/mbuf_staging/dev/fdt/fdt_powerpc.c
user/andre/mbuf_staging/dev/fdt/fdtbus.c
user/andre/mbuf_staging/dev/fdt/simplebus.c
user/andre/mbuf_staging/dev/firewire/sbp_targ.c
user/andre/mbuf_staging/dev/isp/isp_freebsd.c
user/andre/mbuf_staging/dev/md/md.c
user/andre/mbuf_staging/dev/mpt/mpt_cam.c
user/andre/mbuf_staging/dev/mvs/mvs.c
user/andre/mbuf_staging/dev/ofw/ofw_bus_subr.c
user/andre/mbuf_staging/dev/ofw/ofw_fdt.c
user/andre/mbuf_staging/dev/re/if_re.c
user/andre/mbuf_staging/dev/siis/siis.c
user/andre/mbuf_staging/dev/uart/uart_dev_pl011.c
user/andre/mbuf_staging/dev/usb/serial/uslcom.c
user/andre/mbuf_staging/dev/usb/usbdevs
user/andre/mbuf_staging/dev/xen/netback/netback.c
user/andre/mbuf_staging/geom/concat/g_concat.c
user/andre/mbuf_staging/geom/concat/g_concat.h
user/andre/mbuf_staging/geom/gate/g_gate.c
user/andre/mbuf_staging/geom/geom.h
user/andre/mbuf_staging/geom/geom_dev.c
user/andre/mbuf_staging/geom/geom_disk.c
user/andre/mbuf_staging/geom/geom_disk.h
user/andre/mbuf_staging/geom/geom_int.h
user/andre/mbuf_staging/geom/geom_io.c
user/andre/mbuf_staging/geom/geom_kern.c
user/andre/mbuf_staging/geom/geom_slice.c
user/andre/mbuf_staging/geom/geom_vfs.c
user/andre/mbuf_staging/geom/mirror/g_mirror.c
user/andre/mbuf_staging/geom/mirror/g_mirror.h
user/andre/mbuf_staging/geom/multipath/g_multipath.c
user/andre/mbuf_staging/geom/nop/g_nop.c
user/andre/mbuf_staging/geom/nop/g_nop.h
user/andre/mbuf_staging/geom/part/g_part.c
user/andre/mbuf_staging/geom/raid/g_raid.c
user/andre/mbuf_staging/geom/raid/md_ddf.c
user/andre/mbuf_staging/geom/raid/md_intel.c
user/andre/mbuf_staging/geom/raid/md_jmicron.c
user/andre/mbuf_staging/geom/raid/md_nvidia.c
user/andre/mbuf_staging/geom/raid/md_promise.c
user/andre/mbuf_staging/geom/raid/md_sii.c
user/andre/mbuf_staging/geom/stripe/g_stripe.c
user/andre/mbuf_staging/geom/stripe/g_stripe.h
user/andre/mbuf_staging/geom/zero/g_zero.c
user/andre/mbuf_staging/kern/kern_conf.c
user/andre/mbuf_staging/kern/kern_event.c
user/andre/mbuf_staging/kern/kern_resource.c
user/andre/mbuf_staging/kern/subr_devstat.c
user/andre/mbuf_staging/kern/subr_taskqueue.c
user/andre/mbuf_staging/kern/uipc_mbuf.c
user/andre/mbuf_staging/kern/uipc_syscalls.c
user/andre/mbuf_staging/kern/vfs_bio.c
user/andre/mbuf_staging/mips/beri/files.beri
user/andre/mbuf_staging/mips/conf/BERI_DE4.hints
user/andre/mbuf_staging/mips/conf/BERI_DE4_MDROOT
user/andre/mbuf_staging/mips/conf/BERI_DE4_SDROOT
user/andre/mbuf_staging/mips/conf/BERI_SIM_MDROOT
user/andre/mbuf_staging/mips/conf/BERI_TEMPLATE
user/andre/mbuf_staging/net/if_media.h
user/andre/mbuf_staging/pci/if_rlreg.h
user/andre/mbuf_staging/powerpc/aim/machdep.c
user/andre/mbuf_staging/powerpc/booke/machdep.c
user/andre/mbuf_staging/powerpc/booke/pmap.c
user/andre/mbuf_staging/powerpc/ofw/ofw_pci.c
user/andre/mbuf_staging/powerpc/ofw/ofw_pci.h
user/andre/mbuf_staging/powerpc/ofw/ofw_pcib_pci.c
user/andre/mbuf_staging/powerpc/ofw/ofw_pcibus.c
user/andre/mbuf_staging/powerpc/pseries/phyp_llan.c
user/andre/mbuf_staging/sys/eventvar.h
user/andre/mbuf_staging/sys/proc.h
user/andre/mbuf_staging/sys/resource.h
user/andre/mbuf_staging/sys/resourcevar.h
user/andre/mbuf_staging/ufs/ffs/ffs_extern.h
user/andre/mbuf_staging/ufs/ffs/ffs_softdep.c
user/andre/mbuf_staging/ufs/ffs/ffs_vfsops.c
user/andre/mbuf_staging/ufs/ffs/softdep.h
user/andre/mbuf_staging/ufs/ufs/ufs_extern.h
user/andre/mbuf_staging/ufs/ufs/ufsmount.h
Directory Properties:
user/andre/mbuf_staging/ (props changed)
user/andre/mbuf_staging/boot/ (props changed)
user/andre/mbuf_staging/cddl/contrib/opensolaris/ (props changed)
user/andre/mbuf_staging/conf/ (props changed)
Modified: user/andre/mbuf_staging/arm/allwinner/a10_wdog.c
==============================================================================
--- user/andre/mbuf_staging/arm/allwinner/a10_wdog.c Tue Oct 22 18:36:39 2013 (r256921)
+++ user/andre/mbuf_staging/arm/allwinner/a10_wdog.c Tue Oct 22 18:39:43 2013 (r256922)
@@ -150,6 +150,18 @@ a10wd_watchdog_fn(void *private, u_int c
(wd_intervals[i].value << WDOG_MODE_INTVL_SHIFT) |
WDOG_MODE_EN | WDOG_MODE_RST_EN);
WRITE(sc, WDOG_CTRL, WDOG_CTRL_RESTART);
+ *error = 0;
+ }
+ else {
+ /*
+ * Can't arm
+ * disable watchdog as watchdog(9) requires
+ */
+ device_printf(sc->dev,
+ "Can't arm, timeout is more than 16 sec\n");
+ mtx_unlock(&sc->mtx);
+ WRITE(sc, WDOG_MODE, 0);
+ return;
}
}
else
Modified: user/andre/mbuf_staging/arm/broadcom/bcm2835/bcm2835_wdog.c
==============================================================================
--- user/andre/mbuf_staging/arm/broadcom/bcm2835/bcm2835_wdog.c Tue Oct 22 18:36:39 2013 (r256921)
+++ user/andre/mbuf_staging/arm/broadcom/bcm2835/bcm2835_wdog.c Tue Oct 22 18:39:43 2013 (r256922)
@@ -76,11 +76,10 @@ struct bcmwd_softc {
int wdog_armed;
int wdog_period;
char wdog_passwd;
+ struct mtx mtx;
};
-#ifdef notyet
static void bcmwd_watchdog_fn(void *private, u_int cmd, int *error);
-#endif
static int
bcmwd_probe(device_t dev)
@@ -120,19 +119,59 @@ bcmwd_attach(device_t dev)
sc->bsh = rman_get_bushandle(sc->res);
bcmwd_lsc = sc;
-#ifdef notyet
+ mtx_init(&sc->mtx, "BCM2835 Watchdog", "bcmwd", MTX_DEF);
EVENTHANDLER_REGISTER(watchdog_list, bcmwd_watchdog_fn, sc, 0);
-#endif
+
return (0);
}
-#ifdef notyet
static void
bcmwd_watchdog_fn(void *private, u_int cmd, int *error)
{
- /* XXX: not yet */
+ struct bcmwd_softc *sc;
+ uint64_t sec;
+ uint32_t ticks, reg;
+
+ sc = private;
+ mtx_lock(&sc->mtx);
+
+ cmd &= WD_INTERVAL;
+
+ if (cmd > 0) {
+ sec = ((uint64_t)1 << (cmd & WD_INTERVAL)) / 1000000000;
+ ticks = (sec << 16) & BCM2835_WDOG_TIME_MASK;
+ if (ticks == 0) {
+ /*
+ * Can't arm
+ * disable watchdog as watchdog(9) requires
+ */
+ device_printf(sc->dev,
+ "Can't arm, timeout is less than 1 second\n");
+ WRITE(sc, BCM2835_RSTC_REG,
+ (BCM2835_PASWORD << BCM2835_PASSWORD_SHIFT) |
+ BCM2835_RSTC_RESET);
+ mtx_unlock(&sc->mtx);
+ return;
+ }
+
+ reg = (BCM2835_PASWORD << BCM2835_PASSWORD_SHIFT) | ticks;
+ WRITE(sc, BCM2835_WDOG_REG, reg);
+
+ reg = READ(sc, BCM2835_RSTC_REG);
+ reg &= BCM2835_RSTC_WRCFG_CLR;
+ reg |= BCM2835_RSTC_WRCFG_FULL_RESET;
+ reg |= (BCM2835_PASWORD << BCM2835_PASSWORD_SHIFT);
+ WRITE(sc, BCM2835_RSTC_REG, reg);
+
+ *error = 0;
+ }
+ else
+ WRITE(sc, BCM2835_RSTC_REG,
+ (BCM2835_PASWORD << BCM2835_PASSWORD_SHIFT) |
+ BCM2835_RSTC_RESET);
+
+ mtx_unlock(&sc->mtx);
}
-#endif
void
bcmwd_watchdog_reset()
Modified: user/andre/mbuf_staging/arm/broadcom/bcm2835/files.bcm2835
==============================================================================
--- user/andre/mbuf_staging/arm/broadcom/bcm2835/files.bcm2835 Tue Oct 22 18:36:39 2013 (r256921)
+++ user/andre/mbuf_staging/arm/broadcom/bcm2835/files.bcm2835 Tue Oct 22 18:39:43 2013 (r256922)
@@ -11,7 +11,7 @@ arm/broadcom/bcm2835/bcm2835_systimer.c
arm/broadcom/bcm2835/bcm2835_wdog.c standard
arm/broadcom/bcm2835/bus_space.c optional fdt
arm/broadcom/bcm2835/common.c optional fdt
-arm/broadcom/bcm2835/dwc_otg_brcm.c optional dwcotg
+dev/usb/controller/dwc_otg_fdt.c optional dwcotg
arm/arm/bus_space_generic.c standard
arm/arm/bus_space_asm_generic.S standard
Copied: user/andre/mbuf_staging/arm/conf/IMX53-QSB (from r256921, head/sys/arm/conf/IMX53-QSB)
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ user/andre/mbuf_staging/arm/conf/IMX53-QSB Tue Oct 22 18:39:43 2013 (r256922, copy of r256921, head/sys/arm/conf/IMX53-QSB)
@@ -0,0 +1,179 @@
+# Kernel configuration for Freescale i.MX53 Quick Start Board
+#
+# For more information on this file, please read the config(5) manual page,
+# and/or the handbook section on Kernel Configuration Files:
+#
+# http://www.FreeBSD.org/doc/en_US.ISO8859-1/books/handbook/kernelconfig-config.html
+#
+# The handbook is also available locally in /usr/share/doc/handbook
+# if you've installed the doc distribution, otherwise always see the
+# FreeBSD World Wide Web server (http://www.FreeBSD.org/) for the
+# latest information.
+#
+# An exhaustive list of options and more detailed explanations of the
+# device lines is also present in the ../../conf/NOTES and NOTES files.
+# If you are in doubt as to the purpose or necessity of a line, check first
+# in NOTES.
+#
+# $FreeBSD$
+
+ident IMX53-QSB
+
+include "../freescale/imx/std.imx53"
+
+makeoptions DEBUG=-g # Build kernel with gdb(1) debug symbols
+#options DEBUG
+
+options HZ=250 # 4ms scheduling quantum
+options SCHED_4BSD # 4BSD scheduler
+#options PREEMPTION # Enable kernel thread preemption
+options INET # InterNETworking
+options INET6 # IPv6 communications protocols
+#options SCTP # Stream Control Transmission Protocol
+options FFS # Berkeley Fast Filesystem
+options SOFTUPDATES # Enable FFS soft updates support
+options UFS_ACL # Support for access control lists
+options UFS_DIRHASH # Improve performance on big directories
+options UFS_GJOURNAL # Enable gjournal-based UFS journaling
+#options MD_ROOT # MD is a potential root device
+options NFSCL # New Network Filesystem Client
+#options NFSD # New Network Filesystem Server
+options NFSLOCKD # Network Lock Manager
+options NFS_ROOT # NFS usable as /, requires NFSCL
+options MSDOSFS # MSDOS Filesystem
+options CD9660 # ISO 9660 Filesystem
+#options PROCFS # Process filesystem (requires PSEUDOFS)
+options PSEUDOFS # Pseudo-filesystem framework
+options TMPFS # TMP Memory Filesystem
+options GEOM_PART_GPT # GUID Partition Tables.
+options GEOM_LABEL # Provides labelization
+#options COMPAT_FREEBSD5 # Compatible with FreeBSD5
+#options COMPAT_FREEBSD6 # Compatible with FreeBSD6
+#options COMPAT_FREEBSD7 # Compatible with FreeBSD7
+options SCSI_DELAY=5000 # Delay (in ms) before probing SCSI
+options KTRACE # ktrace(1) support
+options SYSVSHM # SYSV-style shared memory
+options SYSVMSG # SYSV-style message queues
+options SYSVSEM # SYSV-style semaphores
+options _KPOSIX_PRIORITY_SCHEDULING # POSIX P1003_1B real-time extensions
+options INCLUDE_CONFIG_FILE # Include this file in kernel
+options VFP # vfp/neon
+
+# required for netbooting
+#options BOOTP
+#options BOOTP_COMPAT
+#options BOOTP_NFSROOT
+#options BOOTP_NFSV3
+#options BOOTP_WIRED_TO=ue0
+
+#options ROOTDEVNAME=\"ufs:ada0s2a\"
+
+
+# kernel/memory size reduction
+#options MUTEX_NOINLINE
+#options NO_FFS_SNAPSHOT
+#options NO_SWAPPING
+#options NO_SYSCTL_DESCR
+#options RWLOCK_NOINLINE
+
+# Debugging support. Always need this:
+options KDB # Enable kernel debugger support.
+# For minimum debugger support (stable branch) use:
+#options KDB_TRACE # Print a stack trace for a panic.
+# For full debugger support use this instead:
+options DDB # Support DDB.
+#options GDB # Support remote GDB.
+#options DEADLKRES # Enable the deadlock resolver
+#options INVARIANTS # Enable calls of extra sanity checking
+#options INVARIANT_SUPPORT # Extra sanity checks of internal structures, required by INVARIANTS
+#options WITNESS # Enable checks to detect deadlocks and cycles
+
+# The `bpf' device enables the Berkeley Packet Filter.
+# Be aware of the administrative consequences of enabling this!
+# Note that 'bpf' is required for DHCP.
+device bpf # Berkeley packet filter
+
+# Pseudo devices.
+device loop # Network loopback
+device random # Entropy device
+device ether # Ethernet support
+#device vlan # 802.1Q VLAN support
+#device tun # Packet tunnel.
+device md # Memory "disks"
+#device gif # IPv6 and IPv4 tunneling
+#device faith # IPv6-to-IPv4 relaying (translation)
+#device firmware # firmware assist module
+
+# Ethernet
+device ffec # Freescale Fast Ethernet Controller
+device miibus # Standard mii bus
+
+# Serial (COM) ports
+device uart # Multi-uart driver
+options ALT_BREAK_TO_DEBUGGER
+
+#device ata
+#device atapci # Only for helper functions
+#device imxata
+#options ATA_STATIC_ID # Static device numbering
+
+device iomux # IO Multiplexor
+
+device gpio
+device gpioled
+
+device fsliic
+device iic
+device iicbus
+
+# SCSI peripherals
+device scbus # SCSI bus (required for SCSI)
+device da # Direct Access (disks)
+device cd # CD
+device pass # Passthrough device (direct SCSI access)
+
+# USB support
+#options USB_DEBUG # enable debug msgs
+device ehci # OHCI USB interface
+device usb # USB Bus (required)
+device umass # Disks/Mass storage - Requires scbus and da
+#device uhid # "Human Interface Devices"
+#device ukbd # Allow keyboard like HIDs to control console
+#device ums
+
+# USB Ethernet, requires miibus
+#device miibus
+#device aue # ADMtek USB Ethernet
+#device axe # ASIX Electronics USB Ethernet
+#device cdce # Generic USB over Ethernet
+#device cue # CATC USB Ethernet
+#device kue # Kawasaki LSI USB Ethernet
+#device rue # RealTek RTL8150 USB Ethernet
+#device udav # Davicom DM9601E USB
+
+# USB Wireless
+#device rum # Ralink Technology RT2501USB wireless NICs
+
+# Watchdog timer.
+# WARNING: can't be disabled!!!
+device imxwdt # Watchdog
+
+# Wireless NIC cards
+device wlan # 802.11 support
+device wlan_wep # 802.11 WEP support
+device wlan_ccmp # 802.11 CCMP support
+device wlan_tkip # 802.11 TKIP support
+device wlan_amrr # AMRR transmit rate control algorithm
+
+# Flattened Device Tree
+options FDT
+options FDT_DTB_STATIC
+makeoptions FDT_DTS_FILE=imx53-qsb.dts
+
+# NOTE: serial console will be disabled if syscons enabled
+# Uncomment following lines for framebuffer/syscons support
+#device sc
+#device kbdmux
+#options SC_DFLT_FONT # compile font in
+#makeoptions SC_DFLT_FONT=cp437
+
Modified: user/andre/mbuf_staging/arm/freescale/imx/files.imx53
==============================================================================
--- user/andre/mbuf_staging/arm/freescale/imx/files.imx53 Tue Oct 22 18:36:39 2013 (r256921)
+++ user/andre/mbuf_staging/arm/freescale/imx/files.imx53 Tue Oct 22 18:39:43 2013 (r256922)
@@ -12,8 +12,11 @@ arm/freescale/imx/imx53_machdep.c standa
arm/freescale/imx/common.c standard
arm/freescale/imx/bus_space.c standard
-# Dummy serial console
-arm/freescale/imx/console.c standard
+# Special serial console for debuging early boot code
+#arm/freescale/imx/console.c standard
+
+# UART driver (includes serial console support)
+dev/uart/uart_dev_imx.c optional uart
# TrustZone Interrupt Controller
arm/freescale/imx/tzic.c standard
@@ -33,9 +36,6 @@ arm/freescale/imx/imx51_ccm.c standard
# i.MX5xx PATA controller
dev/ata/chipsets/ata-fsl.c optional imxata
-# UART driver
-#dev/uart/uart_dev_imx.c optional uart
-
# USB join controller (1 OTG, 3 EHCI)
dev/usb/controller/ehci_imx.c optional ehci
@@ -49,3 +49,6 @@ dev/ofw/ofw_iicbus.c optional fsliic
# IPU - Image Processing Unit (frame buffer also)
arm/freescale/imx/imx51_ipuv3.c optional sc
+# Fast Ethernet Controller
+dev/ffec/if_ffec.c optional ffec
+
Copied: user/andre/mbuf_staging/boot/fdt/dts/beri-sim.dts (from r256921, head/sys/boot/fdt/dts/beri-sim.dts)
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ user/andre/mbuf_staging/boot/fdt/dts/beri-sim.dts Tue Oct 22 18:39:43 2013 (r256922, copy of r256921, head/sys/boot/fdt/dts/beri-sim.dts)
@@ -0,0 +1,144 @@
+/*-
+ * Copyright (c) 2012-2013 Robert N. M. Watson
+ * Copyright (c) 2013 SRI International
+ * All rights reserved.
+ *
+ * This software was developed by SRI International and the University of
+ * Cambridge Computer Laboratory under DARPA/AFRL contract (FA8750-10-C-0237)
+ * ("CTSRD"), as part of the DARPA CRASH research programme.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ */
+
+/dts-v1/;
+
+/*
+ * Device names here have been largely made up on the spot, especially for the
+ * "compatible" strings, and might want to be revised.
+ *
+ * For now, use 32-bit addressing as our Avalon bus is 32-bit. However, in
+ * the future, we should likely change to 64-bit.
+ */
+
+/ {
+ model = "SRI/Cambridge BERI simulation";
+ compatible = "sri-cambridge,beri-sim";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ /*
+ * Secondary CPUs all start disabled and use the
+ * spin-table enable method. cpu-release-addr must be
+ * specified for each cpu other than cpu at 0. Values of
+ * cpu-release-addr grow down from 0x100000 (kernel).
+ */
+ status = "disabled";
+ enable-method = "spin-table";
+
+ cpu at 0 {
+ device-type = "cpu";
+ compatible = "sri-cambridge,beri";
+
+ reg = <0>;
+ status = "okay";
+ };
+
+/*
+ cpu at 1 {
+ device-type = "cpu";
+ compatible = "sri-cambridge,beri";
+
+ reg = <1>;
+ // XXX: should we need cached prefix?
+ cpu-release-addr = <0xffffffff 0x800fffe0>;
+ };
+*/
+ };
+
+ soc {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ #interrupt-cells = <1>;
+
+ /*
+ * Declare mips,mips4k since BERI doesn't (yet) have a PIC, so
+ * we use mips4k coprocessor 0 interrupt management directly.
+ */
+ compatible = "simple-bus", "mips,mips4k";
+ ranges = <>;
+
+ memory {
+ device_type = "memory";
+ reg = <0x0 0x4000000>; // 64M at 0x0
+ };
+
+ beripic: beripic at 7f804000 {
+ compatible = "sri-cambridge,beri-pic";
+ interrupt-controller;
+ #address-cells = <0>;
+ #interrupt-cells = <1>;
+ reg = <0x7f804000 0x400
+ 0x7f806000 0x10
+ 0x7f806080 0x10
+ 0x7f806100 0x10>;
+ interrupts = <0 1 2 3 4>;
+ hard-interrupt-sources = <64>;
+ soft-interrupt-sources = <64>;
+ };
+
+ serial at 7f000000 {
+ compatible = "altera,jtag_uart-11_0";
+ reg = <0x7f000000 0x40>;
+ interrupts = <0>;
+ interrupt-parent = <&beripic>;
+ };
+
+ serial at 7f001000 {
+ compatible = "altera,jtag_uart-11_0";
+ reg = <0x7f001000 0x40>;
+ };
+
+ serial at 7f002000 {
+ compatible = "altera,jtag_uart-11_0";
+ reg = <0x7f002000 0x40>;
+ };
+
+ sdcard at 7f008000 {
+ compatible = "altera,sdcard_11_2011";
+ reg = <0x7f008000 0x400>;
+ };
+
+ avgen at 0x7f00a000 {
+ compatible = "sri-cambridge,avgen";
+ reg = <0x7f00a000 0x14>;
+ sri-cambridge,width = <4>;
+ sri-cambridge,fileio = "rw";
+ sri-cambridge,devname = "berirom";
+ };
+ };
+};
Copied: user/andre/mbuf_staging/boot/fdt/dts/beripad-de4.dts (from r256921, head/sys/boot/fdt/dts/beripad-de4.dts)
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ user/andre/mbuf_staging/boot/fdt/dts/beripad-de4.dts Tue Oct 22 18:39:43 2013 (r256922, copy of r256921, head/sys/boot/fdt/dts/beripad-de4.dts)
@@ -0,0 +1,266 @@
+/*-
+ * Copyright (c) 2012-2013 Robert N. M. Watson
+ * Copyright (c) 2013 SRI International
+ * All rights reserved.
+ *
+ * This software was developed by SRI International and the University of
+ * Cambridge Computer Laboratory under DARPA/AFRL contract (FA8750-10-C-0237)
+ * ("CTSRD"), as part of the DARPA CRASH research programme.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ */
+
+/dts-v1/;
+
+/*
+ * Device names here have been largely made up on the spot, especially for the
+ * "compatible" strings, and might want to be revised.
+ *
+ * For now, use 32-bit addressing as our Avalon bus is 32-bit. However, in
+ * the future, we should likely change to 64-bit.
+ */
+
+/ {
+ model = "SRI/Cambridge BeriPad (DE4)";
+ compatible = "sri-cambridge,beripad-de4";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ /*
+ * Secondary CPUs all start disabled and use the
+ * spin-table enable method. cpu-release-addr must be
+ * specified for each cpu other than cpu at 0. Values of
+ * cpu-release-addr grow down from 0x100000 (kernel).
+ */
+ status = "disabled";
+ enable-method = "spin-table";
+
+ cpu at 0 {
+ device-type = "cpu";
+ compatible = "sri-cambridge,beri";
+
+ reg = <0>;
+ status = "okay";
+ };
+
+/*
+ cpu at 1 {
+ device-type = "cpu";
+ compatible = "sri-cambridge,beri";
+
+ reg = <1>;
+ // XXX: should we need cached prefix?
+ cpu-release-addr = <0xffffffff 0x800fffe0>;
+ };
+*/
+ };
+
+ soc {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ #interrupt-cells = <1>;
+
+ /*
+ * Declare mips,mips4k since BERI doesn't (yet) have a PIC, so
+ * we use mips4k coprocessor 0 interrupt management directly.
+ */
+ compatible = "simple-bus", "mips,mips4k";
+ ranges = <>;
+
+ memory {
+ device_type = "memory";
+ reg = <0x0 0x40000000>; // 1G at 0x0
+ };
+
+ beripic: beripic at 7f804000 {
+ compatible = "sri-cambridge,beri-pic";
+ interrupt-controller;
+ #address-cells = <0>;
+ #interrupt-cells = <1>;
+ reg = <0x7f804000 0x400
+ 0x7f806000 0x10
+ 0x7f806080 0x10
+ 0x7f806100 0x10>;
+ interrupts = <0 1 2 3 4>;
+ hard-interrupt-sources = <64>;
+ soft-interrupt-sources = <64>;
+ };
+
+ serial at 7f002100 {
+ compatible = "ns16550";
+ reg = <0x7f002100 0x20>;
+ reg-shift = <2>;
+ clock-frequency = <50000000>;
+ interrupts = <6>;
+ interrupt-parent = <&beripic>;
+ };
+
+ serial at 7f000000 {
+ compatible = "altera,jtag_uart-11_0";
+ reg = <0x7f000000 0x40>;
+ interrupts = <0>;
+ interrupt-parent = <&beripic>;
+ };
+
+ serial at 7f001000 {
+ compatible = "altera,jtag_uart-11_0";
+ reg = <0x7f001000 0x40>;
+ };
+
+ serial at 7f002000 {
+ compatible = "altera,jtag_uart-11_0";
+ reg = <0x7f002000 0x40>;
+ };
+
+ sdcard at 7f008000 {
+ compatible = "altera,sdcard_11_2011";
+ reg = <0x7f008000 0x400>;
+ };
+
+ led at 7f006000 {
+ compatible = "sri-cambridge,de4led";
+ reg = <0x7f006000 0x1>;
+ };
+
+ /*
+ * XXX-BZ keep flash before ethernet so that atse can read the
+ * Ethernet addresses for now.
+ */
+ flash at 74000000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "cfi-flash";
+ reg = <0x74000000 0x4000000>;
+
+ /* Board configuration */
+ partition at 0 {
+ reg = <0x0 0x20000>;
+ label = "config";
+ };
+
+ /* Power up FPGA image */
+ partition at 20000 {
+ reg = <0x20000 0xc00000>;
+ label = "fpga0";
+ };
+
+ /* Secondary FPGA image (on RE_CONFIGn button) */
+ partition at C20000 {
+ reg = <0xc20000 0xc00000>;
+ label = "fpga1";
+ };
+
+ /* Space for operating system use */
+ partition at 1820000 {
+ reg = <0x1820000 0x027c0000>;
+ label = "os";
+ };
+
+ /* Second stage bootloader */
+ parition at 3fe0000 {
+ reg = <0x3fe0000 0x20000>;
+ label = "boot";
+ };
+ };
+
+ ethernet at 7f007000 {
+ compatible = "altera,atse";
+ // MAC, RX+RXC, TX+TXC.
+ reg = <0x7f007000 0x400
+ 0x7f007500 0x8
+ 0x7f007520 0x20
+ 0x7f007400 0x8
+ 0x7f007420 0x20>;
+ // RX, TX
+ interrupts = <1 2>;
+ interrupt-parent = <&beripic>;
+ };
+
+ ethernet at 7f005000 {
+ compatible = "altera,atse";
+ // MAC, RX+RXC, TX+TXC.
+ reg = <0x7f005000 0x400
+ 0x7f005500 0x8
+ 0x7f005520 0x20
+ 0x7f005400 0x8
+ 0x7f005420 0x20>;
+ // RX, TX
+ interrupts = <11 12>;
+ interrupt-parent = <&beripic>;
+ };
+
+ touchscreen at 70400000 {
+ compatible = "sri-cambridge,mtl";
+ reg = <0x70400000 0x1000
+ 0x70000000 0x177000
+ 0x70177000 0x2000>;
+ };
+
+ usb at 0x7f100000 {
+ compatible = "philips,isp1761";
+ reg = <0x7f100000 0x40000
+ 0x7f140000 0x4>;
+ // IRQ 4 is DC, IRQ 5 is HC.
+ interrupts = <4 5>;
+ interrupt-parent = <&beripic>;
+ };
+
+ avgen at 0x7f009000 {
+ compatible = "sri-cambridge,avgen";
+ reg = <0x7f009000 0x2>;
+ sri-cambridge,width = <1>;
+ sri-cambridge,fileio = "r";
+ sri-cambridge,devname = "de4bsw";
+ };
+
+ avgen at 0x7f00a000 {
+ compatible = "sri-cambridge,avgen";
+ reg = <0x7f00a000 0x14>;
+ sri-cambridge,width = <4>;
+ sri-cambridge,fileio = "rw";
+ sri-cambridge,devname = "berirom";
+ };
+
+ avgen at 0x7f00c000 {
+ compatible = "sri-cambridge,avgen";
+ reg = <0x7f00c000 0x8>;
+ sri-cambridge,width = <4>;
+ sri-cambridge,fileio = "rw";
+ sri-cambridge,devname = "de4tempfan";
+ };
+
+ avgen at 0x7f100000 {
+ compatible = "sri-cambridge,avgen";
+ reg = <0x7f100000 0x40000>;
+ sri-cambridge,width = <4>;
+ sri-cambridge,fileio = "r";
+ sri-cambridge,devname = "usbmem";
+ };
+
+ };
+};
Modified: user/andre/mbuf_staging/boot/fdt/dts/digi-ccwmx53.dts
==============================================================================
--- user/andre/mbuf_staging/boot/fdt/dts/digi-ccwmx53.dts Tue Oct 22 18:36:39 2013 (r256921)
+++ user/andre/mbuf_staging/boot/fdt/dts/digi-ccwmx53.dts Tue Oct 22 18:39:43 2013 (r256922)
@@ -70,9 +70,9 @@
};
/* UART1, console */
- UART1: serial at 53fbc000 {
+ console: serial at 53fbc000 {
status = "okay";
- clock-frequency = <3000000>; /* XXX */
+ clock-frequency = <0>; /* won't load w/o this */
};
clock at 53fd4000 {
@@ -111,13 +111,12 @@
};
aliases {
- UART1 = &UART1;
SSI2 = &SSI2;
};
chosen {
bootargs = "-v";
- stdin = "UART1";
- stdout = "UART1";
+ stdin = &console;
+ stdout = &console;
};
};
Copied: user/andre/mbuf_staging/boot/fdt/dts/imx53-qsb.dts (from r256921, head/sys/boot/fdt/dts/imx53-qsb.dts)
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ user/andre/mbuf_staging/boot/fdt/dts/imx53-qsb.dts Tue Oct 22 18:39:43 2013 (r256922, copy of r256921, head/sys/boot/fdt/dts/imx53-qsb.dts)
@@ -0,0 +1,126 @@
+/*
+ * Copyright (c) 2012 The FreeBSD Foundation
+ * Copyright (c) 2013 Rui Paulo
+ * All rights reserved.
+ *
+ * This software was developed by Semihalf under sponsorship from
+ * the FreeBSD Foundation.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * Freescale i.MX53 Quick Start Board
+ *
+ * $FreeBSD$
+ */
+
+/dts-v1/;
+/include/ "imx53x.dtsi"
+
+/ {
+ model = "Freescale i.MX53 Quick Start Board";
+ compatible = "fsl,imx53-qsb", "fsl,imx53";
+
+ memory {
+ /* RAM 512M */
+ reg = <0x70000000 0x20000000>;
+ };
+
+ localbus at 18000000 {
+ ipu3 at 18000000 {
+ status = "okay";
+ };
+ };
+
+ soc at 50000000 {
+ aips at 50000000 {
+ spba at 50000000 {
+ esdhc at 50004000 {
+ clock-frequency = <216000000>;
+ status = "okay";
+ };
+ esdhc at 50008000 {
+ clock-frequency = <216000000>;
+ status = "okay";
+ };
+ SSI2: ssi at 50014000 {
+ status = "okay";
+ };
+ };
+ timer at 53fa0000 {
+ status = "okay";
+ };
+
+ /* UART1, console */
+ console: serial at 53fbc000 {
+ status = "okay";
+ clock-frequency = <0>; /* won't load w/o this */
+ };
+
+ clock at 53fd4000 {
+ status = "okay";
+ };
+ gpio at 53f84000 {
+ status = "okay";
+ };
+ gpio at 53f88000 {
+ status = "okay";
+ };
+ gpio at 53f8c000 {
+ status = "okay";
+ };
+ gpio at 53f90000 {
+ status = "okay";
+ };
+ wdog at 53f98000 {
+ status = "okay";
+ };
+ };
+ aips at 60000000 {
+ ethernet at 63fec000 {
+ status = "okay";
+ phy-mode = "rmii";
+ }
+ i2c at 63fc4000 {
+ status = "okay";
+ };
+ i2c at 63fc8000 {
+ status = "okay";
+ };
+ audmux at 63fd4000 {
+ status = "okay";
+ };
+ ide at 63fe0000 {
+ status = "okay";
+ };
+ };
+ };
+
+ aliases {
+ SSI2 = &SSI2;
+ };
+
+ chosen {
+ bootargs = "-v";
+ stdin = &console;
+ stdout = &console;
+ };
+};
Modified: user/andre/mbuf_staging/cam/ata/ata_da.c
==============================================================================
--- user/andre/mbuf_staging/cam/ata/ata_da.c Tue Oct 22 18:36:39 2013 (r256921)
+++ user/andre/mbuf_staging/cam/ata/ata_da.c Tue Oct 22 18:39:43 2013 (r256922)
@@ -103,7 +103,6 @@ typedef enum {
ADA_CCB_RAHEAD = 0x01,
ADA_CCB_WCACHE = 0x02,
ADA_CCB_BUFFER_IO = 0x03,
- ADA_CCB_WAITING = 0x04,
ADA_CCB_DUMP = 0x05,
ADA_CCB_TRIM = 0x06,
ADA_CCB_TYPE_MASK = 0x0F,
@@ -123,10 +122,9 @@ struct disk_params {
#define TRIM_MAX_BLOCKS 8
#define TRIM_MAX_RANGES (TRIM_MAX_BLOCKS * ATA_DSM_BLK_RANGES)
-#define TRIM_MAX_BIOS (TRIM_MAX_RANGES * 4)
struct trim_request {
uint8_t data[TRIM_MAX_RANGES * ATA_DSM_RANGE_SIZE];
- struct bio *bps[TRIM_MAX_BIOS];
+ TAILQ_HEAD(, bio) bps;
};
struct ada_softc {
@@ -155,6 +153,7 @@ struct ada_softc {
struct sysctl_oid *sysctl_tree;
struct callout sendordered_c;
struct trim_request trim_req;
+ int refcount;
};
struct ada_quirk_entry {
@@ -638,14 +637,8 @@ adaclose(struct disk *dp)
int error;
periph = (struct cam_periph *)dp->d_drv1;
- cam_periph_lock(periph);
- if (cam_periph_hold(periph, PRIBIO) != 0) {
- cam_periph_unlock(periph);
- cam_periph_release(periph);
- return (0);
- }
-
softc = (struct ada_softc *)periph->softc;
+ cam_periph_lock(periph);
CAM_DEBUG(periph->path, CAM_DEBUG_TRACE | CAM_DEBUG_PERIPH,
("adaclose\n"));
@@ -653,7 +646,8 @@ adaclose(struct disk *dp)
/* We only sync the cache if the drive is capable of it. */
if ((softc->flags & ADA_FLAG_DIRTY) != 0 &&
(softc->flags & ADA_FLAG_CAN_FLUSHCACHE) != 0 &&
- (periph->flags & CAM_PERIPH_INVALID) == 0) {
+ (periph->flags & CAM_PERIPH_INVALID) == 0 &&
+ cam_periph_hold(periph, PRIBIO) == 0) {
ccb = cam_periph_getccb(periph, CAM_PRIORITY_NORMAL);
cam_fill_ataio(&ccb->ataio,
@@ -677,10 +671,13 @@ adaclose(struct disk *dp)
else
softc->flags &= ~ADA_FLAG_DIRTY;
xpt_release_ccb(ccb);
+ cam_periph_unhold(periph);
}
softc->flags &= ~ADA_FLAG_OPEN;
- cam_periph_unhold(periph);
+
+ while (softc->refcount != 0)
+ cam_periph_sleep(periph, &softc->refcount, PRIBIO, "adaclose", 1);
cam_periph_unlock(periph);
cam_periph_release(periph);
return (0);
@@ -690,23 +687,15 @@ static void
adaschedule(struct cam_periph *periph)
{
struct ada_softc *softc = (struct ada_softc *)periph->softc;
- uint32_t prio;
if (softc->state != ADA_STATE_NORMAL)
return;
- /* Check if cam_periph_getccb() was called. */
- prio = periph->immediate_priority;
-
/* Check if we have more work to do. */
if (bioq_first(&softc->bio_queue) ||
(!softc->trim_running && bioq_first(&softc->trim_queue))) {
- prio = CAM_PRIORITY_NORMAL;
+ xpt_schedule(periph, CAM_PRIORITY_NORMAL);
}
-
- /* Schedule CCB if any of above is true. */
- if (prio != CAM_PRIORITY_NONE)
- xpt_schedule(periph, prio);
}
/*
@@ -970,7 +959,7 @@ adaasync(void *callback_arg, u_int32_t c
status = cam_periph_alloc(adaregister, adaoninvalidate,
*** DIFF OUTPUT TRUNCATED AT 1000 LINES ***
More information about the svn-src-user
mailing list