svn commit: r239404 - in user/jceel/soc2012_armv6/sys/arm: conf ti
Jakub Wojciech Klama
jceel at FreeBSD.org
Sun Aug 19 20:28:49 UTC 2012
Author: jceel
Date: Sun Aug 19 20:28:48 2012
New Revision: 239404
URL: http://svn.freebsd.org/changeset/base/239404
Log:
Bring TI AINTC to INTRNG interface and update BEAGLEBONE kernel config
accordingly.
Modified:
user/jceel/soc2012_armv6/sys/arm/conf/BEAGLEBONE
user/jceel/soc2012_armv6/sys/arm/ti/aintc.c
Modified: user/jceel/soc2012_armv6/sys/arm/conf/BEAGLEBONE
==============================================================================
--- user/jceel/soc2012_armv6/sys/arm/conf/BEAGLEBONE Sun Aug 19 20:24:46 2012 (r239403)
+++ user/jceel/soc2012_armv6/sys/arm/conf/BEAGLEBONE Sun Aug 19 20:28:48 2012 (r239404)
@@ -46,6 +46,7 @@ options SYSVSEM #SYSV-style semaphore
options _KPOSIX_PRIORITY_SCHEDULING #Posix P1003_1B real-time extensions
options KBD_INSTALL_CDEV # install a CDEV entry in /dev
options PREEMPTION
+options ARM_INTRNG
# Debugging
makeoptions DEBUG=-g #Build kernel with gdb(1) debug symbols
Modified: user/jceel/soc2012_armv6/sys/arm/ti/aintc.c
==============================================================================
--- user/jceel/soc2012_armv6/sys/arm/ti/aintc.c Sun Aug 19 20:24:46 2012 (r239403)
+++ user/jceel/soc2012_armv6/sys/arm/ti/aintc.c Sun Aug 19 20:28:48 2012 (r239404)
@@ -45,6 +45,8 @@ __FBSDID("$FreeBSD$");
#include <dev/ofw/ofw_bus.h>
#include <dev/ofw/ofw_bus_subr.h>
+#include "pic_if.h"
+
#define INTC_REVISION 0x00
#define INTC_SYSCONFIG 0x10
#define INTC_SYSSTATUS 0x14
@@ -61,22 +63,27 @@ struct ti_aintc_softc {
struct resource * aintc_res[3];
bus_space_tag_t aintc_bst;
bus_space_handle_t aintc_bsh;
+ void * aintc_intrhand;
uint8_t ver;
};
static struct resource_spec ti_aintc_spec[] = {
{ SYS_RES_MEMORY, 0, RF_ACTIVE },
+ { SYS_RES_IRQ, 0, RF_ACTIVE },
{ -1, 0 }
};
-
-static struct ti_aintc_softc *ti_aintc_sc = NULL;
-
-#define aintc_read_4(reg) \
- bus_space_read_4(ti_aintc_sc->aintc_bst, ti_aintc_sc->aintc_bsh, reg)
-#define aintc_write_4(reg, val) \
- bus_space_write_4(ti_aintc_sc->aintc_bst, ti_aintc_sc->aintc_bsh, reg, val)
-
+#define aintc_read_4(_sc,reg) \
+ bus_space_read_4(_sc->aintc_bst, _sc->aintc_bsh, (reg))
+#define aintc_write_4(_sc, reg, val) \
+ bus_space_write_4(_sc->aintc_bst, _sc->aintc_bsh, (reg), (val))
+
+static int ti_aintc_probe(device_t);
+static int ti_aintc_attach(device_t);
+static void ti_aintc_mask(device_t, int);
+static void ti_aintc_unmask(device_t, int);
+static void ti_aintc_eoi(device_t, int);
+static int ti_aintc_intr(void *);
static int
ti_aintc_probe(device_t dev)
@@ -95,9 +102,6 @@ ti_aintc_attach(device_t dev)
sc->sc_dev = dev;
- if (ti_aintc_sc)
- return (ENXIO);
-
if (bus_alloc_resources(dev, ti_aintc_spec, sc->aintc_res)) {
device_printf(dev, "could not allocate resources\n");
return (ENXIO);
@@ -106,26 +110,39 @@ ti_aintc_attach(device_t dev)
sc->aintc_bst = rman_get_bustag(sc->aintc_res[0]);
sc->aintc_bsh = rman_get_bushandle(sc->aintc_res[0]);
- ti_aintc_sc = sc;
+ arm_register_pic(dev);
- x = aintc_read_4(INTC_REVISION);
+ if (bus_setup_intr(dev, sc->aintc_res[1],
+ INTR_TYPE_MISC | INTR_CONTROLLER, ti_aintc_intr, NULL,
+ sc, &sc->aintc_intrhand)) {
+ device_printf(dev, "could not install interrupt handler\n");
+ return (ENXIO);
+ }
+
+ x = aintc_read_4(sc, INTC_REVISION);
device_printf(dev, "Revision %u.%u\n",(x >> 4) & 0xF, x & 0xF);
/* SoftReset */
- aintc_write_4(INTC_SYSCONFIG, 2);
+ aintc_write_4(sc, INTC_SYSCONFIG, 2);
/* Wait for reset to complete */
- while(!(aintc_read_4(INTC_SYSSTATUS) & 1));
+ while(!(aintc_read_4(sc, INTC_SYSSTATUS) & 1));
/*Set Priority Threshold */
- aintc_write_4(INTC_THRESHOLD, 0xFF);
+ aintc_write_4(sc, INTC_THRESHOLD, 0xFF);
return (0);
}
static device_method_t ti_aintc_methods[] = {
+ /* Device interface */
DEVMETHOD(device_probe, ti_aintc_probe),
DEVMETHOD(device_attach, ti_aintc_attach),
+ /* PIC interface */
+ DEVMETHOD(pic_mask, ti_aintc_mask),
+ DEVMETHOD(pic_unmask, ti_aintc_unmask),
+ DEVMETHOD(pic_eoi, ti_aintc_eoi),
+
{ 0, 0 }
};
@@ -139,41 +156,48 @@ static devclass_t ti_aintc_devclass;
DRIVER_MODULE(aintc, simplebus, ti_aintc_driver, ti_aintc_devclass, 0, 0);
-int
-arm_get_next_irq(int last_irq)
+static int
+ti_aintc_intr(void *arg)
{
+ struct ti_aintc_softc *sc = (struct ti_aintc_softc *)arg;
uint32_t active_irq;
- if (last_irq != -1) {
- aintc_write_4(INTC_ISR_CLEAR(last_irq >> 5),
- 1UL << (last_irq & 0x1F));
- aintc_write_4(INTC_CONTROL,1);
- }
-
/* Get the next active interrupt */
- active_irq = aintc_read_4(INTC_SIR_IRQ);
+ active_irq = aintc_read_4(sc, INTC_SIR_IRQ);
/* Check for spurious interrupt */
if ((active_irq & 0xffffff80)) {
- device_printf(ti_aintc_sc->sc_dev,
- "Spurious interrupt detected (0x%08x)\n", active_irq);
+ device_printf(sc->sc_dev,
+ "Spurious interrupt detected (0x%08x)\n", active_irq);
return -1;
}
- if (active_irq != last_irq)
- return active_irq;
- else
- return -1;
+ return active_irq;
+}
+
+static void
+ti_aintc_mask(device_t dev, int irq)
+{
+ struct ti_aintc_softc *sc = device_get_softc(dev);
+
+ aintc_write_4(sc, INTC_MIR_SET(irq >> 5), (1UL << (irq & 0x1F)));
}
-void
-arm_mask_irq(uintptr_t nb)
+static void
+ti_aintc_unmask(device_t dev, int irq)
{
- aintc_write_4(INTC_MIR_SET(nb >> 5), (1UL << (nb & 0x1F)));
+ struct ti_aintc_softc *sc = device_get_softc(dev);
+
+ aintc_write_4(sc, INTC_MIR_CLEAR(irq >> 5), (1UL << (irq & 0x1F)));
}
-void
-arm_unmask_irq(uintptr_t nb)
+static void
+ti_aintc_eoi(device_t dev, int irq)
{
- aintc_write_4(INTC_MIR_CLEAR(nb >> 5), (1UL << (nb & 0x1F)));
+ struct ti_aintc_softc *sc = device_get_softc(dev);
+
+ aintc_write_4(sc, INTC_ISR_CLEAR(irq >> 5),
+ 1UL << (irq & 0x1F));
+ aintc_write_4(sc, INTC_CONTROL,1);
}
+
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