svn commit: r207810 - in user/imp/masq/sys: amd64/amd64
amd64/include amd64/include/xen arm/arm arm/at91 arm/include
arm/xscale/ixp425 boot/forth
cddl/contrib/opensolaris/uts/common/fs/zfs cddl/con...
Warner Losh
imp at FreeBSD.org
Sun May 9 06:52:32 UTC 2010
Author: imp
Date: Sun May 9 06:52:32 2010
New Revision: 207810
URL: http://svn.freebsd.org/changeset/base/207810
Log:
Merging r207550 through r207809
Modified:
user/imp/masq/sys/amd64/amd64/exception.S
user/imp/masq/sys/amd64/amd64/identcpu.c
user/imp/masq/sys/amd64/amd64/pmap.c
user/imp/masq/sys/amd64/include/specialreg.h
user/imp/masq/sys/amd64/include/xen/xenfunc.h
user/imp/masq/sys/amd64/include/xen/xenvar.h
user/imp/masq/sys/arm/arm/cpufunc.c
user/imp/masq/sys/arm/arm/cpufunc_asm_fa526.S
user/imp/masq/sys/arm/arm/elf_trampoline.c
user/imp/masq/sys/arm/arm/identcpu.c
user/imp/masq/sys/arm/arm/pmap.c
user/imp/masq/sys/arm/at91/if_ate.c
user/imp/masq/sys/arm/include/cpuconf.h
user/imp/masq/sys/arm/include/cpufunc.h
user/imp/masq/sys/arm/xscale/ixp425/if_npe.c
user/imp/masq/sys/boot/forth/loader.conf
user/imp/masq/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/dbuf.c
user/imp/masq/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/dmu_object.c
user/imp/masq/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/dmu_objset.c
user/imp/masq/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/spa.c
user/imp/masq/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/sys/dmu_objset.h
user/imp/masq/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/sys/spa.h
user/imp/masq/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/zfs_byteswap.c
user/imp/masq/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/zfs_ioctl.c
user/imp/masq/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/zfs_vnops.c
user/imp/masq/sys/compat/linux/linux_ioctl.c
user/imp/masq/sys/conf/options.arm
user/imp/masq/sys/dev/ae/if_ae.c
user/imp/masq/sys/dev/agp/agp.c
user/imp/masq/sys/dev/agp/agp_i810.c
user/imp/masq/sys/dev/an/if_an.c
user/imp/masq/sys/dev/ath/if_ath.c
user/imp/masq/sys/dev/bce/if_bce.c
user/imp/masq/sys/dev/bwi/if_bwi.c
user/imp/masq/sys/dev/bwn/if_bwn.c
user/imp/masq/sys/dev/cas/if_cas.c
user/imp/masq/sys/dev/cas/if_casreg.h
user/imp/masq/sys/dev/ce/if_ce.c
user/imp/masq/sys/dev/cm/smc90cx6.c
user/imp/masq/sys/dev/cp/if_cp.c
user/imp/masq/sys/dev/cs/if_cs.c
user/imp/masq/sys/dev/ctau/if_ct.c
user/imp/masq/sys/dev/cx/if_cx.c
user/imp/masq/sys/dev/cxgb/cxgb_adapter.h
user/imp/masq/sys/dev/cxgb/cxgb_ioctl.h
user/imp/masq/sys/dev/cxgb/cxgb_main.c
user/imp/masq/sys/dev/cxgb/cxgb_sge.c
user/imp/masq/sys/dev/cxgb/sys/mvec.h
user/imp/masq/sys/dev/cxgb/sys/uipc_mvec.c
user/imp/masq/sys/dev/drm/via_dmablit.c
user/imp/masq/sys/dev/ed/if_ed.c
user/imp/masq/sys/dev/ep/if_ep.c
user/imp/masq/sys/dev/ex/if_ex.c
user/imp/masq/sys/dev/fe/if_fe.c
user/imp/masq/sys/dev/fxp/if_fxp.c
user/imp/masq/sys/dev/ie/if_ie.c
user/imp/masq/sys/dev/iicbus/if_ic.c
user/imp/masq/sys/dev/ipw/if_ipw.c
user/imp/masq/sys/dev/isp/isp_pci.c
user/imp/masq/sys/dev/isp/isp_sbus.c
user/imp/masq/sys/dev/iwi/if_iwi.c
user/imp/masq/sys/dev/iwn/if_iwn.c
user/imp/masq/sys/dev/le/lance.c
user/imp/masq/sys/dev/malo/if_malo.c
user/imp/masq/sys/dev/md/md.c
user/imp/masq/sys/dev/msk/if_msk.c
user/imp/masq/sys/dev/mvs/mvs.c
user/imp/masq/sys/dev/mwl/if_mwl.c
user/imp/masq/sys/dev/mxge/if_mxge.c
user/imp/masq/sys/dev/my/if_my.c
user/imp/masq/sys/dev/nxge/if_nxge.c
user/imp/masq/sys/dev/pdq/pdq_ifsubr.c
user/imp/masq/sys/dev/ppbus/if_plip.c
user/imp/masq/sys/dev/ral/rt2560.c
user/imp/masq/sys/dev/ral/rt2661.c
user/imp/masq/sys/dev/re/if_re.c
user/imp/masq/sys/dev/sbni/if_sbni.c
user/imp/masq/sys/dev/sge/if_sge.c
user/imp/masq/sys/dev/sge/if_sgereg.h
user/imp/masq/sys/dev/smc/if_smc.c
user/imp/masq/sys/dev/sn/if_sn.c
user/imp/masq/sys/dev/snc/dp83932.c
user/imp/masq/sys/dev/sound/pcm/buffer.c
user/imp/masq/sys/dev/sound/pcm/buffer.h
user/imp/masq/sys/dev/ti/if_ti.c
user/imp/masq/sys/dev/usb/net/uhso.c
user/imp/masq/sys/dev/usb/net/usb_ethernet.c
user/imp/masq/sys/dev/usb/wlan/if_rum.c
user/imp/masq/sys/dev/usb/wlan/if_run.c
user/imp/masq/sys/dev/usb/wlan/if_uath.c
user/imp/masq/sys/dev/usb/wlan/if_upgt.c
user/imp/masq/sys/dev/usb/wlan/if_ural.c
user/imp/masq/sys/dev/usb/wlan/if_urtw.c
user/imp/masq/sys/dev/usb/wlan/if_zyd.c
user/imp/masq/sys/dev/vx/if_vx.c
user/imp/masq/sys/dev/wi/if_wi.c
user/imp/masq/sys/dev/wl/if_wl.c
user/imp/masq/sys/dev/wpi/if_wpi.c
user/imp/masq/sys/dev/xe/if_xe.c
user/imp/masq/sys/dev/xen/netfront/netfront.c
user/imp/masq/sys/fs/devfs/devfs_devs.c
user/imp/masq/sys/fs/devfs/devfs_int.h
user/imp/masq/sys/fs/ext2fs/ext2_readwrite.c
user/imp/masq/sys/fs/ext2fs/ext2_vnops.c
user/imp/masq/sys/fs/msdosfs/msdosfs_vnops.c
user/imp/masq/sys/fs/nfs/nfs_commonkrpc.c
user/imp/masq/sys/fs/nfs/nfskpiport.h
user/imp/masq/sys/fs/nfs/nfsport.h
user/imp/masq/sys/fs/nfsclient/nfs_clbio.c
user/imp/masq/sys/fs/nwfs/nwfs_io.c
user/imp/masq/sys/fs/smbfs/smbfs_io.c
user/imp/masq/sys/fs/tmpfs/tmpfs_vnops.c
user/imp/masq/sys/geom/geom.h
user/imp/masq/sys/geom/geom_subr.c
user/imp/masq/sys/geom/vinum/geom_vinum_var.h
user/imp/masq/sys/gnu/fs/xfs/FreeBSD/xfs_vnops.c
user/imp/masq/sys/i386/i386/identcpu.c
user/imp/masq/sys/i386/i386/pmap.c
user/imp/masq/sys/i386/include/specialreg.h
user/imp/masq/sys/i386/include/xen/xenfunc.h
user/imp/masq/sys/i386/include/xen/xenvar.h
user/imp/masq/sys/i386/xen/pmap.c
user/imp/masq/sys/ia64/ia64/pmap.c
user/imp/masq/sys/kern/kern_conf.c
user/imp/masq/sys/kern/kern_exec.c
user/imp/masq/sys/kern/kern_proc.c
user/imp/masq/sys/kern/kern_resource.c
user/imp/masq/sys/kern/kern_thread.c
user/imp/masq/sys/kern/subr_bufring.c
user/imp/masq/sys/kern/subr_uio.c
user/imp/masq/sys/kern/sys_pipe.c
user/imp/masq/sys/kern/uipc_cow.c
user/imp/masq/sys/kern/uipc_syscalls.c
user/imp/masq/sys/kern/vfs_bio.c
user/imp/masq/sys/kern/vfs_vnops.c
user/imp/masq/sys/mips/adm5120/if_admsw.c
user/imp/masq/sys/mips/atheros/if_arge.c
user/imp/masq/sys/mips/include/pmap.h
user/imp/masq/sys/mips/mips/db_trace.c
user/imp/masq/sys/mips/mips/pmap.c
user/imp/masq/sys/net/bpf_zerocopy.c
user/imp/masq/sys/net/if.c
user/imp/masq/sys/net/if_ef.c
user/imp/masq/sys/net/if_gif.c
user/imp/masq/sys/net/if_gre.c
user/imp/masq/sys/net/if_stf.c
user/imp/masq/sys/net80211/ieee80211.c
user/imp/masq/sys/netgraph/ng_base.c
user/imp/masq/sys/netgraph/ng_bridge.c
user/imp/masq/sys/netgraph/ng_bridge.h
user/imp/masq/sys/netgraph/ng_eiface.c
user/imp/masq/sys/netgraph/ng_fec.c
user/imp/masq/sys/netgraph/ng_hub.c
user/imp/masq/sys/netgraph/ng_hub.h
user/imp/masq/sys/netgraph/ng_iface.c
user/imp/masq/sys/netgraph/ng_ksocket.c
user/imp/masq/sys/netgraph/ng_tty.c
user/imp/masq/sys/netipsec/key.c
user/imp/masq/sys/nfsclient/nfs_bio.c
user/imp/masq/sys/pci/if_rl.c
user/imp/masq/sys/powerpc/aim/mmu_oea.c
user/imp/masq/sys/powerpc/aim/mmu_oea64.c
user/imp/masq/sys/powerpc/booke/pmap.c
user/imp/masq/sys/security/audit/audit_bsm.c
user/imp/masq/sys/sparc64/sparc64/pmap.c
user/imp/masq/sys/sun4v/sun4v/pmap.c
user/imp/masq/sys/sys/buf_ring.h
user/imp/masq/sys/sys/conf.h
user/imp/masq/sys/sys/mbuf.h
user/imp/masq/sys/sys/proc.h
user/imp/masq/sys/sys/resource.h
user/imp/masq/sys/sys/resourcevar.h
user/imp/masq/sys/sys/vmmeter.h
user/imp/masq/sys/sys/vnode.h
user/imp/masq/sys/ufs/ffs/ffs_snapshot.c
user/imp/masq/sys/ufs/ffs/ffs_softdep.c
user/imp/masq/sys/ufs/ffs/ffs_vnops.c
user/imp/masq/sys/ufs/ufs/quota.h
user/imp/masq/sys/ufs/ufs/ufs_quota.c
user/imp/masq/sys/ufs/ufs/ufs_vfsops.c
user/imp/masq/sys/ufs/ufs/ufsmount.h
user/imp/masq/sys/vm/device_pager.c
user/imp/masq/sys/vm/phys_pager.c
user/imp/masq/sys/vm/sg_pager.c
user/imp/masq/sys/vm/swap_pager.c
user/imp/masq/sys/vm/uma_core.c
user/imp/masq/sys/vm/vm_contig.c
user/imp/masq/sys/vm/vm_fault.c
user/imp/masq/sys/vm/vm_glue.c
user/imp/masq/sys/vm/vm_kern.c
user/imp/masq/sys/vm/vm_object.c
user/imp/masq/sys/vm/vm_page.c
user/imp/masq/sys/vm/vm_page.h
user/imp/masq/sys/vm/vm_pageout.c
user/imp/masq/sys/vm/vm_pageout.h
user/imp/masq/sys/vm/vnode_pager.c
Directory Properties:
user/imp/masq/sys/ (props changed)
user/imp/masq/sys/amd64/include/xen/ (props changed)
user/imp/masq/sys/cddl/contrib/opensolaris/ (props changed)
user/imp/masq/sys/contrib/dev/acpica/ (props changed)
user/imp/masq/sys/contrib/pf/ (props changed)
user/imp/masq/sys/contrib/x86emu/ (props changed)
user/imp/masq/sys/dev/xen/xenpci/ (props changed)
Modified: user/imp/masq/sys/amd64/amd64/exception.S
==============================================================================
--- user/imp/masq/sys/amd64/amd64/exception.S Sun May 9 02:18:01 2010 (r207809)
+++ user/imp/masq/sys/amd64/amd64/exception.S Sun May 9 06:52:32 2010 (r207810)
@@ -50,14 +50,14 @@
.bss
.globl dtrace_invop_jump_addr
.align 8
- .type dtrace_invop_jump_addr, @object
- .size dtrace_invop_jump_addr, 8
+ .type dtrace_invop_jump_addr, at object
+ .size dtrace_invop_jump_addr,8
dtrace_invop_jump_addr:
.zero 8
.globl dtrace_invop_calltrap_addr
.align 8
- .type dtrace_invop_calltrap_addr, @object
- .size dtrace_invop_calltrap_addr, 8
+ .type dtrace_invop_calltrap_addr, at object
+ .size dtrace_invop_calltrap_addr,8
dtrace_invop_calltrap_addr:
.zero 8
#endif
@@ -157,7 +157,6 @@ IDTVEC(align)
* kernel from userland. Reenable interrupts if they were enabled
* before the trap. This approximates SDT_SYS386TGT on the i386 port.
*/
-
SUPERALIGN_TEXT
.globl alltraps
.type alltraps, at function
@@ -211,16 +210,16 @@ alltraps_pushregs_no_rdi:
* Set our jump address for the jump back in the event that
* the breakpoint wasn't caused by DTrace at all.
*/
- movq $calltrap, dtrace_invop_calltrap_addr(%rip)
+ movq $calltrap,dtrace_invop_calltrap_addr(%rip)
/* Jump to the code hooked in by DTrace. */
- movq dtrace_invop_jump_addr, %rax
+ movq dtrace_invop_jump_addr,%rax
jmpq *dtrace_invop_jump_addr
#endif
.globl calltrap
.type calltrap, at function
calltrap:
- movq %rsp, %rdi
+ movq %rsp,%rdi
call trap
MEXITCOUNT
jmp doreti /* Handle any pending ASTs */
@@ -274,9 +273,11 @@ IDTVEC(dblfault)
testb $SEL_RPL_MASK,TF_CS(%rsp) /* Did we come from kernel? */
jz 1f /* already running with kernel GS.base */
swapgs
-1: movq %rsp, %rdi
+1:
+ movq %rsp,%rdi
call dblfault_handler
-2: hlt
+2:
+ hlt
jmp 2b
IDTVEC(page)
@@ -369,7 +370,7 @@ IDTVEC(fast_syscall)
movq %r15,TF_R15(%rsp) /* C preserved */
movl $TF_HASSEGS,TF_FLAGS(%rsp)
FAKE_MCOUNT(TF_RIP(%rsp))
- movq %rsp, %rdi
+ movq %rsp,%rdi
call syscall
movq PCPU(CURPCB),%rax
andq $~PCB_FULLCTX,PCB_FLAGS(%rax)
@@ -456,7 +457,7 @@ nmi_fromuserspace:
/* Note: this label is also used by ddb and gdb: */
nmi_calltrap:
FAKE_MCOUNT(TF_RIP(%rsp))
- movq %rsp, %rdi
+ movq %rsp,%rdi
call trap
MEXITCOUNT
#ifdef HWPMC_HOOKS
@@ -555,9 +556,9 @@ nmi_restoreregs:
iretq
ENTRY(fork_trampoline)
- movq %r12, %rdi /* function */
- movq %rbx, %rsi /* arg1 */
- movq %rsp, %rdx /* trapframe pointer */
+ movq %r12,%rdi /* function */
+ movq %rbx,%rsi /* arg1 */
+ movq %rsp,%rdx /* trapframe pointer */
call fork_exit
MEXITCOUNT
jmp doreti /* Handle any ASTs */
@@ -628,7 +629,7 @@ doreti_ast:
testl $TDF_ASTPENDING | TDF_NEEDRESCHED,TD_FLAGS(%rax)
je doreti_exit
sti
- movq %rsp, %rdi /* pass a pointer to the trapframe */
+ movq %rsp,%rdi /* pass a pointer to the trapframe */
call ast
jmp doreti_ast
@@ -648,8 +649,8 @@ doreti_exit:
* Do not reload segment registers for kernel.
* Since we do not reload segments registers with sane
* values on kernel entry, descriptors referenced by
- * segments registers may be not valid. This is fatal
- * for the usermode, but is innocent for the kernel.
+ * segments registers might be not valid. This is fatal
+ * for user mode, but is not a problem for the kernel.
*/
testb $SEL_RPL_MASK,TF_CS(%rsp)
jz ld_regs
@@ -662,14 +663,16 @@ do_segs:
/* Restore %fs and fsbase */
movw TF_FS(%rsp),%ax
.globl ld_fs
-ld_fs: movw %ax,%fs
+ld_fs:
+ movw %ax,%fs
cmpw $KUF32SEL,%ax
jne 1f
movl $MSR_FSBASE,%ecx
movl PCB_FSBASE(%r8),%eax
movl PCB_FSBASE+4(%r8),%edx
.globl ld_fsbase
-ld_fsbase: wrmsr
+ld_fsbase:
+ wrmsr
1:
/* Restore %gs and gsbase */
movw TF_GS(%rsp),%si
@@ -678,7 +681,8 @@ ld_fsbase: wrmsr
movl $MSR_GSBASE,%ecx
rdmsr
.globl ld_gs
-ld_gs: movw %si,%gs
+ld_gs:
+ movw %si,%gs
wrmsr
popfq
cmpw $KUG32SEL,%si
@@ -687,12 +691,17 @@ ld_gs: movw %si,%gs
movl PCB_GSBASE(%r8),%eax
movl PCB_GSBASE+4(%r8),%edx
.globl ld_gsbase
-ld_gsbase: wrmsr
-1: .globl ld_es
-ld_es: movw TF_ES(%rsp),%es
+ld_gsbase:
+ wrmsr
+1:
+ .globl ld_es
+ld_es:
+ movw TF_ES(%rsp),%es
.globl ld_ds
-ld_ds: movw TF_DS(%rsp),%ds
-ld_regs:movq TF_RDI(%rsp),%rdi
+ld_ds:
+ movw TF_DS(%rsp),%ds
+ld_regs:
+ movq TF_RDI(%rsp),%rdi
movq TF_RSI(%rsp),%rsi
movq TF_RDX(%rsp),%rdx
movq TF_RCX(%rsp),%rcx
@@ -711,7 +720,8 @@ ld_regs:movq TF_RDI(%rsp),%rdi
jz 1f /* keep running with kernel GS.base */
cli
swapgs
-1: addq $TF_RIP,%rsp /* skip over tf_err, tf_trapno */
+1:
+ addq $TF_RIP,%rsp /* skip over tf_err, tf_trapno */
.globl doreti_iret
doreti_iret:
iretq
@@ -738,7 +748,8 @@ doreti_iret_fault:
testl $PSL_I,TF_RFLAGS(%rsp)
jz 1f
sti
-1: movw %fs,TF_FS(%rsp)
+1:
+ movw %fs,TF_FS(%rsp)
movw %gs,TF_GS(%rsp)
movw %es,TF_ES(%rsp)
movw %ds,TF_DS(%rsp)
@@ -768,7 +779,7 @@ doreti_iret_fault:
.globl ds_load_fault
ds_load_fault:
movl $T_PROTFLT,TF_TRAPNO(%rsp)
- movq %rsp, %rdi
+ movq %rsp,%rdi
call trap
movw $KUDSEL,TF_DS(%rsp)
jmp doreti
@@ -777,7 +788,7 @@ ds_load_fault:
.globl es_load_fault
es_load_fault:
movl $T_PROTFLT,TF_TRAPNO(%rsp)
- movq %rsp, %rdi
+ movq %rsp,%rdi
call trap
movw $KUDSEL,TF_ES(%rsp)
jmp doreti
@@ -786,7 +797,7 @@ es_load_fault:
.globl fs_load_fault
fs_load_fault:
movl $T_PROTFLT,TF_TRAPNO(%rsp)
- movq %rsp, %rdi
+ movq %rsp,%rdi
call trap
movw $KUF32SEL,TF_FS(%rsp)
jmp doreti
@@ -796,7 +807,7 @@ fs_load_fault:
gs_load_fault:
popfq
movl $T_PROTFLT,TF_TRAPNO(%rsp)
- movq %rsp, %rdi
+ movq %rsp,%rdi
call trap
movw $KUG32SEL,TF_GS(%rsp)
jmp doreti
@@ -805,7 +816,7 @@ gs_load_fault:
.globl fsbase_load_fault
fsbase_load_fault:
movl $T_PROTFLT,TF_TRAPNO(%rsp)
- movq %rsp, %rdi
+ movq %rsp,%rdi
call trap
movq PCPU(CURTHREAD),%r8
movq TD_PCB(%r8),%r8
@@ -816,7 +827,7 @@ fsbase_load_fault:
.globl gsbase_load_fault
gsbase_load_fault:
movl $T_PROTFLT,TF_TRAPNO(%rsp)
- movq %rsp, %rdi
+ movq %rsp,%rdi
call trap
movq PCPU(CURTHREAD),%r8
movq TD_PCB(%r8),%r8
Modified: user/imp/masq/sys/amd64/amd64/identcpu.c
==============================================================================
--- user/imp/masq/sys/amd64/amd64/identcpu.c Sun May 9 02:18:01 2010 (r207809)
+++ user/imp/masq/sys/amd64/amd64/identcpu.c Sun May 9 06:52:32 2010 (r207810)
@@ -240,7 +240,7 @@ printcpuinfo(void)
printf("\n Features2=0x%b", cpu_feature2,
"\020"
"\001SSE3" /* SSE3 */
- "\002<b1>"
+ "\002PCLMULQDQ" /* Carry-Less Mul Quadword */
"\003DTES64" /* 64-bit Debug Trace */
"\004MON" /* MONITOR/MWAIT Instructions */
"\005DS_CPL" /* CPL Qualified Debug Store */
@@ -264,7 +264,7 @@ printcpuinfo(void)
"\027MOVBE"
"\030POPCNT"
"\031<b24>"
- "\032<b25>"
+ "\032AESNI" /* AES Crypto*/
"\033XSAVE"
"\034OSXSAVE"
"\035<b28>"
Modified: user/imp/masq/sys/amd64/amd64/pmap.c
==============================================================================
--- user/imp/masq/sys/amd64/amd64/pmap.c Sun May 9 02:18:01 2010 (r207809)
+++ user/imp/masq/sys/amd64/amd64/pmap.c Sun May 9 06:52:32 2010 (r207810)
@@ -2796,7 +2796,7 @@ pmap_remove_all(vm_page_t m)
KASSERT((m->flags & PG_FICTITIOUS) == 0,
("pmap_remove_all: page %p is fictitious", m));
- mtx_assert(&vm_page_queue_mtx, MA_OWNED);
+ vm_page_lock_queues();
pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
while ((pv = TAILQ_FIRST(&pvh->pv_list)) != NULL) {
pmap = PV_PMAP(pv);
@@ -2834,6 +2834,7 @@ pmap_remove_all(vm_page_t m)
PMAP_UNLOCK(pmap);
}
vm_page_flag_clear(m, PG_WRITEABLE);
+ vm_page_unlock_queues();
}
/*
@@ -3414,8 +3415,10 @@ void
pmap_enter_quick(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot)
{
+ vm_page_lock_queues();
PMAP_LOCK(pmap);
- (void) pmap_enter_quick_locked(pmap, va, m, prot, NULL);
+ (void)pmap_enter_quick_locked(pmap, va, m, prot, NULL);
+ vm_page_unlock_queues();
PMAP_UNLOCK(pmap);
}
@@ -3926,8 +3929,11 @@ pmap_page_wired_mappings(vm_page_t m)
count = 0;
if ((m->flags & PG_FICTITIOUS) != 0)
return (count);
+ vm_page_lock_queues();
count = pmap_pvh_wired_mappings(&m->md, count);
- return (pmap_pvh_wired_mappings(pa_to_pvh(VM_PAGE_TO_PHYS(m)), count));
+ count = pmap_pvh_wired_mappings(pa_to_pvh(VM_PAGE_TO_PHYS(m)), count);
+ vm_page_unlock_queues();
+ return (count);
}
/*
@@ -3961,16 +3967,15 @@ pmap_pvh_wired_mappings(struct md_page *
boolean_t
pmap_page_is_mapped(vm_page_t m)
{
- struct md_page *pvh;
+ boolean_t rv;
if ((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) != 0)
return (FALSE);
- mtx_assert(&vm_page_queue_mtx, MA_OWNED);
- if (TAILQ_EMPTY(&m->md.pv_list)) {
- pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
- return (!TAILQ_EMPTY(&pvh->pv_list));
- } else
- return (TRUE);
+ vm_page_lock_queues();
+ rv = !TAILQ_EMPTY(&m->md.pv_list) ||
+ !TAILQ_EMPTY(&pa_to_pvh(VM_PAGE_TO_PHYS(m))->pv_list);
+ vm_page_unlock_queues();
+ return (rv);
}
/*
@@ -4238,7 +4243,7 @@ pmap_remove_write(vm_page_t m)
if ((m->flags & PG_FICTITIOUS) != 0 ||
(m->flags & PG_WRITEABLE) == 0)
return;
- mtx_assert(&vm_page_queue_mtx, MA_OWNED);
+ vm_page_lock_queues();
pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
TAILQ_FOREACH_SAFE(pv, &pvh->pv_list, pv_list, next_pv) {
pmap = PV_PMAP(pv);
@@ -4269,6 +4274,7 @@ retry:
PMAP_UNLOCK(pmap);
}
vm_page_flag_clear(m, PG_WRITEABLE);
+ vm_page_unlock_queues();
}
/*
Modified: user/imp/masq/sys/amd64/include/specialreg.h
==============================================================================
--- user/imp/masq/sys/amd64/include/specialreg.h Sun May 9 02:18:01 2010 (r207809)
+++ user/imp/masq/sys/amd64/include/specialreg.h Sun May 9 06:52:32 2010 (r207810)
@@ -113,6 +113,7 @@
#define CPUID_PBE 0x80000000
#define CPUID2_SSE3 0x00000001
+#define CPUID2_PCLMULQDQ 0x00000002
#define CPUID2_DTES64 0x00000004
#define CPUID2_MON 0x00000008
#define CPUID2_DS_CPL 0x00000010
@@ -131,6 +132,7 @@
#define CPUID2_X2APIC 0x00200000
#define CPUID2_MOVBE 0x00400000
#define CPUID2_POPCNT 0x00800000
+#define CPUID2_AESNI 0x02000000
/*
* Important bits in the AMD extended cpuid flags
Modified: user/imp/masq/sys/amd64/include/xen/xenfunc.h
==============================================================================
--- user/imp/masq/sys/amd64/include/xen/xenfunc.h Sun May 9 02:18:01 2010 (r207809)
+++ user/imp/masq/sys/amd64/include/xen/xenfunc.h Sun May 9 06:52:32 2010 (r207810)
@@ -1,6 +1,5 @@
-/*
- *
- * Copyright (c) 2004,2005 Kip Macy
+/*-
+ * Copyright (c) 2004, 2005 Kip Macy
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -11,22 +10,22 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 4. The name of the author may not be used to endorse or promote products
- * derived from this software without specific prior written permission.
*
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD$
*/
-
#ifndef _XEN_XENFUNC_H_
#define _XEN_XENFUNC_H_
Modified: user/imp/masq/sys/amd64/include/xen/xenvar.h
==============================================================================
--- user/imp/masq/sys/amd64/include/xen/xenvar.h Sun May 9 02:18:01 2010 (r207809)
+++ user/imp/masq/sys/amd64/include/xen/xenvar.h Sun May 9 06:52:32 2010 (r207810)
@@ -1,29 +1,27 @@
-/*
+/*-
* Copyright (c) 2008 Kip Macy
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
- *
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
- *
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
*
* $FreeBSD$
*/
Modified: user/imp/masq/sys/arm/arm/cpufunc.c
==============================================================================
--- user/imp/masq/sys/arm/arm/cpufunc.c Sun May 9 02:18:01 2010 (r207809)
+++ user/imp/masq/sys/arm/arm/cpufunc.c Sun May 9 06:52:32 2010 (r207810)
@@ -783,69 +783,66 @@ struct cpu_functions xscalec3_cpufuncs =
#endif /* CPU_XSCALE_81342 */
-#if defined(CPU_FA526)
+#if defined(CPU_FA526) || defined(CPU_FA626TE)
struct cpu_functions fa526_cpufuncs = {
/* CPU functions */
- .cf_id = cpufunc_id,
- .cf_cpwait = cpufunc_nullop,
+ cpufunc_id, /* id */
+ cpufunc_nullop, /* cpwait */
/* MMU functions */
- .cf_control = cpufunc_control,
- .cf_domains = cpufunc_domains,
- .cf_setttb = fa526_setttb,
- .cf_faultstatus = cpufunc_faultstatus,
- .cf_faultaddress = cpufunc_faultaddress,
+ cpufunc_control, /* control */
+ cpufunc_domains, /* domain */
+ fa526_setttb, /* setttb */
+ cpufunc_faultstatus, /* faultstatus */
+ cpufunc_faultaddress, /* faultaddress */
/* TLB functions */
- .cf_tlb_flushID = armv4_tlb_flushID,
- .cf_tlb_flushID_SE = fa526_tlb_flushID_SE,
- .cf_tlb_flushI = armv4_tlb_flushI,
- .cf_tlb_flushI_SE = fa526_tlb_flushI_SE,
- .cf_tlb_flushD = armv4_tlb_flushD,
- .cf_tlb_flushD_SE = armv4_tlb_flushD_SE,
+ armv4_tlb_flushID, /* tlb_flushID */
+ fa526_tlb_flushID_SE, /* tlb_flushID_SE */
+ armv4_tlb_flushI, /* tlb_flushI */
+ fa526_tlb_flushI_SE, /* tlb_flushI_SE */
+ armv4_tlb_flushD, /* tlb_flushD */
+ armv4_tlb_flushD_SE, /* tlb_flushD_SE */
/* Cache operations */
- .cf_icache_sync_all = fa526_icache_sync_all,
- .cf_icache_sync_range = fa526_icache_sync_range,
-
- .cf_dcache_wbinv_all = fa526_dcache_wbinv_all,
- .cf_dcache_wbinv_range = fa526_dcache_wbinv_range,
- .cf_dcache_inv_range = fa526_dcache_inv_range,
- .cf_dcache_wb_range = fa526_dcache_wb_range,
-
- .cf_idcache_wbinv_all = fa526_idcache_wbinv_all,
- .cf_idcache_wbinv_range = fa526_idcache_wbinv_range,
-
-
- .cf_l2cache_wbinv_all = cpufunc_nullop,
- .cf_l2cache_wbinv_range = (void *)cpufunc_nullop,
- .cf_l2cache_inv_range = (void *)cpufunc_nullop,
- .cf_l2cache_wb_range = (void *)cpufunc_nullop,
+ fa526_icache_sync_all, /* icache_sync_all */
+ fa526_icache_sync_range, /* icache_sync_range */
+ fa526_dcache_wbinv_all, /* dcache_wbinv_all */
+ fa526_dcache_wbinv_range, /* dcache_wbinv_range */
+ fa526_dcache_inv_range, /* dcache_inv_range */
+ fa526_dcache_wb_range, /* dcache_wb_range */
+
+ fa526_idcache_wbinv_all, /* idcache_wbinv_all */
+ fa526_idcache_wbinv_range, /* idcache_wbinv_range */
+ cpufunc_nullop, /* l2cache_wbinv_all */
+ (void *)cpufunc_nullop, /* l2cache_wbinv_range */
+ (void *)cpufunc_nullop, /* l2cache_inv_range */
+ (void *)cpufunc_nullop, /* l2cache_wb_range */
/* Other functions */
- .cf_flush_prefetchbuf = fa526_flush_prefetchbuf,
- .cf_drain_writebuf = armv4_drain_writebuf,
- .cf_flush_brnchtgt_C = cpufunc_nullop,
- .cf_flush_brnchtgt_E = fa526_flush_brnchtgt_E,
+ fa526_flush_prefetchbuf, /* flush_prefetchbuf */
+ armv4_drain_writebuf, /* drain_writebuf */
+ cpufunc_nullop, /* flush_brnchtgt_C */
+ fa526_flush_brnchtgt_E, /* flush_brnchtgt_E */
- .cf_sleep = fa526_cpu_sleep,
+ fa526_cpu_sleep, /* sleep */
/* Soft functions */
- .cf_dataabt_fixup = cpufunc_null_fixup,
- .cf_prefetchabt_fixup = cpufunc_null_fixup,
+ cpufunc_null_fixup, /* dataabt_fixup */
+ cpufunc_null_fixup, /* prefetchabt_fixup */
- .cf_context_switch = fa526_context_switch,
+ fa526_context_switch, /* context_switch */
- .cf_setup = fa526_setup
-};
-#endif /* CPU_FA526 */
+ fa526_setup /* cpu setup */
+};
+#endif /* CPU_FA526 || CPU_FA626TE */
/*
@@ -856,11 +853,11 @@ struct cpu_functions cpufuncs;
u_int cputype;
u_int cpu_reset_needs_v4_MMU_disable; /* flag used in locore.s */
-#if defined(CPU_ARM7TDMI) || defined(CPU_ARM8) || defined(CPU_ARM9) || \
- defined (CPU_ARM9E) || defined (CPU_ARM10) || \
- defined(CPU_XSCALE_80200) || defined(CPU_XSCALE_80321) || \
- defined(CPU_XSCALE_PXA2X0) || defined(CPU_XSCALE_IXP425) || \
- defined(CPU_FA526) || \
+#if defined(CPU_ARM7TDMI) || defined(CPU_ARM8) || defined(CPU_ARM9) || \
+ defined (CPU_ARM9E) || defined (CPU_ARM10) || \
+ defined(CPU_XSCALE_80200) || defined(CPU_XSCALE_80321) || \
+ defined(CPU_XSCALE_PXA2X0) || defined(CPU_XSCALE_IXP425) || \
+ defined(CPU_FA526) || defined(CPU_FA626TE) || \
defined(CPU_XSCALE_80219) || defined(CPU_XSCALE_81342)
static void get_cachetype_cp15(void);
@@ -1141,8 +1138,8 @@ set_cpufuncs()
goto out;
}
#endif /* CPU_SA1110 */
-#ifdef CPU_FA526
- if (cputype == CPU_ID_FA526) {
+#if defined(CPU_FA526) || defined(CPU_FA626TE)
+ if (cputype == CPU_ID_FA526 || cputype == CPU_ID_FA626TE) {
cpufuncs = fa526_cpufuncs;
cpu_reset_needs_v4_MMU_disable = 1; /* SA needs it */
get_cachetype_cp15();
@@ -1153,7 +1150,7 @@ set_cpufuncs()
goto out;
}
-#endif /* CPU_FA526 */
+#endif /* CPU_FA526 || CPU_FA626TE */
#ifdef CPU_IXP12X0
if (cputype == CPU_ID_IXP1200) {
cpufuncs = ixp12x0_cpufuncs;
@@ -1629,7 +1626,7 @@ late_abort_fixup(arg)
defined(CPU_XSCALE_PXA2X0) || defined(CPU_XSCALE_IXP425) || \
defined(CPU_XSCALE_80219) || defined(CPU_XSCALE_81342) || \
defined(CPU_ARM10) || defined(CPU_ARM11) || \
- defined(CPU_FA526)
+ defined(CPU_FA526) || defined(CPU_FA626TE)
#define IGN 0
#define OR 1
@@ -2095,7 +2092,7 @@ sa11x0_setup(args)
}
#endif /* CPU_SA1100 || CPU_SA1110 */
-#if defined(CPU_FA526)
+#if defined(CPU_FA526) || defined(CPU_FA626TE)
struct cpu_option fa526_options[] = {
#ifdef COMPAT_12
{ "nocache", IGN, BIC, (CPU_CONTROL_IC_ENABLE |
@@ -2149,7 +2146,7 @@ fa526_setup(char *args)
ctrl = cpuctrl;
cpu_control(0xffffffff, cpuctrl);
}
-#endif /* CPU_FA526 */
+#endif /* CPU_FA526 || CPU_FA626TE */
#if defined(CPU_IXP12X0)
Modified: user/imp/masq/sys/arm/arm/cpufunc_asm_fa526.S
==============================================================================
--- user/imp/masq/sys/arm/arm/cpufunc_asm_fa526.S Sun May 9 02:18:01 2010 (r207809)
+++ user/imp/masq/sys/arm/arm/cpufunc_asm_fa526.S Sun May 9 06:52:32 2010 (r207810)
@@ -32,7 +32,11 @@
#include <machine/asm.h>
__FBSDID("$FreeBSD$");
+#ifdef CPU_FA526
#define CACHELINE_SIZE 16
+#else
+#define CACHELINE_SIZE 32
+#endif
ENTRY(fa526_setttb)
mov r1, #0
Modified: user/imp/masq/sys/arm/arm/elf_trampoline.c
==============================================================================
--- user/imp/masq/sys/arm/arm/elf_trampoline.c Sun May 9 02:18:01 2010 (r207809)
+++ user/imp/masq/sys/arm/arm/elf_trampoline.c Sun May 9 06:52:32 2010 (r207810)
@@ -57,7 +57,7 @@ void __startC(void);
#define cpu_idcache_wbinv_all arm8_cache_purgeID
#elif defined(CPU_ARM9)
#define cpu_idcache_wbinv_all arm9_idcache_wbinv_all
-#elif defined(CPU_FA526)
+#elif defined(CPU_FA526) || defined(CPU_FA626TE)
#define cpu_idcache_wbinv_all fa526_idcache_wbinv_all
#elif defined(CPU_ARM9E)
#define cpu_idcache_wbinv_all armv5_ec_idcache_wbinv_all
Modified: user/imp/masq/sys/arm/arm/identcpu.c
==============================================================================
--- user/imp/masq/sys/arm/arm/identcpu.c Sun May 9 02:18:01 2010 (r207809)
+++ user/imp/masq/sys/arm/arm/identcpu.c Sun May 9 06:52:32 2010 (r207810)
@@ -220,7 +220,9 @@ const struct cpuidtab cpuids[] = {
generic_steppings },
{ CPU_ID_ARM966ESR1, CPU_CLASS_ARM9ES, "ARM966E-S",
generic_steppings },
- { CPU_ID_FA526, CPU_CLASS_ARM9, "FA526",
+ { CPU_ID_FA526, CPU_CLASS_ARM9, "FA526",
+ generic_steppings },
+ { CPU_ID_FA626TE, CPU_CLASS_ARM9ES, "FA626TE",
generic_steppings },
{ CPU_ID_TI925T, CPU_CLASS_ARM9TDMI, "TI ARM925T",
Modified: user/imp/masq/sys/arm/arm/pmap.c
==============================================================================
--- user/imp/masq/sys/arm/arm/pmap.c Sun May 9 02:18:01 2010 (r207809)
+++ user/imp/masq/sys/arm/arm/pmap.c Sun May 9 06:52:32 2010 (r207810)
@@ -3118,18 +3118,11 @@ pmap_remove_all(vm_page_t m)
pmap_t curpm;
int flags = 0;
-#if defined(PMAP_DEBUG)
- /*
- * XXX This makes pmap_remove_all() illegal for non-managed pages!
- */
- if (m->flags & PG_FICTITIOUS) {
- panic("pmap_remove_all: illegal for unmanaged page, va: 0x%x", VM_PAGE_TO_PHYS(m));
- }
-#endif
-
+ KASSERT((m->flags & PG_FICTITIOUS) == 0,
+ ("pmap_remove_all: page %p is fictitious", m));
if (TAILQ_EMPTY(&m->md.pv_list))
return;
- mtx_assert(&vm_page_queue_mtx, MA_OWNED);
+ vm_page_lock_queues();
pmap_remove_write(m);
curpm = vmspace_pmap(curproc->p_vmspace);
while ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) {
@@ -3180,6 +3173,7 @@ pmap_remove_all(vm_page_t m)
pmap_tlb_flushD(curpm);
}
vm_page_flag_clear(m, PG_WRITEABLE);
+ vm_page_unlock_queues();
}
@@ -3615,9 +3609,11 @@ void
pmap_enter_quick(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot)
{
+ vm_page_lock_queues();
PMAP_LOCK(pmap);
pmap_enter_locked(pmap, va, m, prot & (VM_PROT_READ | VM_PROT_EXECUTE),
FALSE, M_NOWAIT);
+ vm_page_unlock_queues();
PMAP_UNLOCK(pmap);
}
@@ -4450,10 +4446,11 @@ pmap_page_wired_mappings(vm_page_t m)
count = 0;
if ((m->flags & PG_FICTITIOUS) != 0)
return (count);
- mtx_assert(&vm_page_queue_mtx, MA_OWNED);
+ vm_page_lock_queues();
TAILQ_FOREACH(pv, &m->md.pv_list, pv_list)
if ((pv->pv_flags & PVF_WIRED) != 0)
count++;
+ vm_page_unlock_queues();
return (count);
}
@@ -4530,8 +4527,11 @@ void
pmap_remove_write(vm_page_t m)
{
- if (m->flags & PG_WRITEABLE)
+ if (m->flags & PG_WRITEABLE) {
+ vm_page_lock_queues();
pmap_clearbit(m, PVF_WRITE);
+ vm_page_unlock_queues();
+ }
}
Modified: user/imp/masq/sys/arm/at91/if_ate.c
==============================================================================
--- user/imp/masq/sys/arm/at91/if_ate.c Sun May 9 02:18:01 2010 (r207809)
+++ user/imp/masq/sys/arm/at91/if_ate.c Sun May 9 06:52:32 2010 (r207810)
@@ -272,8 +272,8 @@ ate_attach(device_t dev)
ifp->if_ioctl = ateioctl;
ifp->if_init = ateinit;
ifp->if_baudrate = 10000000;
- IFQ_SET_MAXLEN(&ifp->if_snd, IFQ_MAXLEN);
- ifp->if_snd.ifq_drv_maxlen = IFQ_MAXLEN;
+ IFQ_SET_MAXLEN(&ifp->if_snd, ifqmaxlen);
+ ifp->if_snd.ifq_drv_maxlen = ifqmaxlen;
IFQ_SET_READY(&ifp->if_snd);
ifp->if_linkmib = &sc->mibdata;
ifp->if_linkmiblen = sizeof(sc->mibdata);
Modified: user/imp/masq/sys/arm/include/cpuconf.h
==============================================================================
--- user/imp/masq/sys/arm/include/cpuconf.h Sun May 9 02:18:01 2010 (r207809)
+++ user/imp/masq/sys/arm/include/cpuconf.h Sun May 9 06:52:32 2010 (r207810)
@@ -62,6 +62,7 @@
defined(CPU_XSCALE_80321) + \
defined(CPU_XSCALE_PXA2X0) + \
defined(CPU_FA526) + \
+ defined(CPU_FA626TE) + \
defined(CPU_XSCALE_IXP425))
/*
@@ -78,7 +79,7 @@
#if (defined(CPU_ARM9E) || defined(CPU_ARM10) || \
defined(CPU_XSCALE_80200) || defined(CPU_XSCALE_80321) || \
defined(CPU_XSCALE_80219) || defined(CPU_XSCALE_81342) || \
- defined(CPU_XSCALE_PXA2X0))
+ defined(CPU_XSCALE_PXA2X0) || defined(CPU_FA626TE))
#define ARM_ARCH_5 1
#else
#define ARM_ARCH_5 0
@@ -126,7 +127,8 @@
#if (defined(CPU_ARM6) || defined(CPU_ARM7) || defined(CPU_ARM7TDMI) || \
defined(CPU_ARM8) || defined(CPU_ARM9) || defined(CPU_ARM9E) || \
- defined(CPU_ARM10) || defined(CPU_ARM11) || defined(CPU_FA526))
+ defined(CPU_ARM10) || defined(CPU_ARM11) || defined(CPU_FA526) || \
+ defined(CPU_FA626TE))
#define ARM_MMU_GENERIC 1
#else
#define ARM_MMU_GENERIC 0
Modified: user/imp/masq/sys/arm/include/cpufunc.h
==============================================================================
--- user/imp/masq/sys/arm/include/cpufunc.h Sun May 9 02:18:01 2010 (r207809)
+++ user/imp/masq/sys/arm/include/cpufunc.h Sun May 9 06:52:32 2010 (r207810)
@@ -284,7 +284,7 @@ u_int arm8_clock_config (u_int, u_int);
#endif
-#ifdef CPU_FA526
+#if defined(CPU_FA526) || defined(CPU_FA626TE)
void fa526_setup (char *arg);
void fa526_setttb (u_int ttb);
void fa526_context_switch (void);
@@ -464,11 +464,11 @@ extern unsigned armv5_dcache_index_max;
extern unsigned armv5_dcache_index_inc;
#endif
-#if defined(CPU_ARM9) || defined(CPU_ARM9E) || defined(CPU_ARM10) || \
- defined(CPU_SA110) || defined(CPU_SA1100) || defined(CPU_SA1110) || \
- defined(CPU_XSCALE_80200) || defined(CPU_XSCALE_80321) || \
- defined(CPU_FA526) || \
- defined(CPU_XSCALE_PXA2X0) || defined(CPU_XSCALE_IXP425) || \
+#if defined(CPU_ARM9) || defined(CPU_ARM9E) || defined(CPU_ARM10) || \
+ defined(CPU_SA110) || defined(CPU_SA1100) || defined(CPU_SA1110) || \
+ defined(CPU_XSCALE_80200) || defined(CPU_XSCALE_80321) || \
+ defined(CPU_FA526) || defined(CPU_FA626TE) || \
+ defined(CPU_XSCALE_PXA2X0) || defined(CPU_XSCALE_IXP425) || \
defined(CPU_XSCALE_80219) || defined(CPU_XSCALE_81342)
void armv4_tlb_flushID (void);
Modified: user/imp/masq/sys/arm/xscale/ixp425/if_npe.c
==============================================================================
--- user/imp/masq/sys/arm/xscale/ixp425/if_npe.c Sun May 9 02:18:01 2010 (r207809)
+++ user/imp/masq/sys/arm/xscale/ixp425/if_npe.c Sun May 9 06:52:32 2010 (r207810)
@@ -360,7 +360,7 @@ npe_attach(device_t dev)
ifp->if_ioctl = npeioctl;
ifp->if_init = npeinit;
IFQ_SET_MAXLEN(&ifp->if_snd, sc->txdma.nbuf - 1);
- ifp->if_snd.ifq_drv_maxlen = IFQ_MAXLEN;
+ ifp->if_snd.ifq_drv_maxlen = ifqmaxlen;
IFQ_SET_READY(&ifp->if_snd);
ifp->if_linkmib = &sc->mibdata;
ifp->if_linkmiblen = sizeof(sc->mibdata);
Modified: user/imp/masq/sys/boot/forth/loader.conf
==============================================================================
--- user/imp/masq/sys/boot/forth/loader.conf Sun May 9 02:18:01 2010 (r207809)
+++ user/imp/masq/sys/boot/forth/loader.conf Sun May 9 06:52:32 2010 (r207810)
@@ -197,8 +197,6 @@ if_epair_load="NO" # Virtual b-t-b Ethe
if_faith_load="NO" # IPv6-to-IPv4 TCP relay capturing interface
if_gif_load="NO" # generic tunnel interface
if_gre_load="NO" # encapsulating network device
-if_ppp_load="NO" # Kernel ppp
-if_sl_load="NO" # SLIP
if_stf_load="NO" # 6to4 tunnel interface
if_tap_load="NO" # Ethernet tunnel software network interface
if_tun_load="NO" # Tunnel driver (user process ppp)
@@ -217,7 +215,6 @@ if_age_load="NO" # Attansic/Atheros L1
if_alc_load="NO" # Atheros AR8131/AR8132 Ethernet
if_ale_load="NO" # Atheros AR8121/AR8113/AR8114 Ethernet
if_an_load="NO" # Aironet 4500/4800 802.11 wireless NICs
-if_ar_load="NO" # Digi SYNC/570i
if_ath_load="NO" # Atheros IEEE 802.11 wireless NICs
if_aue_load="NO" # ADMtek AN986 Pegasus USB Ethernet
if_awi_load="NO" # AMD PCnetMobile IEEE 802.11 wireless NICs
@@ -237,6 +234,7 @@ if_ed_load="NO" # National Semiconduct
if_em_load="NO" # Intel(R) PRO/1000 Gigabit Ethernet
if_en_load="NO" # Midway-based ATM interfaces
if_ep_load="NO" # 3Com Etherlink III (3c5x9)
+if_et_load="NO" # Agere ET1310 10/100/Gigabit Ethernet
if_ex_load="NO" # Intel EtherExpress Pro/10 Ethernet
if_fe_load="NO" # Fujitsu MB86960A/MB86965A based Ethernet
# adapters
@@ -265,17 +263,15 @@ if_nve_load="NO" # NVIDIA nForce MCP Ne
if_nxge_load="NO" # Neterion Xframe 10Gb Ethernet
if_pcn_load="NO" # AMD PCnet PCI
if_ral_load="NO" # Ralink Technology wireless
-if_ray_load="NO" # Raytheon Raylink/Webgear Aviator PCCard
if_re_load="NO" # RealTek 8139C+/8169/8169S/8110S
if_rl_load="NO" # RealTek 8129/8139
if_rue_load="NO" # RealTek RTL8150 USB to Fast Ethernet
if_sbni_load="NO" # Granch SBNI12 leased line adapters
if_sf_load="NO" # Adaptec Duralink PCI (AIC-6915 "starfire")
-if_sge_load="NO" # Silicon Integrated Systems SiS190/191
+if_sge_load="NO" # Silicon Integrated Systems SiS 190/191
if_sis_load="NO" # Silicon Integrated Systems SiS 900/7016
if_sk_load="NO" # SysKonnect SK-984x series PCI Gigabit Ethernet
if_sn_load="NO" # SMC 91Cxx
-if_sr_load="NO" # synchronous RISCom/N2 / WANic 400/405
if_ste_load="NO" # Sundance Technologies ST201 Fast Ethernet
if_stge_load="NO" # Sundance/Tamarack TC9021 Gigabit Ethernet
if_ti_load="NO" # Alteon Networks Tigon 1 and Tigon 2
Modified: user/imp/masq/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/dbuf.c
==============================================================================
--- user/imp/masq/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/dbuf.c Sun May 9 02:18:01 2010 (r207809)
+++ user/imp/masq/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/dbuf.c Sun May 9 06:52:32 2010 (r207810)
@@ -464,15 +464,15 @@ dbuf_read_impl(dmu_buf_impl_t *db, zio_t
ASSERT(db->db_buf == NULL);
if (db->db_blkid == DB_BONUS_BLKID) {
- int bonuslen = dn->dn_bonuslen;
+ int bonuslen = MIN(dn->dn_bonuslen, dn->dn_phys->dn_bonuslen);
ASSERT3U(bonuslen, <=, db->db.db_size);
db->db.db_data = zio_buf_alloc(DN_MAX_BONUSLEN);
arc_space_consume(DN_MAX_BONUSLEN);
if (bonuslen < DN_MAX_BONUSLEN)
bzero(db->db.db_data, DN_MAX_BONUSLEN);
- bcopy(DN_BONUS(dn->dn_phys), db->db.db_data,
- bonuslen);
+ if (bonuslen)
+ bcopy(DN_BONUS(dn->dn_phys), db->db.db_data, bonuslen);
dbuf_update_data(db);
db->db_state = DB_CACHED;
mutex_exit(&db->db_mtx);
Modified: user/imp/masq/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/dmu_object.c
==============================================================================
--- user/imp/masq/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/dmu_object.c Sun May 9 02:18:01 2010 (r207809)
+++ user/imp/masq/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/dmu_object.c Sun May 9 06:52:32 2010 (r207810)
@@ -128,15 +128,6 @@ dmu_object_reclaim(objset_t *os, uint64_
return (0);
}
- tx = dmu_tx_create(os);
- dmu_tx_hold_bonus(tx, object);
- err = dmu_tx_assign(tx, TXG_WAIT);
- if (err) {
- dmu_tx_abort(tx);
- dnode_rele(dn, FTAG);
- return (err);
- }
-
nblkptr = 1 + ((DN_MAX_BONUSLEN - bonuslen) >> SPA_BLKPTRSHIFT);
/*
@@ -144,16 +135,27 @@ dmu_object_reclaim(objset_t *os, uint64_
* be a new file instance. We must clear out the previous file
* contents before we can change this type of metadata in the dnode.
*/
- if (dn->dn_nblkptr > nblkptr || dn->dn_datablksz != blocksize)
- dmu_free_long_range(os, object, 0, DMU_OBJECT_END);
+ if (dn->dn_nblkptr > nblkptr || dn->dn_datablksz != blocksize) {
+ err = dmu_free_long_range(os, object, 0, DMU_OBJECT_END);
+ if (err)
+ goto out;
+ }
+
+ tx = dmu_tx_create(os);
+ dmu_tx_hold_bonus(tx, object);
+ err = dmu_tx_assign(tx, TXG_WAIT);
+ if (err) {
+ dmu_tx_abort(tx);
+ goto out;
+ }
dnode_reallocate(dn, ot, blocksize, bonustype, bonuslen, tx);
dmu_tx_commit(tx);
-
+out:
dnode_rele(dn, FTAG);
- return (0);
+ return (err);
}
int
Modified: user/imp/masq/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/dmu_objset.c
==============================================================================
--- user/imp/masq/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/dmu_objset.c Sun May 9 02:18:01 2010 (r207809)
+++ user/imp/masq/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/dmu_objset.c Sun May 9 06:52:32 2010 (r207810)
@@ -1213,6 +1213,39 @@ dmu_objset_find_spa(spa_t *spa, const ch
return (err);
}
+/* ARGSUSED */
+int
+dmu_objset_prefetch(char *name, void *arg)
+{
+ dsl_dataset_t *ds;
+
+ if (dsl_dataset_hold(name, FTAG, &ds))
+ return (0);
+
+ if (!BP_IS_HOLE(&ds->ds_phys->ds_bp)) {
+ mutex_enter(&ds->ds_opening_lock);
+ if (!dsl_dataset_get_user_ptr(ds)) {
+ uint32_t aflags = ARC_NOWAIT | ARC_PREFETCH;
+ zbookmark_t zb;
+
+ zb.zb_objset = ds->ds_object;
+ zb.zb_object = 0;
+ zb.zb_level = -1;
+ zb.zb_blkid = 0;
+
+ (void) arc_read_nolock(NULL, dsl_dataset_get_spa(ds),
+ &ds->ds_phys->ds_bp, NULL, NULL,
+ ZIO_PRIORITY_ASYNC_READ,
+ ZIO_FLAG_CANFAIL | ZIO_FLAG_SPECULATIVE,
+ &aflags, &zb);
+ }
+ mutex_exit(&ds->ds_opening_lock);
+ }
+
+ dsl_dataset_rele(ds, FTAG);
+ return (0);
+}
+
void
dmu_objset_set_user(objset_t *os, void *user_ptr)
{
Modified: user/imp/masq/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/spa.c
==============================================================================
--- user/imp/masq/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/spa.c Sun May 9 02:18:01 2010 (r207809)
+++ user/imp/masq/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/spa.c Sun May 9 06:52:32 2010 (r207810)
@@ -2564,11 +2564,12 @@ spa_tryimport(nvlist_t *tryconfig)
* The act of destroying or exporting a pool is very simple. We make sure there
* is no more pending I/O and any references to the pool are gone. Then, we
* update the pool state and sync all the labels to disk, removing the
- * configuration from the cache afterwards.
+ * configuration from the cache afterwards. If the 'hardforce' flag is set, then
+ * we don't sync the labels or remove the configuration cache.
*/
static int
spa_export_common(char *pool, int new_state, nvlist_t **oldconfig,
- boolean_t force)
+ boolean_t force, boolean_t hardforce)
{
spa_t *spa;
@@ -2636,7 +2637,7 @@ spa_export_common(char *pool, int new_st
* so mark them all dirty. spa_unload() will do the
* final sync that pushes these changes out.
*/
- if (new_state != POOL_STATE_UNINITIALIZED) {
+ if (new_state != POOL_STATE_UNINITIALIZED && !hardforce) {
spa_config_enter(spa, SCL_ALL, FTAG, RW_WRITER);
spa->spa_state = new_state;
*** DIFF OUTPUT TRUNCATED AT 1000 LINES ***
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