svn commit: r204507 - in user/jmallett/octeon/sys/mips: include mips
Juli Mallett
jmallett at FreeBSD.org
Mon Mar 1 05:21:35 UTC 2010
Author: jmallett
Date: Mon Mar 1 05:21:35 2010
New Revision: 204507
URL: http://svn.freebsd.org/changeset/base/204507
Log:
o) Adjust ptr and register macros for assembly wrt ABI in a way that ought to
work better. Need to check for places where the assembly assumes pointers
are register width, I guess.
Modified:
user/jmallett/octeon/sys/mips/include/asm.h
user/jmallett/octeon/sys/mips/mips/locore.S
Modified: user/jmallett/octeon/sys/mips/include/asm.h
==============================================================================
--- user/jmallett/octeon/sys/mips/include/asm.h Mon Mar 1 04:46:07 2010 (r204506)
+++ user/jmallett/octeon/sys/mips/include/asm.h Mon Mar 1 05:21:35 2010 (r204507)
@@ -362,16 +362,13 @@ _C_LABEL(x):
* ABI calls.
*/
-#if !defined(_MIPS_BSD_API) || _MIPS_BSD_API == _MIPS_BSD_API_LP32
-/* #if !defined(__mips_n64) */
+#if !defined(__mips_n32) && !defined(__mips_n64)
#define REG_L lw
#define REG_S sw
#define REG_LI li
#define REG_PROLOGUE .set push
#define REG_EPILOGUE .set pop
#define SZREG 4
-#define PTR_LA la
-#define PTR_ADDU addu
#else
#define REG_L ld
#define REG_S sd
@@ -379,9 +376,19 @@ _C_LABEL(x):
#define REG_PROLOGUE .set push ; .set mips3
#define REG_EPILOGUE .set pop
#define SZREG 8
+#endif
+
+#if !defined(__mips_n64)
+#define PTR_LA la
+#define PTR_ADDU addu
+#define PTR_L lw
+#define PTR_S sw
+#else
#define PTR_LA dla
#define PTR_ADDU daddu
-#endif /* _MIPS_BSD_API */
+#define PTR_L ld
+#define PTR_S sd
+#endif
#define mfc0_macro(data, spr) \
__asm __volatile ("mfc0 %0, $%1" \
Modified: user/jmallett/octeon/sys/mips/mips/locore.S
==============================================================================
--- user/jmallett/octeon/sys/mips/mips/locore.S Mon Mar 1 04:46:07 2010 (r204506)
+++ user/jmallett/octeon/sys/mips/mips/locore.S Mon Mar 1 05:21:35 2010 (r204507)
@@ -178,7 +178,7 @@ VECTOR(_locore, unknown)
nop
PTR_LA sp, _C_LABEL(thread0)
- REG_L a0, TD_PCB(sp)
+ PTR_L a0, TD_PCB(sp)
REG_LI t0, ~7
and a0, a0, t0
subu sp, a0, START_FRAME
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