svn commit: r208725 - in user/jmallett/octeon: crypto/openssh share/man/man4 sys/arm/arm sys/cddl/contrib/opensolaris/uts/common/fs/zfs sys/dev/acpica sys/dev/ath/ath_hal sys/dev/ath/ath_hal/ar5416...

Juli Mallett jmallett at FreeBSD.org
Wed Jun 2 04:13:11 UTC 2010


Author: jmallett
Date: Wed Jun  2 04:13:10 2010
New Revision: 208725
URL: http://svn.freebsd.org/changeset/base/208725

Log:
  Merge from head, mainly to get pmap build fix.

Modified:
  user/jmallett/octeon/crypto/openssh/moduli.5
  user/jmallett/octeon/crypto/openssh/scp.1
  user/jmallett/octeon/crypto/openssh/sftp-server.8
  user/jmallett/octeon/crypto/openssh/sftp.1
  user/jmallett/octeon/crypto/openssh/ssh-add.1
  user/jmallett/octeon/crypto/openssh/ssh-agent.1
  user/jmallett/octeon/crypto/openssh/ssh-keygen.1
  user/jmallett/octeon/crypto/openssh/ssh-keyscan.1
  user/jmallett/octeon/crypto/openssh/ssh-keysign.8
  user/jmallett/octeon/crypto/openssh/ssh.1
  user/jmallett/octeon/crypto/openssh/ssh_config.5
  user/jmallett/octeon/crypto/openssh/sshd.8
  user/jmallett/octeon/crypto/openssh/sshd_config.5
  user/jmallett/octeon/share/man/man4/io.4
  user/jmallett/octeon/sys/arm/arm/pmap.c
  user/jmallett/octeon/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/zfs_vfsops.c
  user/jmallett/octeon/sys/dev/acpica/acpi_ec.c
  user/jmallett/octeon/sys/dev/ath/ath_hal/ah.h
  user/jmallett/octeon/sys/dev/ath/ath_hal/ah_eeprom_v4k.c
  user/jmallett/octeon/sys/dev/ath/ath_hal/ah_eeprom_v4k.h
  user/jmallett/octeon/sys/dev/ath/ath_hal/ar5416/ar5416_interrupts.c
  user/jmallett/octeon/sys/dev/ath/ath_hal/ar5416/ar5416_reset.c
  user/jmallett/octeon/sys/dev/ath/ath_hal/ar5416/ar5416phy.h
  user/jmallett/octeon/sys/dev/ath/ath_hal/ar5416/ar5416reg.h
  user/jmallett/octeon/sys/dev/ath/ath_hal/ar5416/ar9285_attach.c
  user/jmallett/octeon/sys/dev/ath/ath_hal/ar5416/ar9285_reset.c
  user/jmallett/octeon/sys/fs/devfs/devfs_vnops.c
  user/jmallett/octeon/sys/kern/subr_taskqueue.c
  user/jmallett/octeon/sys/mips/mips/pmap.c
  user/jmallett/octeon/sys/net80211/ieee80211_hwmp.c
  user/jmallett/octeon/sys/net80211/ieee80211_ioctl.c
  user/jmallett/octeon/sys/net80211/ieee80211_scan_sta.c
  user/jmallett/octeon/sys/powerpc/booke/pmap.c
  user/jmallett/octeon/sys/sun4v/sun4v/pmap.c
  user/jmallett/octeon/sys/sys/_task.h
Directory Properties:
  user/jmallett/octeon/   (props changed)

Modified: user/jmallett/octeon/crypto/openssh/moduli.5
==============================================================================
--- user/jmallett/octeon/crypto/openssh/moduli.5	Tue Jun  1 22:46:57 2010	(r208724)
+++ user/jmallett/octeon/crypto/openssh/moduli.5	Wed Jun  2 04:13:10 2010	(r208725)
@@ -13,7 +13,7 @@
 .\" WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
 .\" ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
 .\" OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
-.Dd June 26 2008
+.Dd June 26, 2008
 .Dt MODULI 5
 .Os
 .Sh NAME

Modified: user/jmallett/octeon/crypto/openssh/scp.1
==============================================================================
--- user/jmallett/octeon/crypto/openssh/scp.1	Tue Jun  1 22:46:57 2010	(r208724)
+++ user/jmallett/octeon/crypto/openssh/scp.1	Wed Jun  2 04:13:10 2010	(r208725)
@@ -11,7 +11,7 @@
 .\"
 .\" $OpenBSD: scp.1,v 1.50 2010/02/08 10:50:20 markus Exp $
 .\"
-.Dd February 8 2010
+.Dd February 8, 2010
 .Dt SCP 1
 .Os
 .Sh NAME

Modified: user/jmallett/octeon/crypto/openssh/sftp-server.8
==============================================================================
--- user/jmallett/octeon/crypto/openssh/sftp-server.8	Tue Jun  1 22:46:57 2010	(r208724)
+++ user/jmallett/octeon/crypto/openssh/sftp-server.8	Wed Jun  2 04:13:10 2010	(r208725)
@@ -23,7 +23,7 @@
 .\" (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 .\" THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 .\"
-.Dd January 9 2010
+.Dd January 9, 2010
 .Dt SFTP-SERVER 8
 .Os
 .Sh NAME

Modified: user/jmallett/octeon/crypto/openssh/sftp.1
==============================================================================
--- user/jmallett/octeon/crypto/openssh/sftp.1	Tue Jun  1 22:46:57 2010	(r208724)
+++ user/jmallett/octeon/crypto/openssh/sftp.1	Wed Jun  2 04:13:10 2010	(r208725)
@@ -23,7 +23,7 @@
 .\" (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 .\" THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 .\"
-.Dd February 8 2010
+.Dd February 8, 2010
 .Dt SFTP 1
 .Os
 .Sh NAME

Modified: user/jmallett/octeon/crypto/openssh/ssh-add.1
==============================================================================
--- user/jmallett/octeon/crypto/openssh/ssh-add.1	Tue Jun  1 22:46:57 2010	(r208724)
+++ user/jmallett/octeon/crypto/openssh/ssh-add.1	Wed Jun  2 04:13:10 2010	(r208725)
@@ -37,7 +37,7 @@
 .\" (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 .\" THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 .\"
-.Dd March 5 2010
+.Dd March 5, 2010
 .Dt SSH-ADD 1
 .Os
 .Sh NAME

Modified: user/jmallett/octeon/crypto/openssh/ssh-agent.1
==============================================================================
--- user/jmallett/octeon/crypto/openssh/ssh-agent.1	Tue Jun  1 22:46:57 2010	(r208724)
+++ user/jmallett/octeon/crypto/openssh/ssh-agent.1	Wed Jun  2 04:13:10 2010	(r208725)
@@ -35,7 +35,7 @@
 .\" (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 .\" THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 .\"
-.Dd January 17 2010
+.Dd January 17, 2010
 .Dt SSH-AGENT 1
 .Os
 .Sh NAME

Modified: user/jmallett/octeon/crypto/openssh/ssh-keygen.1
==============================================================================
--- user/jmallett/octeon/crypto/openssh/ssh-keygen.1	Tue Jun  1 22:46:57 2010	(r208724)
+++ user/jmallett/octeon/crypto/openssh/ssh-keygen.1	Wed Jun  2 04:13:10 2010	(r208725)
@@ -38,7 +38,7 @@
 .\" (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 .\" THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 .\"
-.Dd March 13 2010
+.Dd March 13, 2010
 .Dt SSH-KEYGEN 1
 .Os
 .Sh NAME

Modified: user/jmallett/octeon/crypto/openssh/ssh-keyscan.1
==============================================================================
--- user/jmallett/octeon/crypto/openssh/ssh-keyscan.1	Tue Jun  1 22:46:57 2010	(r208724)
+++ user/jmallett/octeon/crypto/openssh/ssh-keyscan.1	Wed Jun  2 04:13:10 2010	(r208725)
@@ -7,7 +7,7 @@
 .\" permitted provided that due credit is given to the author and the
 .\" OpenBSD project by leaving this copyright notice intact.
 .\"
-.Dd January 9 2010
+.Dd January 9, 2010
 .Dt SSH-KEYSCAN 1
 .Os
 .Sh NAME

Modified: user/jmallett/octeon/crypto/openssh/ssh-keysign.8
==============================================================================
--- user/jmallett/octeon/crypto/openssh/ssh-keysign.8	Tue Jun  1 22:46:57 2010	(r208724)
+++ user/jmallett/octeon/crypto/openssh/ssh-keysign.8	Wed Jun  2 04:13:10 2010	(r208725)
@@ -22,7 +22,7 @@
 .\" (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 .\" THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 .\"
-.Dd May 31 2007
+.Dd May 31, 2007
 .Dt SSH-KEYSIGN 8
 .Os
 .Sh NAME

Modified: user/jmallett/octeon/crypto/openssh/ssh.1
==============================================================================
--- user/jmallett/octeon/crypto/openssh/ssh.1	Tue Jun  1 22:46:57 2010	(r208724)
+++ user/jmallett/octeon/crypto/openssh/ssh.1	Wed Jun  2 04:13:10 2010	(r208725)
@@ -36,7 +36,7 @@
 .\"
 .\" $OpenBSD: ssh.1,v 1.303 2010/03/26 00:26:58 djm Exp $
 .\" $FreeBSD$
-.Dd March 26 2010
+.Dd March 26, 2010
 .Dt SSH 1
 .Os
 .Sh NAME

Modified: user/jmallett/octeon/crypto/openssh/ssh_config.5
==============================================================================
--- user/jmallett/octeon/crypto/openssh/ssh_config.5	Tue Jun  1 22:46:57 2010	(r208724)
+++ user/jmallett/octeon/crypto/openssh/ssh_config.5	Wed Jun  2 04:13:10 2010	(r208725)
@@ -36,7 +36,7 @@
 .\"
 .\" $OpenBSD: ssh_config.5,v 1.130 2010/03/26 01:06:13 dtucker Exp $
 .\" $FreeBSD$
-.Dd March 26 2010
+.Dd March 26, 2010
 .Dt SSH_CONFIG 5
 .Os
 .Sh NAME

Modified: user/jmallett/octeon/crypto/openssh/sshd.8
==============================================================================
--- user/jmallett/octeon/crypto/openssh/sshd.8	Tue Jun  1 22:46:57 2010	(r208724)
+++ user/jmallett/octeon/crypto/openssh/sshd.8	Wed Jun  2 04:13:10 2010	(r208725)
@@ -36,7 +36,7 @@
 .\"
 .\" $OpenBSD: sshd.8,v 1.255 2010/03/05 06:50:35 jmc Exp $
 .\" $FreeBSD$
-.Dd March 5 2010
+.Dd March 5, 2010
 .Dt SSHD 8
 .Os
 .Sh NAME

Modified: user/jmallett/octeon/crypto/openssh/sshd_config.5
==============================================================================
--- user/jmallett/octeon/crypto/openssh/sshd_config.5	Tue Jun  1 22:46:57 2010	(r208724)
+++ user/jmallett/octeon/crypto/openssh/sshd_config.5	Wed Jun  2 04:13:10 2010	(r208725)
@@ -36,7 +36,7 @@
 .\"
 .\" $OpenBSD: sshd_config.5,v 1.120 2010/03/04 23:17:25 djm Exp $
 .\" $FreeBSD$
-.Dd March 4 2010
+.Dd March 4, 2010
 .Dt SSHD_CONFIG 5
 .Os
 .Sh NAME

Modified: user/jmallett/octeon/share/man/man4/io.4
==============================================================================
--- user/jmallett/octeon/share/man/man4/io.4	Tue Jun  1 22:46:57 2010	(r208724)
+++ user/jmallett/octeon/share/man/man4/io.4	Wed Jun  2 04:13:10 2010	(r208725)
@@ -27,7 +27,7 @@
 .\"
 .\" $FreeBSD$
 .\"
-.Dd February 8, 2010
+.Dd June 01, 2010
 .Dt IO 4
 .Os
 .Sh NAME
@@ -35,32 +35,89 @@
 .Nd I/O privilege file
 .Sh SYNOPSIS
 .Cd "device io"
+.Pp
+.In sys/types.h
+.In sys/ioctl.h
+.In dev/io/iodev.h
+.In machine/iodev.h
+.Pp
+.Bd -literal
+struct iodev_pio_req {
+	u_int access;
+	u_int port;
+	u_int width;
+	u_int val;
+};
 .Sh DESCRIPTION
 The special file
 .Pa /dev/io
 is a controlled security hole that allows a process to gain I/O
 privileges
 (which are normally reserved for kernel-internal code).
-Any process that holds a file descriptor on
-.Pa /dev/io
-open will get its
-.Em IOPL
-bits in the flag register set, thus allowing it to perform direct
-I/O operations.
 This can be useful in order to write userland
 programs that handle some hardware directly.
-Note that even read-only access will grant the full I/O privileges.
+.Pp
+The usual operations on the device are to open it via the
+.Xr open 2
+interface and to send I/O requests to the file descriptor using the
+.Xr ioctl 2
+syscall.
+.Pp
+The
+.Xr ioctl 2
+requests available for
+.Pa /dev/io
+are mostly platform dependent, but there are also some in common between
+all of them.
+The
+.Dv IODEV_PIO
+is used by all the architectures in order to request that an I/O operation
+be performed. It takes a 'struct iodev_pio_req' argument
+that must be previously setup.
+.Pp
+The
+.Fa access
+member specifies the type of operation requested. It may be:
+.Bl -tag -width IODEV_PIO_WRITE
+.It Dv IODEV_PIO_READ
+The operation is an "in" type. A value will be read from the specified port
+(retrieved from the
+.Fa port
+member) and the result will be stored in the
+.Fa val
+member.
+.It Dv IODEV_PIO_WRITE
+The operation is a "out" type. The value will be fetched from the
+.Fa val
+member and will be written out to the specified port (defined as the
+.Fa port
+member).
+.El
+.Pp
+Finally, the
+.Fa width
+member specifies the size of the operand to be read/written, expressed
+in bytes.
 .Pp
 In addition to any file access permissions on
 .Pa /dev/io ,
 the kernel enforces that only the super-user may open this device.
-.Sh FILES
-.Bl -tag -width Pa -compact
-.It Pa /dev/io
-.El
+.Sh LEGACY
+The
+.Pa /dev/io
+interface used to be very i386 specific and worked differently. The initial
+implementation, in fact, simply raised the
+.Em IOPL
+of the current thread when
+.Xr open 2
+was called on the file. This behaviour is retained in the current
+implementation as legacy support for both i386 and amd64 architectures.
 .Sh SEE ALSO
+.Xr close 2 ,
 .Xr i386_get_ioperm 2 ,
 .Xr i386_set_ioperm 2 ,
+.Xr ioctl 2 ,
+.Xr open 2 ,
 .Xr mem 4
 .Sh HISTORY
 The

Modified: user/jmallett/octeon/sys/arm/arm/pmap.c
==============================================================================
--- user/jmallett/octeon/sys/arm/arm/pmap.c	Tue Jun  1 22:46:57 2010	(r208724)
+++ user/jmallett/octeon/sys/arm/arm/pmap.c	Wed Jun  2 04:13:10 2010	(r208725)
@@ -3318,15 +3318,16 @@ pmap_enter_locked(pmap_t pmap, vm_offset
 	u_int oflags;
 	vm_paddr_t pa;
 
-	KASSERT((m->oflags & VPO_BUSY) != 0 || (flags & M_NOWAIT) != 0,
-	    ("pmap_enter_locked: page %p is not busy", m));
 	PMAP_ASSERT_LOCKED(pmap);
 	mtx_assert(&vm_page_queue_mtx, MA_OWNED);
 	if (va == vector_page) {
 		pa = systempage.pv_pa;
 		m = NULL;
-	} else
+	} else {
+		KASSERT((m->oflags & VPO_BUSY) != 0 || (flags & M_NOWAIT) != 0,
+		    ("pmap_enter_locked: page %p is not busy", m));
 		pa = VM_PAGE_TO_PHYS(m);
+	}
 	nflags = 0;
 	if (prot & VM_PROT_WRITE)
 		nflags |= PVF_WRITE;

Modified: user/jmallett/octeon/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/zfs_vfsops.c
==============================================================================
--- user/jmallett/octeon/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/zfs_vfsops.c	Tue Jun  1 22:46:57 2010	(r208724)
+++ user/jmallett/octeon/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/zfs_vfsops.c	Wed Jun  2 04:13:10 2010	(r208725)
@@ -499,6 +499,12 @@ zfsvfs_setup(zfsvfs_t *zfsvfs, boolean_t
 	dmu_objset_set_user(zfsvfs->z_os, zfsvfs);
 	mutex_exit(&zfsvfs->z_os->os->os_user_ptr_lock);
 
+	zfsvfs->z_log = zil_open(zfsvfs->z_os, zfs_get_data);
+	if (zil_disable) {
+		zil_destroy(zfsvfs->z_log, B_FALSE);
+		zfsvfs->z_log = NULL;
+	}
+
 	/*
 	 * If we are not mounting (ie: online recv), then we don't
 	 * have to worry about replaying the log as we blocked all
@@ -512,21 +518,45 @@ zfsvfs_setup(zfsvfs_t *zfsvfs, boolean_t
 		 * allow replays to succeed.
 		 */
 		readonly = zfsvfs->z_vfs->vfs_flag & VFS_RDONLY;
-		zfsvfs->z_vfs->vfs_flag &= ~VFS_RDONLY;
-
-		/*
-		 * Parse and replay the intent log.
-		 */
-		zil_replay(zfsvfs->z_os, zfsvfs, &zfsvfs->z_assign,
-		    zfs_replay_vector, zfs_unlinked_drain);
+		if (readonly != 0)
+			zfsvfs->z_vfs->vfs_flag &= ~VFS_RDONLY;
+		else
+			zfs_unlinked_drain(zfsvfs);
 
-		zfs_unlinked_drain(zfsvfs);
+		if (zfsvfs->z_log) {
+			/*
+			 * Parse and replay the intent log.
+			 *
+			 * Because of ziltest, this must be done after
+			 * zfs_unlinked_drain().  (Further note: ziltest
+			 * doesn't use readonly mounts, where
+			 * zfs_unlinked_drain() isn't called.)  This is because
+			 * ziltest causes spa_sync() to think it's committed,
+			 * but actually it is not, so the intent log contains
+			 * many txg's worth of changes.
+			 *
+			 * In particular, if object N is in the unlinked set in
+			 * the last txg to actually sync, then it could be
+			 * actually freed in a later txg and then reallocated
+			 * in a yet later txg.  This would write a "create
+			 * object N" record to the intent log.  Normally, this
+			 * would be fine because the spa_sync() would have
+			 * written out the fact that object N is free, before
+			 * we could write the "create object N" intent log
+			 * record.
+			 *
+			 * But when we are in ziltest mode, we advance the "open
+			 * txg" without actually spa_sync()-ing the changes to
+			 * disk.  So we would see that object N is still
+			 * allocated and in the unlinked set, and there is an
+			 * intent log record saying to allocate it.
+			 */
+			zil_replay(zfsvfs->z_os, zfsvfs, &zfsvfs->z_assign,
+			    zfs_replay_vector, zfs_unlinked_drain);
+		}
 		zfsvfs->z_vfs->vfs_flag |= readonly; /* restore readonly bit */
 	}
 
-	if (!zil_disable)
-		zfsvfs->z_log = zil_open(zfsvfs->z_os, zfs_get_data);
-
 	return (0);
 }
 

Modified: user/jmallett/octeon/sys/dev/acpica/acpi_ec.c
==============================================================================
--- user/jmallett/octeon/sys/dev/acpica/acpi_ec.c	Tue Jun  1 22:46:57 2010	(r208724)
+++ user/jmallett/octeon/sys/dev/acpica/acpi_ec.c	Wed Jun  2 04:13:10 2010	(r208725)
@@ -223,7 +223,7 @@ static ACPI_STATUS	EcSpaceSetup(ACPI_HAN
 				void *Context, void **return_Context);
 static ACPI_STATUS	EcSpaceHandler(UINT32 Function,
 				ACPI_PHYSICAL_ADDRESS Address,
-				UINT32 width, UINT64 *Value,
+				UINT32 Width, UINT64 *Value,
 				void *Context, void *RegionContext);
 static ACPI_STATUS	EcWaitEvent(struct acpi_ec_softc *sc, EC_EVENT Event,
 				u_int gen_count);
@@ -231,7 +231,7 @@ static ACPI_STATUS	EcCommand(struct acpi
 static ACPI_STATUS	EcRead(struct acpi_ec_softc *sc, UINT8 Address,
 				UINT8 *Data);
 static ACPI_STATUS	EcWrite(struct acpi_ec_softc *sc, UINT8 Address,
-				UINT8 *Data);
+				UINT8 Data);
 static int		acpi_ec_probe(device_t dev);
 static int		acpi_ec_attach(device_t dev);
 static int		acpi_ec_suspend(device_t dev);
@@ -717,25 +717,27 @@ EcSpaceSetup(ACPI_HANDLE Region, UINT32 
 }
 
 static ACPI_STATUS
-EcSpaceHandler(UINT32 Function, ACPI_PHYSICAL_ADDRESS Address, UINT32 width,
+EcSpaceHandler(UINT32 Function, ACPI_PHYSICAL_ADDRESS Address, UINT32 Width,
 	       UINT64 *Value, void *Context, void *RegionContext)
 {
     struct acpi_ec_softc	*sc = (struct acpi_ec_softc *)Context;
     ACPI_STATUS			Status;
-    UINT8			EcAddr, EcData;
-    int				i;
+    UINT8			*EcData;
+    UINT8			EcAddr;
+    int				bytes, i;
 
     ACPI_FUNCTION_TRACE_U32((char *)(uintptr_t)__func__, (UINT32)Address);
 
-    if (width % 8 != 0 || Value == NULL || Context == NULL)
+    if (Width % 8 != 0 || Value == NULL || Context == NULL)
 	return_ACPI_STATUS (AE_BAD_PARAMETER);
-    if (Address + (width / 8) - 1 > 0xFF)
+    bytes = Width / 8;
+    if (Address + bytes - 1 > 0xFF)
 	return_ACPI_STATUS (AE_BAD_ADDRESS);
 
     if (Function == ACPI_READ)
 	*Value = 0;
     EcAddr = Address;
-    Status = AE_ERROR;
+    EcData = (UINT8 *)Value;
 
     /*
      * If booting, check if we need to run the query handler.  If so, we
@@ -753,17 +755,14 @@ EcSpaceHandler(UINT32 Function, ACPI_PHY
     if (ACPI_FAILURE(Status))
 	return_ACPI_STATUS (Status);
 
-    /* Perform the transaction(s), based on width. */
-    for (i = 0; i < width; i += 8, EcAddr++) {
+    /* Perform the transaction(s), based on Width. */
+    for (i = 0; i < bytes; i++, EcAddr++, EcData++) {
 	switch (Function) {
 	case ACPI_READ:
-	    Status = EcRead(sc, EcAddr, &EcData);
-	    if (ACPI_SUCCESS(Status))
-		*Value |= ((UINT64)EcData) << i;
+	    Status = EcRead(sc, EcAddr, EcData);
 	    break;
 	case ACPI_WRITE:
-	    EcData = (UINT8)((*Value) >> i);
-	    Status = EcWrite(sc, EcAddr, &EcData);
+	    Status = EcWrite(sc, EcAddr, *EcData);
 	    break;
 	default:
 	    device_printf(sc->ec_dev, "invalid EcSpaceHandler function %d\n",
@@ -986,14 +985,14 @@ EcRead(struct acpi_ec_softc *sc, UINT8 A
 }
 
 static ACPI_STATUS
-EcWrite(struct acpi_ec_softc *sc, UINT8 Address, UINT8 *Data)
+EcWrite(struct acpi_ec_softc *sc, UINT8 Address, UINT8 Data)
 {
     ACPI_STATUS	status;
     UINT8 data;
     u_int gen_count;
 
     ACPI_SERIAL_ASSERT(ec);
-    CTR2(KTR_ACPI, "ec write to %#x, data %#x", Address, *Data);
+    CTR2(KTR_ACPI, "ec write to %#x, data %#x", Address, Data);
 
     /* If we can't start burst mode, continue anyway. */
     status = EcCommand(sc, EC_COMMAND_BURST_ENABLE);
@@ -1018,7 +1017,7 @@ EcWrite(struct acpi_ec_softc *sc, UINT8 
     }
 
     gen_count = sc->ec_gencount;
-    EC_SET_DATA(sc, *Data);
+    EC_SET_DATA(sc, Data);
     status = EcWaitEvent(sc, EC_EVENT_INPUT_BUFFER_EMPTY, gen_count);
     if (ACPI_FAILURE(status)) {
 	device_printf(sc->ec_dev, "EcWrite: failed waiting for sent data\n");

Modified: user/jmallett/octeon/sys/dev/ath/ath_hal/ah.h
==============================================================================
--- user/jmallett/octeon/sys/dev/ath/ath_hal/ah.h	Tue Jun  1 22:46:57 2010	(r208724)
+++ user/jmallett/octeon/sys/dev/ath/ath_hal/ah.h	Wed Jun  2 04:13:10 2010	(r208725)
@@ -324,6 +324,7 @@ typedef enum {
 	HAL_INT_RXORN	= 0x00000020,
 	HAL_INT_TX	= 0x00000040,	/* Non-common mapping */
 	HAL_INT_TXDESC	= 0x00000080,
+	HAL_INT_TIM_TIMER= 0x00000100,
 	HAL_INT_TXURN	= 0x00000800,
 	HAL_INT_MIB	= 0x00001000,
 	HAL_INT_RXPHY	= 0x00004000,

Modified: user/jmallett/octeon/sys/dev/ath/ath_hal/ah_eeprom_v4k.c
==============================================================================
--- user/jmallett/octeon/sys/dev/ath/ath_hal/ah_eeprom_v4k.c	Tue Jun  1 22:46:57 2010	(r208724)
+++ user/jmallett/octeon/sys/dev/ath/ath_hal/ah_eeprom_v4k.c	Wed Jun  2 04:13:10 2010	(r208725)
@@ -38,11 +38,8 @@ v4kEepromGet(struct ath_hal *ah, int par
 	int i;
 
 	switch (param) {
-        case AR_EEP_NFTHRESH_5:
-		*(int16_t *)val = pModal[0].noiseFloorThreshCh[0];
-		return HAL_OK;
         case AR_EEP_NFTHRESH_2:
-		*(int16_t *)val = pModal[1].noiseFloorThreshCh[0];
+		*(int16_t *)val = pModal->noiseFloorThreshCh[0];
 		return HAL_OK;
         case AR_EEP_MACADDR:		/* Get MAC Address */
 		sum = 0;
@@ -67,14 +64,10 @@ v4kEepromGet(struct ath_hal *ah, int par
 		return pBase->opCapFlags;
         case AR_EEP_RFSILENT:
 		return pBase->rfSilent;
-	case AR_EEP_OB_5:
-		return pModal[CHAN_A_IDX].ob;
-    	case AR_EEP_DB_5:
-		return pModal[CHAN_A_IDX].db;
     	case AR_EEP_OB_2:
-		return pModal[CHAN_B_IDX].ob;
+		return pModal->ob;
     	case AR_EEP_DB_2:
-		return pModal[CHAN_B_IDX].db;
+		return pModal->db;
 	case AR_EEP_TXMASK:
 		return pBase->txMask;
 	case AR_EEP_RXMASK:
@@ -84,11 +77,9 @@ v4kEepromGet(struct ath_hal *ah, int par
 	case AR_EEP_TXGAIN_TYPE:
 		return IS_VERS(>=, AR5416_EEP_MINOR_VER_19) ?
 		    pBase->txGainType : AR5416_EEP_TXGAIN_ORIG;
-#if 0
 	case AR_EEP_OL_PWRCTRL:
 		HALASSERT(val == AH_NULL);
-		return pBase->openLoopPwrCntl ?  HAL_OK : HAL_EIO;
-#endif
+		return HAL_EIO;
 	case AR_EEP_AMODE:
 		HALASSERT(val == AH_NULL);
 		return pBase->opCapFlags & AR5416_OPFLAGS_11A ?
@@ -110,15 +101,11 @@ v4kEepromGet(struct ath_hal *ah, int par
 	case AR_EEP_AES:
 	case AR_EEP_BURST:
         case AR_EEP_RFKILL:
-	case AR_EEP_TURBO5DISABLE:
 	case AR_EEP_TURBO2DISABLE:
 		HALASSERT(val == AH_NULL);
 		return HAL_OK;
 	case AR_EEP_ANTGAINMAX_2:
-		*(int8_t *) val = ee->ee_antennaGainMax[1];
-		return HAL_OK;
-	case AR_EEP_ANTGAINMAX_5:
-		*(int8_t *) val = ee->ee_antennaGainMax[0];
+		*(int8_t *) val = ee->ee_antennaGainMax;
 		return HAL_OK;
         default:
 		HALASSERT(0);
@@ -136,10 +123,7 @@ v4kEepromSet(struct ath_hal *ah, int par
 
 	switch (param) {
 	case AR_EEP_ANTGAINMAX_2:
-		ee->ee_antennaGainMax[1] = (int8_t) v;
-		return HAL_OK;
-	case AR_EEP_ANTGAINMAX_5:
-		ee->ee_antennaGainMax[0] = (int8_t) v;
+		ee->ee_antennaGainMax = (int8_t) v;
 		return HAL_OK;
 	}
 	return HAL_EINVAL;
@@ -252,7 +236,7 @@ v4kEepromReadCTLInfo(struct ath_hal *ah,
 	RD_EDGES_POWER *rep = ee->ee_rdEdgesPower;
 	int i, j;
 	
-	HALASSERT(AR5416_NUM_CTLS <= sizeof(ee->ee_rdEdgesPower)/NUM_EDGES);
+	HALASSERT(AR5416_4K_NUM_CTLS <= sizeof(ee->ee_rdEdgesPower)/NUM_EDGES);
 
 	for (i = 0; ee->ee_base.ctlIndex[i] != 0 && i < AR5416_4K_NUM_CTLS; i++) {
 		for (j = 0; j < NUM_EDGES; j ++) {

Modified: user/jmallett/octeon/sys/dev/ath/ath_hal/ah_eeprom_v4k.h
==============================================================================
--- user/jmallett/octeon/sys/dev/ath/ath_hal/ah_eeprom_v4k.h	Tue Jun  1 22:46:57 2010	(r208724)
+++ user/jmallett/octeon/sys/dev/ath/ath_hal/ah_eeprom_v4k.h	Wed Jun  2 04:13:10 2010	(r208725)
@@ -23,6 +23,8 @@
 #include "ah_eeprom.h"
 #include "ah_eeprom_v14.h"
 
+#define	AR9285_RDEXT_DEFAULT	0x1F
+
 #undef owl_eep_start_loc
 #ifdef __LINUX_ARM_ARCH__ /* AP71 */
 #define owl_eep_start_loc		0
@@ -150,6 +152,6 @@ typedef struct {
 	uint16_t	ee_numCtls;
 	RD_EDGES_POWER	ee_rdEdgesPower[NUM_EDGES*AR5416_4K_NUM_CTLS];
 	/* XXX these are dynamically calculated for use by shared code */
-	int8_t		ee_antennaGainMax[2];
+	int8_t		ee_antennaGainMax;
 } HAL_EEPROM_v4k;
 #endif /* _AH_EEPROM_V4K_H_ */

Modified: user/jmallett/octeon/sys/dev/ath/ath_hal/ar5416/ar5416_interrupts.c
==============================================================================
--- user/jmallett/octeon/sys/dev/ath/ath_hal/ar5416/ar5416_interrupts.c	Tue Jun  1 22:46:57 2010	(r208724)
+++ user/jmallett/octeon/sys/dev/ath/ath_hal/ar5416/ar5416_interrupts.c	Wed Jun  2 04:13:10 2010	(r208725)
@@ -120,6 +120,13 @@ ar5416GetPendingInterrupts(struct ath_ha
 			ahp->ah_intrTxqs |= MS(isr1, AR_ISR_S1_QCU_TXEOL);
 		}
 
+		if (AR_SREV_MERLIN(ah) || AR_SREV_KITE(ah)) {
+			uint32_t isr5;
+			isr5 = OS_REG_READ(ah, AR_ISR_S5_S);
+			if (isr5 & AR_ISR_S5_TIM_TIMER)
+				*masked |= HAL_INT_TIM_TIMER;
+		}
+
 		/* Interrupt Mitigation on AR5416 */
 #ifdef AR5416_INT_MITIGATION
 		if (isr & (AR_ISR_RXMINTR | AR_ISR_RXINTM))

Modified: user/jmallett/octeon/sys/dev/ath/ath_hal/ar5416/ar5416_reset.c
==============================================================================
--- user/jmallett/octeon/sys/dev/ath/ath_hal/ar5416/ar5416_reset.c	Tue Jun  1 22:46:57 2010	(r208724)
+++ user/jmallett/octeon/sys/dev/ath/ath_hal/ar5416/ar5416_reset.c	Wed Jun  2 04:13:10 2010	(r208725)
@@ -170,7 +170,16 @@ ar5416Reset(struct ath_hal *ah, HAL_OPMO
 	OS_REG_WRITE(ah, AR_RSSI_THR, rssiThrReg);
 
 	OS_MARK(ah, AH_MARK_RESET_LINE, __LINE__);
+	if (AR_SREV_MERLIN_10_OR_LATER(ah))
+		OS_REG_SET_BIT(ah, AR_GPIO_INPUT_EN_VAL, AR_GPIO_JTAG_DISABLE);
 
+	if (AR_SREV_KITE(ah)) {
+		uint32_t val;
+		val = OS_REG_READ(ah, AR_PHY_HEAVY_CLIP_FACTOR_RIFS);
+		val &= ~AR_PHY_RIFS_INIT_DELAY;
+		OS_REG_WRITE(ah, AR_PHY_HEAVY_CLIP_FACTOR_RIFS, val);
+	}
+	
 	AH5416(ah)->ah_writeIni(ah, chan);
 
 	/* Setup 11n MAC/Phy mode registers */
@@ -1019,8 +1028,11 @@ ar5416SetResetPowerOn(struct ath_hal *ah
     /*
      * RTC reset and clear
      */
+    OS_REG_WRITE(ah, AR_RC, AR_RC_AHB);
     OS_REG_WRITE(ah, AR_RTC_RESET, 0);
     OS_DELAY(20);
+    OS_REG_WRITE(ah, AR_RC, 0);
+
     OS_REG_WRITE(ah, AR_RTC_RESET, 1);
 
     /*

Modified: user/jmallett/octeon/sys/dev/ath/ath_hal/ar5416/ar5416phy.h
==============================================================================
--- user/jmallett/octeon/sys/dev/ath/ath_hal/ar5416/ar5416phy.h	Tue Jun  1 22:46:57 2010	(r208724)
+++ user/jmallett/octeon/sys/dev/ath/ath_hal/ar5416/ar5416phy.h	Wed Jun  2 04:13:10 2010	(r208725)
@@ -111,6 +111,9 @@
 
 #define AR_PHY_HEAVY_CLIP_ENABLE    0x99E0
 
+#define AR_PHY_HEAVY_CLIP_FACTOR_RIFS	0x99ec
+#define AR_PHY_RIFS_INIT_DELAY		0x03ff0000
+
 #define AR_PHY_M_SLEEP      0x99f0      /* sleep control registers */
 #define AR_PHY_REFCLKDLY    0x99f4
 #define AR_PHY_REFCLKPD     0x99f8

Modified: user/jmallett/octeon/sys/dev/ath/ath_hal/ar5416/ar5416reg.h
==============================================================================
--- user/jmallett/octeon/sys/dev/ath/ath_hal/ar5416/ar5416reg.h	Tue Jun  1 22:46:57 2010	(r208724)
+++ user/jmallett/octeon/sys/dev/ath/ath_hal/ar5416/ar5416reg.h	Wed Jun  2 04:13:10 2010	(r208725)
@@ -127,6 +127,7 @@
 #define	AR_EXTRCCNT		0x8328	/* extension channel rx clear count */
 #define	AR_SELFGEN_MASK		0x832c	/* rx and cal chain masks */
 #define	AR_PCU_TXBUF_CTRL	0x8340
+#define	AR_PCU_MISC_MODE2	0x8344
 
 /* DMA & PCI Registers in PCI space (usable during sleep)*/
 #define	AR_RC_AHB		0x00000001	/* AHB reset */
@@ -244,6 +245,10 @@
 #define	AR_ISR_S2_GTT		0x00800000	/* Global transmit timeout */
 #define	AR_ISR_S2_TSFOOR	0x40000000	/* RX TSF out of range */
 
+#define	AR_ISR_S5		0x0098
+#define	AR_ISR_S5_S		0x00d8
+#define	AR_ISR_S5_TIM_TIMER	0x00000010
+
 #define	AR_INTR_SPURIOUS	0xffffffff
 #define	AR_INTR_RTC_IRQ		0x00000001	/* rtc in shutdown state */
 #define	AR_INTR_MAC_IRQ		0x00000002	/* pending mac interrupt */
@@ -495,6 +500,8 @@
 #define	AR_PCU_CLEAR_VMF		0x01000000 /* clear vmf mode (fast cc)*/
 #define	AR_PCU_CLEAR_BA_VALID		0x04000000 /* clear ba state */
 
+#define	AR_PCU_MISC_MODE2_HWWAR1	0x00100000
+
 /* GPIO Interrupt */
 #define	AR_INTR_GPIO		0x3FF00000	/* gpio interrupted */
 #define	AR_INTR_GPIO_S		20
@@ -521,6 +528,8 @@
 #define	AR_GPIO_INTR_POL_VAL	0x1FFF
 #define	AR_GPIO_INTR_POL_VAL_S	0
 
+#define	AR_GPIO_JTAG_DISABLE	0x00020000
+
 #define	AR_2040_JOINED_RX_CLEAR	0x00000001	/* use ctl + ext rx_clear for cca */
 
 #define	AR_PCU_TXBUF_CTRL_SIZE_MASK	0x7FF

Modified: user/jmallett/octeon/sys/dev/ath/ath_hal/ar5416/ar9285_attach.c
==============================================================================
--- user/jmallett/octeon/sys/dev/ath/ath_hal/ar5416/ar9285_attach.c	Tue Jun  1 22:46:57 2010	(r208724)
+++ user/jmallett/octeon/sys/dev/ath/ath_hal/ar5416/ar9285_attach.c	Wed Jun  2 04:13:10 2010	(r208725)
@@ -316,6 +316,16 @@ ar9285WriteIni(struct ath_hal *ah, const
 	regWrites = ath_hal_ini_write(ah, &AH5212(ah)->ah_ini_common,
 	    1, regWrites);
 
+      	OS_REG_SET_BIT(ah, AR_DIAG_SW, (AR_DIAG_RX_DIS | AR_DIAG_RX_ABORT));
+
+	if (AR_SREV_MERLIN_10_OR_LATER(ah)) {
+		uint32_t val;
+		val = OS_REG_READ(ah, AR_PCU_MISC_MODE2) &
+			(~AR_PCU_MISC_MODE2_HWWAR1);
+		OS_REG_WRITE(ah, AR_PCU_MISC_MODE2, val);
+		OS_REG_WRITE(ah, 0x9800 + (651 << 2), 0x11);
+	}
+
 }
 
 /*

Modified: user/jmallett/octeon/sys/dev/ath/ath_hal/ar5416/ar9285_reset.c
==============================================================================
--- user/jmallett/octeon/sys/dev/ath/ath_hal/ar5416/ar9285_reset.c	Tue Jun  1 22:46:57 2010	(r208724)
+++ user/jmallett/octeon/sys/dev/ath/ath_hal/ar5416/ar9285_reset.c	Wed Jun  2 04:13:10 2010	(r208725)
@@ -245,107 +245,60 @@ ar9285SetBoardValues(struct ath_hal *ah,
     const HAL_EEPROM_v4k *ee = AH_PRIVATE(ah)->ah_eeprom;
     const struct ar5416eeprom_4k *eep = &ee->ee_base;
     const MODAL_EEP4K_HEADER *pModal;
-    int			i, regChainOffset;
-    uint8_t		txRxAttenLocal;    /* workaround for eeprom versions <= 14.2 */
+    uint8_t	txRxAttenLocal = 23;
 
     HALASSERT(AH_PRIVATE(ah)->ah_eeversion >= AR_EEPROM_VER14_1);
     pModal = &eep->modalHeader;
 
-    /* NB: workaround for eeprom versions <= 14.2 */
-    txRxAttenLocal = 23;
-
     OS_REG_WRITE(ah, AR_PHY_SWITCH_COM, pModal->antCtrlCommon);
-    for (i = 0; i < AR5416_4K_MAX_CHAINS; i++) { 
-	   if (AR_SREV_MERLIN(ah)) {
-		if (i >= 2) break;
-	   }
-       	   if (AR_SREV_OWL_20_OR_LATER(ah) &&
-            (AH5416(ah)->ah_rx_chainmask == 0x5 ||
-	     AH5416(ah)->ah_tx_chainmask == 0x5) && i != 0) {
-            /* Regs are swapped from chain 2 to 1 for 5416 2_0 with 
-             * only chains 0 and 2 populated 
-             */
-            regChainOffset = (i == 1) ? 0x2000 : 0x1000;
-        } else {
-            regChainOffset = i * 0x1000;
-        }
-
-        OS_REG_WRITE(ah, AR_PHY_SWITCH_CHAIN_0 + regChainOffset, pModal->antCtrlChain[i]);
-        OS_REG_WRITE(ah, AR_PHY_TIMING_CTRL4 + regChainOffset, 
-        	(OS_REG_READ(ah, AR_PHY_TIMING_CTRL4 + regChainOffset) &
+    OS_REG_WRITE(ah, AR_PHY_SWITCH_CHAIN_0, pModal->antCtrlChain[0]);
+    OS_REG_WRITE(ah, AR_PHY_TIMING_CTRL4,
+        	(OS_REG_READ(ah, AR_PHY_TIMING_CTRL4) &
         	~(AR_PHY_TIMING_CTRL4_IQCORR_Q_Q_COFF | AR_PHY_TIMING_CTRL4_IQCORR_Q_I_COFF)) |
-        	SM(pModal->iqCalICh[i], AR_PHY_TIMING_CTRL4_IQCORR_Q_I_COFF) |
-        	SM(pModal->iqCalQCh[i], AR_PHY_TIMING_CTRL4_IQCORR_Q_Q_COFF));
-
-        /*
-         * Large signal upgrade.
-	 * XXX update
-         */
+        	SM(pModal->iqCalICh[0], AR_PHY_TIMING_CTRL4_IQCORR_Q_I_COFF) |
+        	SM(pModal->iqCalQCh[0], AR_PHY_TIMING_CTRL4_IQCORR_Q_Q_COFF));
 
-        if ((i == 0) || AR_SREV_OWL_20_OR_LATER(ah)) {
-            OS_REG_WRITE(ah, AR_PHY_RXGAIN + regChainOffset, 
-		(OS_REG_READ(ah, AR_PHY_RXGAIN + regChainOffset) & ~AR_PHY_RXGAIN_TXRX_ATTEN) |
-			SM(IS_EEP_MINOR_V3(ah)  ? pModal->txRxAttenCh[i] : txRxAttenLocal,
-				AR_PHY_RXGAIN_TXRX_ATTEN));
-
-            OS_REG_WRITE(ah, AR_PHY_GAIN_2GHZ + regChainOffset, 
-	    	(OS_REG_READ(ah, AR_PHY_GAIN_2GHZ + regChainOffset) & ~AR_PHY_GAIN_2GHZ_RXTX_MARGIN) |
-			SM(pModal->rxTxMarginCh[i], AR_PHY_GAIN_2GHZ_RXTX_MARGIN));
-        }
-    }
-
-    OS_REG_RMW_FIELD(ah, AR_PHY_SETTLING, AR_PHY_SETTLING_SWITCH, pModal->switchSettling);
-    OS_REG_RMW_FIELD(ah, AR_PHY_DESIRED_SZ, AR_PHY_DESIRED_SZ_ADC, pModal->adcDesiredSize);
-    OS_REG_RMW_FIELD(ah, AR_PHY_DESIRED_SZ, AR_PHY_DESIRED_SZ_PGA, pModal->pgaDesiredSize);
-    OS_REG_WRITE(ah, AR_PHY_RF_CTL4,
-        SM(pModal->txEndToXpaOff, AR_PHY_RF_CTL4_TX_END_XPAA_OFF)
-        | SM(pModal->txEndToXpaOff, AR_PHY_RF_CTL4_TX_END_XPAB_OFF)
-        | SM(pModal->txFrameToXpaOn, AR_PHY_RF_CTL4_FRAME_XPAA_ON)
-        | SM(pModal->txFrameToXpaOn, AR_PHY_RF_CTL4_FRAME_XPAB_ON));
-
-    OS_REG_RMW_FIELD(ah, AR_PHY_RF_CTL3, AR_PHY_TX_END_TO_A2_RX_ON, pModal->txEndToRxOn);
-
-     OS_REG_RMW_FIELD(ah, AR_PHY_CCA, AR9280_PHY_CCA_THRESH62,
-	    pModal->thresh62);
-     OS_REG_RMW_FIELD(ah, AR_PHY_EXT_CCA0, AR_PHY_EXT_CCA0_THRESH62,
-	    pModal->thresh62);
-    
-    /* Minor Version Specific application */
-    if (IS_EEP_MINOR_V2(ah)) {
-        OS_REG_RMW_FIELD(ah, AR_PHY_RF_CTL2,  AR_PHY_TX_FRAME_TO_DATA_START, pModal->txFrameToDataStart);
-        OS_REG_RMW_FIELD(ah, AR_PHY_RF_CTL2,  AR_PHY_TX_FRAME_TO_PA_ON, pModal->txFrameToPaOn);    
-    }	
-    
     if (IS_EEP_MINOR_V3(ah)) {
 	if (IEEE80211_IS_CHAN_HT40(chan)) {
 		/* Overwrite switch settling with HT40 value */
-		OS_REG_RMW_FIELD(ah, AR_PHY_SETTLING, AR_PHY_SETTLING_SWITCH, pModal->swSettleHt40);
+		OS_REG_RMW_FIELD(ah, AR_PHY_SETTLING, AR_PHY_SETTLING_SWITCH,
+		    pModal->swSettleHt40);
 	}
-	
-        if ((AR_SREV_OWL_20_OR_LATER(ah)) &&
-            (  AH5416(ah)->ah_rx_chainmask == 0x5 || AH5416(ah)->ah_tx_chainmask == 0x5)){
-            /* Reg Offsets are swapped for logical mapping */
-		OS_REG_WRITE(ah, AR_PHY_GAIN_2GHZ + 0x1000, (OS_REG_READ(ah, AR_PHY_GAIN_2GHZ + 0x1000) & ~AR_PHY_GAIN_2GHZ_BSW_MARGIN) |
-			SM(pModal->bswMargin[2], AR_PHY_GAIN_2GHZ_BSW_MARGIN));
-		OS_REG_WRITE(ah, AR_PHY_GAIN_2GHZ + 0x1000, (OS_REG_READ(ah, AR_PHY_GAIN_2GHZ + 0x1000) & ~AR_PHY_GAIN_2GHZ_BSW_ATTEN) |
-			SM(pModal->bswAtten[2], AR_PHY_GAIN_2GHZ_BSW_ATTEN));
-		OS_REG_WRITE(ah, AR_PHY_GAIN_2GHZ + 0x2000, (OS_REG_READ(ah, AR_PHY_GAIN_2GHZ + 0x2000) & ~AR_PHY_GAIN_2GHZ_BSW_MARGIN) |
-			SM(pModal->bswMargin[1], AR_PHY_GAIN_2GHZ_BSW_MARGIN));
-		OS_REG_WRITE(ah, AR_PHY_GAIN_2GHZ + 0x2000, (OS_REG_READ(ah, AR_PHY_GAIN_2GHZ + 0x2000) & ~AR_PHY_GAIN_2GHZ_BSW_ATTEN) |
-			SM(pModal->bswAtten[1], AR_PHY_GAIN_2GHZ_BSW_ATTEN));
-        } else {
-		OS_REG_WRITE(ah, AR_PHY_GAIN_2GHZ + 0x1000, (OS_REG_READ(ah, AR_PHY_GAIN_2GHZ + 0x1000) & ~AR_PHY_GAIN_2GHZ_BSW_MARGIN) |
-			SM(pModal->bswMargin[1], AR_PHY_GAIN_2GHZ_BSW_MARGIN));
-		OS_REG_WRITE(ah, AR_PHY_GAIN_2GHZ + 0x1000, (OS_REG_READ(ah, AR_PHY_GAIN_2GHZ + 0x1000) & ~AR_PHY_GAIN_2GHZ_BSW_ATTEN) |
-			SM(pModal->bswAtten[1], AR_PHY_GAIN_2GHZ_BSW_ATTEN));
-		OS_REG_WRITE(ah, AR_PHY_GAIN_2GHZ + 0x2000, (OS_REG_READ(ah, AR_PHY_GAIN_2GHZ + 0x2000) & ~AR_PHY_GAIN_2GHZ_BSW_MARGIN) |
-			SM(pModal->bswMargin[2],AR_PHY_GAIN_2GHZ_BSW_MARGIN));
-		OS_REG_WRITE(ah, AR_PHY_GAIN_2GHZ + 0x2000, (OS_REG_READ(ah, AR_PHY_GAIN_2GHZ + 0x2000) & ~AR_PHY_GAIN_2GHZ_BSW_ATTEN) |
-			SM(pModal->bswAtten[2], AR_PHY_GAIN_2GHZ_BSW_ATTEN));
-        }
-        OS_REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ, AR_PHY_GAIN_2GHZ_BSW_MARGIN, pModal->bswMargin[0]);
-        OS_REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ, AR_PHY_GAIN_2GHZ_BSW_ATTEN, pModal->bswAtten[0]);
-    }
+	txRxAttenLocal = pModal->txRxAttenCh[0];
+
+        OS_REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ, AR_PHY_GAIN_2GHZ_XATTEN1_MARGIN,
+	    pModal->bswMargin[0]);
+        OS_REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ, AR_PHY_GAIN_2GHZ_XATTEN1_DB,
+	    pModal->bswAtten[0]);
+	OS_REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ, AR_PHY_GAIN_2GHZ_XATTEN2_MARGIN,
+	    pModal->xatten2Margin[0]);
+	OS_REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ, AR_PHY_GAIN_2GHZ_XATTEN2_DB,
+	    pModal->xatten2Db[0]);
+
+	/* block 1 has the same values as block 0 */	
+        OS_REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ + 0x1000,
+	    AR_PHY_GAIN_2GHZ_XATTEN1_MARGIN, pModal->bswMargin[0]);
+        OS_REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ + 0x1000,
+	    AR_PHY_GAIN_2GHZ_XATTEN1_DB, pModal->bswAtten[0]);
+	OS_REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ + 0x1000,
+	    AR_PHY_GAIN_2GHZ_XATTEN2_MARGIN, pModal->xatten2Margin[0]);
+	OS_REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ + 0x1000,
+	    AR_PHY_GAIN_2GHZ_XATTEN2_DB, pModal->xatten2Db[0]);
+
+    }
+    OS_REG_RMW_FIELD(ah, AR_PHY_RXGAIN,
+        AR9280_PHY_RXGAIN_TXRX_ATTEN, txRxAttenLocal);
+    OS_REG_RMW_FIELD(ah, AR_PHY_RXGAIN,
+        AR9280_PHY_RXGAIN_TXRX_MARGIN, pModal->rxTxMarginCh[0]);
+
+    OS_REG_RMW_FIELD(ah, AR_PHY_RXGAIN + 0x1000,
+        AR9280_PHY_RXGAIN_TXRX_ATTEN, txRxAttenLocal);
+    OS_REG_RMW_FIELD(ah, AR_PHY_RXGAIN + 0x1000,
+        AR9280_PHY_RXGAIN_TXRX_MARGIN, pModal->rxTxMarginCh[0]);
+
+    if (AR_SREV_KITE_11(ah))
+	    OS_REG_WRITE(ah, AR9285_AN_TOP4, (AR9285_AN_TOP4_DEFAULT | 0x14));
+
     return AH_TRUE;
 }
 
@@ -634,7 +587,7 @@ ar9285SetPowerCalTable(struct ath_hal *a
     OS_REG_WRITE(ah, AR_PHY_TPCRG1, (OS_REG_READ(ah, AR_PHY_TPCRG1) & 
     	~(AR_PHY_TPCRG1_NUM_PD_GAIN | AR_PHY_TPCRG1_PD_GAIN_1 | AR_PHY_TPCRG1_PD_GAIN_2 | AR_PHY_TPCRG1_PD_GAIN_3)) | 
 	SM(numXpdGain - 1, AR_PHY_TPCRG1_NUM_PD_GAIN) | SM(xpdGainValues[0], AR_PHY_TPCRG1_PD_GAIN_1 ) |
-	SM(xpdGainValues[1], AR_PHY_TPCRG1_PD_GAIN_2) | SM(xpdGainValues[2],  AR_PHY_TPCRG1_PD_GAIN_3));
+	SM(xpdGainValues[1], AR_PHY_TPCRG1_PD_GAIN_2) | SM(0, AR_PHY_TPCRG1_PD_GAIN_3));
 
     for (i = 0; i < AR5416_MAX_CHAINS; i++) {
 

Modified: user/jmallett/octeon/sys/fs/devfs/devfs_vnops.c
==============================================================================
--- user/jmallett/octeon/sys/fs/devfs/devfs_vnops.c	Tue Jun  1 22:46:57 2010	(r208724)
+++ user/jmallett/octeon/sys/fs/devfs/devfs_vnops.c	Wed Jun  2 04:13:10 2010	(r208725)
@@ -459,6 +459,13 @@ devfs_close(struct vop_close_args *ap)
 	int vp_locked, error;
 
 	/*
+	 * XXX: Don't call d_close() if we were called because of
+	 * XXX: insmntque1() failure.
+	 */
+	if (vp->v_data == NULL)
+		return (0);
+
+	/*
 	 * Hack: a tty device that is a controlling terminal
 	 * has a reference from the session structure.
 	 * We cannot easily tell that a character device is

Modified: user/jmallett/octeon/sys/kern/subr_taskqueue.c
==============================================================================
--- user/jmallett/octeon/sys/kern/subr_taskqueue.c	Tue Jun  1 22:46:57 2010	(r208724)
+++ user/jmallett/octeon/sys/kern/subr_taskqueue.c	Wed Jun  2 04:13:10 2010	(r208725)
@@ -51,13 +51,12 @@ struct taskqueue {
 	const char		*tq_name;
 	taskqueue_enqueue_fn	tq_enqueue;
 	void			*tq_context;
+	struct task		*tq_running;
 	struct mtx		tq_mutex;
 	struct thread		**tq_threads;
 	int			tq_tcount;
 	int			tq_spin;
 	int			tq_flags;
-	int			tq_tasks_running;
-	int			tq_task_waiters;
 };
 
 #define	TQ_FLAGS_ACTIVE		(1 << 0)
@@ -234,15 +233,14 @@ taskqueue_run(struct taskqueue *queue)
 		STAILQ_REMOVE_HEAD(&queue->tq_queue, ta_link);
 		pending = task->ta_pending;
 		task->ta_pending = 0;
-		queue->tq_tasks_running++;
+		queue->tq_running = task;
 		TQ_UNLOCK(queue);
 
 		task->ta_func(task->ta_context, pending);
 
 		TQ_LOCK(queue);
-		queue->tq_tasks_running--;
-		if (queue->tq_task_waiters > 0)
-			wakeup(task);
+		queue->tq_running = NULL;
+		wakeup(task);
 	}
 
 	/*
@@ -258,21 +256,15 @@ taskqueue_drain(struct taskqueue *queue,
 {
 	if (queue->tq_spin) {		/* XXX */
 		mtx_lock_spin(&queue->tq_mutex);
-		while (task->ta_pending != 0 || queue->tq_tasks_running > 0) {
-			queue->tq_task_waiters++;
+		while (task->ta_pending != 0 || task == queue->tq_running)
 			msleep_spin(task, &queue->tq_mutex, "-", 0);
-			queue->tq_task_waiters--;
-		}
 		mtx_unlock_spin(&queue->tq_mutex);
 	} else {
 		WITNESS_WARN(WARN_GIANTOK | WARN_SLEEPOK, NULL, __func__);
 
 		mtx_lock(&queue->tq_mutex);
-		while (task->ta_pending != 0 || queue->tq_tasks_running > 0) {
-			queue->tq_task_waiters++;
+		while (task->ta_pending != 0 || task == queue->tq_running)
 			msleep(task, &queue->tq_mutex, PWAIT, "-", 0);
-			queue->tq_task_waiters--;
-		}
 		mtx_unlock(&queue->tq_mutex);
 	}
 }

Modified: user/jmallett/octeon/sys/mips/mips/pmap.c
==============================================================================
--- user/jmallett/octeon/sys/mips/mips/pmap.c	Tue Jun  1 22:46:57 2010	(r208724)
+++ user/jmallett/octeon/sys/mips/mips/pmap.c	Wed Jun  2 04:13:10 2010	(r208725)
@@ -1403,7 +1403,8 @@ pmap_pvh_free(struct md_page *pvh, pmap_
 
 	pv = pmap_pvh_remove(pvh, pmap, va);
 	KASSERT(pv != NULL, ("pmap_pvh_free: pv not found, pa %lx va %lx",
-	     (u_long)VM_PAGE_TO_PHYS(m), (u_long)va));
+	     (u_long)VM_PAGE_TO_PHYS(member2struct(vm_page, md, pvh)),
+	     (u_long)va));
 	free_pv_entry(pv);
 }
 

Modified: user/jmallett/octeon/sys/net80211/ieee80211_hwmp.c
==============================================================================
--- user/jmallett/octeon/sys/net80211/ieee80211_hwmp.c	Tue Jun  1 22:46:57 2010	(r208724)
+++ user/jmallett/octeon/sys/net80211/ieee80211_hwmp.c	Wed Jun  2 04:13:10 2010	(r208725)
@@ -707,6 +707,9 @@ hwmp_recv_preq(struct ieee80211vap *vap,
 	rtorig = ieee80211_mesh_rt_find(vap, preq->preq_origaddr);
 	if (rtorig == NULL)
 		rtorig = ieee80211_mesh_rt_add(vap, preq->preq_origaddr);
+	if (rtorig == NULL)
+		/* XXX stat */
+		return;
 	hrorig = IEEE80211_MESH_ROUTE_PRIV(rtorig, struct ieee80211_hwmp_route);
 	/*
 	 * Sequence number validation.

Modified: user/jmallett/octeon/sys/net80211/ieee80211_ioctl.c
==============================================================================
--- user/jmallett/octeon/sys/net80211/ieee80211_ioctl.c	Tue Jun  1 22:46:57 2010	(r208724)
+++ user/jmallett/octeon/sys/net80211/ieee80211_ioctl.c	Wed Jun  2 04:13:10 2010	(r208725)
@@ -1518,6 +1518,7 @@ setmlme_assoc_adhoc(struct ieee80211vap 
 	memcpy(vap->iv_des_ssid[0].ssid, ssid, ssid_len);
 	vap->iv_des_nssid = 1;
 
+	memset(&sr, 0, sizeof(sr));
 	sr.sr_flags = IEEE80211_IOC_SCAN_ACTIVE | IEEE80211_IOC_SCAN_ONCE;
 	sr.sr_duration = IEEE80211_IOC_SCAN_FOREVER;
 	memcpy(sr.sr_ssid[0].ssid, ssid, ssid_len);
@@ -1627,8 +1628,10 @@ ieee80211_ioctl_setchanlist(struct ieee8
 	if (list == NULL)
 		return ENOMEM;
 	error = copyin(ireq->i_data, list, ireq->i_len);
-	if (error)
+	if (error) {
+		free(list, M_TEMP);
 		return error;
+	}
 	nchan = 0;
 	chanlist = list + ireq->i_len;		/* NB: zero'd already */
 	maxchan = ireq->i_len * NBBY;
@@ -1644,8 +1647,10 @@ ieee80211_ioctl_setchanlist(struct ieee8
 			nchan++;
 		}
 	}
-	if (nchan == 0)
+	if (nchan == 0) {
+		free(list, M_TEMP);
 		return EINVAL;
+	}
 	if (ic->ic_bsschan != IEEE80211_CHAN_ANYC &&	/* XXX */
 	    isclr(chanlist, ic->ic_bsschan->ic_ieee))
 		ic->ic_bsschan = IEEE80211_CHAN_ANYC;

Modified: user/jmallett/octeon/sys/net80211/ieee80211_scan_sta.c
==============================================================================
--- user/jmallett/octeon/sys/net80211/ieee80211_scan_sta.c	Tue Jun  1 22:46:57 2010	(r208724)
+++ user/jmallett/octeon/sys/net80211/ieee80211_scan_sta.c	Wed Jun  2 04:13:10 2010	(r208725)
@@ -1013,7 +1013,7 @@ match_bss(struct ieee80211vap *vap,
 		 */
 		if (se->se_capinfo & (IEEE80211_CAPINFO_IBSS|IEEE80211_CAPINFO_ESS))
 			fail |= MATCH_CAPINFO;
-		else if (se->se_meshid == NULL)
+		else if (&se->se_meshid == NULL)
 			fail |= MATCH_MESH_NOID;
 		else if (ms->ms_idlen != 0 &&
 		    match_id(se->se_meshid, ms->ms_id, ms->ms_idlen))

Modified: user/jmallett/octeon/sys/powerpc/booke/pmap.c
==============================================================================
--- user/jmallett/octeon/sys/powerpc/booke/pmap.c	Tue Jun  1 22:46:57 2010	(r208724)
+++ user/jmallett/octeon/sys/powerpc/booke/pmap.c	Wed Jun  2 04:13:10 2010	(r208725)
@@ -1621,7 +1621,7 @@ mmu_booke_enter_locked(mmu_t mmu, pmap_t
 			 * are turning execute permissions on, icache should
 			 * be flushed.
 			 */
-			if ((flags & (PTE_UX | PTE_SX)) == 0)
+			if ((pte->flags & (PTE_UX | PTE_SX)) == 0)
 				sync++;
 		}
 

Modified: user/jmallett/octeon/sys/sun4v/sun4v/pmap.c
==============================================================================
--- user/jmallett/octeon/sys/sun4v/sun4v/pmap.c	Tue Jun  1 22:46:57 2010	(r208724)
+++ user/jmallett/octeon/sys/sun4v/sun4v/pmap.c	Wed Jun  2 04:13:10 2010	(r208725)

*** DIFF OUTPUT TRUNCATED AT 1000 LINES ***


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