svn commit: r207249 - in user/jmallett/octeon/sys: conf contrib/octeon-sdk mips/cavium mips/conf

Juli Mallett jmallett at FreeBSD.org
Mon Apr 26 20:46:33 UTC 2010


Author: jmallett
Date: Mon Apr 26 20:46:33 2010
New Revision: 207249
URL: http://svn.freebsd.org/changeset/base/207249

Log:
  o) Add an OCTEON_BOARD_CAPK_0100ND config option, which builds for the
     CAPK-0100ND at compile time.  As Cavium notes in the Simple Executive, it's
     one of the many boards from a vendor that didn't bother allocating a board
     ID for themselves and instead mangled an existing one.  We have to know
     we're running on it at compile time.
  o) Add a CAPK_0100ND kernel config which just includes OCTEON1-32 (n32 kernel.)
  o) Fix the TX and RX clock rates for OCTEON_BOARD_CAPK_0100ND, resulting in a
     10% receive performance improvement with ttcp, it seems.
  o) Map IPD port numbers to PHY numbers for OCTEON_BOARD_CAPK_0100ND.  This was
     determined empirically since the vendor's patch to the Simple Executive
     seems to get it wrong.

Added:
  user/jmallett/octeon/sys/mips/conf/CAPK_0100ND
Modified:
  user/jmallett/octeon/sys/conf/options.mips
  user/jmallett/octeon/sys/contrib/octeon-sdk/cvmx-helper-board.c
  user/jmallett/octeon/sys/contrib/octeon-sdk/cvmx-helper-rgmii.c
  user/jmallett/octeon/sys/mips/cavium/cvmx_config.h

Modified: user/jmallett/octeon/sys/conf/options.mips
==============================================================================
--- user/jmallett/octeon/sys/conf/options.mips	Mon Apr 26 20:19:49 2010	(r207248)
+++ user/jmallett/octeon/sys/conf/options.mips	Mon Apr 26 20:46:33 2010	(r207249)
@@ -63,3 +63,8 @@ COMPAT_FREEBSD32	opt_compat.h
 # The highest memory address that can be used by the kernel in units of KB.
 #
 MAXMEM			opt_global.h
+
+#
+# Options that control the Cavium Simple Executive.
+#
+OCTEON_BOARD_CAPK_0100ND	opt_cvmx.h

Modified: user/jmallett/octeon/sys/contrib/octeon-sdk/cvmx-helper-board.c
==============================================================================
--- user/jmallett/octeon/sys/contrib/octeon-sdk/cvmx-helper-board.c	Mon Apr 26 20:19:49 2010	(r207248)
+++ user/jmallett/octeon/sys/contrib/octeon-sdk/cvmx-helper-board.c	Mon Apr 26 20:46:33 2010	(r207249)
@@ -85,6 +85,26 @@ CVMX_SHARED cvmx_helper_link_info_t (*cv
  */
 int cvmx_helper_board_get_mii_address(int ipd_port)
 {
+    /*
+     * Board types we have to know at compile-time.
+     */
+#ifdef OCTEON_BOARD_CAPK_0100ND
+    switch (ipd_port) {
+    case 0:
+	return 2;
+    case 1:
+	return 3;
+    case 2:
+	/* XXX Switch PHY?  */
+	return -1;
+    default:
+	return -1;
+    }
+#endif
+
+    /*
+     * For board types we can determine at runtime.
+     */
     switch (cvmx_sysinfo_get()->board_type)
     {
         case CVMX_BOARD_TYPE_SIM:
@@ -195,6 +215,7 @@ cvmx_helper_link_info_t __cvmx_helper_bo
     /* Unless we fix it later, all links are defaulted to down */
     result.u64 = 0;
 
+#if !defined(OCTEON_BOARD_CAPK_0100ND)
     /* This switch statement should handle all ports that either don't use
         Marvell PHYS, or don't support in-band status */
     switch (cvmx_sysinfo_get()->board_type)
@@ -249,6 +270,7 @@ cvmx_helper_link_info_t __cvmx_helper_bo
             }
             break;
     }
+#endif
 
     phy_addr = cvmx_helper_board_get_mii_address(ipd_port);
     if (phy_addr != -1)
@@ -322,7 +344,11 @@ cvmx_helper_link_info_t __cvmx_helper_bo
                 and set the resolved bit (bit 11) */
             if (phy_status & (1<<11))
             {
+#if defined(OCTEON_BOARD_CAPK_0100ND)
+                result.s.link_up = (phy_status>>10)&1;
+#else
                 result.s.link_up = 1;
+#endif
                 result.s.full_duplex = ((phy_status>>13)&1);
                 switch ((phy_status>>14)&3)
                 {

Modified: user/jmallett/octeon/sys/contrib/octeon-sdk/cvmx-helper-rgmii.c
==============================================================================
--- user/jmallett/octeon/sys/contrib/octeon-sdk/cvmx-helper-rgmii.c	Mon Apr 26 20:19:49 2010	(r207248)
+++ user/jmallett/octeon/sys/contrib/octeon-sdk/cvmx-helper-rgmii.c	Mon Apr 26 20:46:33 2010	(r207249)
@@ -199,6 +199,16 @@ int __cvmx_helper_rgmii_enable(int inter
         cvmx_write_csr(CVMX_GMXX_TXX_PAUSE_PKT_TIME(port, interface), 20000);
         cvmx_write_csr(CVMX_GMXX_TXX_PAUSE_PKT_INTERVAL(port, interface), 19000);
 
+        /*
+         * Board types we have to know at compile-time.
+         */
+#if defined(OCTEON_BOARD_CAPK_0100ND)
+        cvmx_write_csr(CVMX_ASXX_TX_CLK_SETX(port, interface), 26);
+        cvmx_write_csr(CVMX_ASXX_RX_CLK_SETX(port, interface), 26);
+#else
+        /*
+         * For board types we can determine at runtime.
+         */
         if (OCTEON_IS_MODEL(OCTEON_CN50XX))
         {
             cvmx_write_csr(CVMX_ASXX_TX_CLK_SETX(port, interface), 16);
@@ -209,6 +219,7 @@ int __cvmx_helper_rgmii_enable(int inter
             cvmx_write_csr(CVMX_ASXX_TX_CLK_SETX(port, interface), 24);
             cvmx_write_csr(CVMX_ASXX_RX_CLK_SETX(port, interface), 24);
         }
+#endif
     }
 
     __cvmx_helper_setup_gmx(interface, num_ports);

Modified: user/jmallett/octeon/sys/mips/cavium/cvmx_config.h
==============================================================================
--- user/jmallett/octeon/sys/mips/cavium/cvmx_config.h	Mon Apr 26 20:19:49 2010	(r207248)
+++ user/jmallett/octeon/sys/mips/cavium/cvmx_config.h	Mon Apr 26 20:46:33 2010	(r207249)
@@ -39,6 +39,8 @@
 #ifndef	_CVMX_CONFIG_H
 #define	_CVMX_CONFIG_H
 
+#include "opt_cvmx.h"
+
 #include <sys/types.h>
 #include <sys/param.h>
 #include <sys/systm.h>

Added: user/jmallett/octeon/sys/mips/conf/CAPK_0100ND
==============================================================================
--- /dev/null	00:00:00 1970	(empty, because file is newly added)
+++ user/jmallett/octeon/sys/mips/conf/CAPK_0100ND	Mon Apr 26 20:46:33 2010	(r207249)
@@ -0,0 +1,7 @@
+#
+# $FreeBSD$
+#
+
+options 	OCTEON_BOARD_CAPK_0100ND
+
+include		OCTEON1-32


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