svn commit: r206959 - in user/jmallett/octeon/sys/mips: cavium
cavium/dev/rgmii conf
Juli Mallett
jmallett at FreeBSD.org
Tue Apr 20 23:45:09 UTC 2010
Author: jmallett
Date: Tue Apr 20 23:45:09 2010
New Revision: 206959
URL: http://svn.freebsd.org/changeset/base/206959
Log:
Move to using the SDK's version of spinlocks, chords and a few other things.
Added:
user/jmallett/octeon/sys/mips/cavium/cvmx_config.h
Modified:
user/jmallett/octeon/sys/mips/cavium/dev/rgmii/octeon_pko.c
user/jmallett/octeon/sys/mips/cavium/dev/rgmii/octeon_pko.h
user/jmallett/octeon/sys/mips/cavium/dev/rgmii/octeon_rgmx.c
user/jmallett/octeon/sys/mips/cavium/dev/rgmii/octeon_rgmx.h
user/jmallett/octeon/sys/mips/cavium/octeon_pcmap_regs.h
user/jmallett/octeon/sys/mips/conf/OCTEON1
user/jmallett/octeon/sys/mips/conf/OCTEON1-32
user/jmallett/octeon/sys/mips/conf/OCTEON1-o32
Added: user/jmallett/octeon/sys/mips/cavium/cvmx_config.h
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ user/jmallett/octeon/sys/mips/cavium/cvmx_config.h Tue Apr 20 23:45:09 2010 (r206959)
@@ -0,0 +1,7 @@
+#ifndef _CVMX_CONFIG_H
+#define _CVMX_CONFIG_H
+
+#define asm __asm
+#define volatile __volatile
+
+#endif /* !_CVMX_CONFIG_H */
Modified: user/jmallett/octeon/sys/mips/cavium/dev/rgmii/octeon_pko.c
==============================================================================
--- user/jmallett/octeon/sys/mips/cavium/dev/rgmii/octeon_pko.c Tue Apr 20 23:43:32 2010 (r206958)
+++ user/jmallett/octeon/sys/mips/cavium/dev/rgmii/octeon_pko.c Tue Apr 20 23:45:09 2010 (r206959)
@@ -51,6 +51,10 @@ __FBSDID("$FreeBSD$");
#include <vm/pmap.h>
#include <mips/cavium/octeon_pcmap_regs.h>
+
+#include <contrib/octeon-sdk/cvmx.h>
+#include <contrib/octeon-sdk/cvmx-spinlock.h>
+
#include "octeon_fau.h"
#include "octeon_fpa.h"
#include "octeon_pko.h"
@@ -355,7 +359,7 @@ octeon_pko_status_t octeon_pko_config_po
}
sw_queues[queue].xmit_command_state = (buf_ptr << OCTEON_PKO_INDEX_BITS);
- octeon_spinlock_init(&(sw_queues[queue].lock));
+ cvmx_spinlock_init(&(sw_queues[queue].lock));
//#define DEBUG_TX
Modified: user/jmallett/octeon/sys/mips/cavium/dev/rgmii/octeon_pko.h
==============================================================================
--- user/jmallett/octeon/sys/mips/cavium/dev/rgmii/octeon_pko.h Tue Apr 20 23:43:32 2010 (r206958)
+++ user/jmallett/octeon/sys/mips/cavium/dev/rgmii/octeon_pko.h Tue Apr 20 23:45:09 2010 (r206959)
@@ -49,7 +49,6 @@
#define ___OCTEON_PKO__H___
-
/*
* PKO Command Buffer Register.
* Specify Pool-# and Size of each entry in Pool. For Output Cmd Buffers.
@@ -225,7 +224,7 @@ typedef union {
typedef struct octeon_pko_sw_queue_info_t_
{
uint64_t xmit_command_state;
- octeon_spinlock_t lock;
+ cvmx_spinlock_t lock;
uint32_t pad[29];
} octeon_pko_sw_queue_info_t;
@@ -260,7 +259,7 @@ static inline void octeon_pko_ring_doorb
ptr.bits.is_io = 1;
ptr.bits.port = port;
ptr.bits.queue = queue;
- OCTEON_SYNCWS;
+ CVMX_SYNCWS;
oct_write64(ptr.word64, len);
}
Modified: user/jmallett/octeon/sys/mips/cavium/dev/rgmii/octeon_rgmx.c
==============================================================================
--- user/jmallett/octeon/sys/mips/cavium/dev/rgmii/octeon_rgmx.c Tue Apr 20 23:43:32 2010 (r206958)
+++ user/jmallett/octeon/sys/mips/cavium/dev/rgmii/octeon_rgmx.c Tue Apr 20 23:45:09 2010 (r206959)
@@ -88,6 +88,10 @@ __FBSDID("$FreeBSD$");
#include <mips/cavium/octeon_pcmap_regs.h>
+#include <contrib/octeon-sdk/cvmx.h>
+#include <contrib/octeon-sdk/cvmx-scratch.h>
+#include <contrib/octeon-sdk/cvmx-spinlock.h>
+
#include "octeon_fau.h"
#include "octeon_fpa.h"
#include "octeon_ipd.h"
@@ -981,7 +985,7 @@ static u_int octeon_rgmx_pko_xmit_packet
/*
* Get the queue command ptr location from the per port per queue, pko info struct.
*/
- octeon_spinlock_lock(&(sc->outq_ptr[queue].lock));
+ cvmx_spinlock_lock(&(sc->outq_ptr[queue].lock));
#ifdef DEBUG_TX
printf(" xmit: sc->outq_ptr[queue].xmit_command_state: 0x%llX ", sc->outq_ptr[queue].xmit_command_state);
#endif
@@ -1022,7 +1026,7 @@ static u_int octeon_rgmx_pko_xmit_packet
* FPA pool for xmit-buffer-commands is empty.
*/
sc->outq_ptr[queue].xmit_command_state -= 2;
- octeon_spinlock_unlock(&(sc->outq_ptr[queue].lock));
+ cvmx_spinlock_unlock(&(sc->outq_ptr[queue].lock));
return (0);
}
@@ -1034,7 +1038,7 @@ static u_int octeon_rgmx_pko_xmit_packet
/*
* Unlock queue structures.
*/
- octeon_spinlock_unlock(&(sc->outq_ptr[queue].lock));
+ cvmx_spinlock_unlock(&(sc->outq_ptr[queue].lock));
/*
* 2 words incremented in PKO. Ring the doorbell.
Modified: user/jmallett/octeon/sys/mips/cavium/dev/rgmii/octeon_rgmx.h
==============================================================================
--- user/jmallett/octeon/sys/mips/cavium/dev/rgmii/octeon_rgmx.h Tue Apr 20 23:43:32 2010 (r206958)
+++ user/jmallett/octeon/sys/mips/cavium/dev/rgmii/octeon_rgmx.h Tue Apr 20 23:45:09 2010 (r206959)
@@ -440,7 +440,7 @@ static inline void octeon_pow_tag_switch
do
{
- OCTEON_CHORD_HEX(&switch_complete);
+ CVMX_MF_CHORD(switch_complete);
} while (!switch_complete);
return;
@@ -517,8 +517,8 @@ static inline octeon_wqe_t *octeon_pow_w
{
octeon_pow_tag_load_resp_t result;
- OCTEON_SYNCIOBDMA;
- result.word64 = oct_scratch_read64(scratch_addr);
+ CVMX_SYNCIOBDMA;
+ result.word64 = cvmx_scratch_read64(scratch_addr);
if (result.s_work.no_work) {
return NULL;
Modified: user/jmallett/octeon/sys/mips/cavium/octeon_pcmap_regs.h
==============================================================================
--- user/jmallett/octeon/sys/mips/cavium/octeon_pcmap_regs.h Tue Apr 20 23:43:32 2010 (r206958)
+++ user/jmallett/octeon/sys/mips/cavium/octeon_pcmap_regs.h Tue Apr 20 23:45:09 2010 (r206959)
@@ -62,26 +62,6 @@
#define OCTEON_TMP_STR(x) OCTEON_TMP_STR2(x)
#define OCTEON_TMP_STR2(x) #x
-#define OCTEON_PREFETCH_PREF0(address, offset) \
- __asm __volatile ( ".set mips64\n" \
- ".set noreorder\n" \
- "pref 0, " OCTEON_TMP_STR(offset) "(%0)\n" \
- ".set reorder\n" \
- ".set mips0\n" \
- : \
- : "r" (address) );
-
-#define OCTEON_PREFETCH(address, offset) OCTEON_PREFETCH_PREF0(address,offset)
-
-#define OCTEON_PREFETCH0(address) OCTEON_PREFETCH(address, 0)
-#define OCTEON_PREFETCH128(address) OCTEON_PREFETCH(address, 128)
-
-#define OCTEON_SYNCIOBDMA __asm __volatile (".word 0x8f" : : :"memory")
-
-#define OCTEON_SYNCW __asm __volatile (".word 0x10f" : : )
-#define OCTEON_SYNCW __asm __volatile (".word 0x10f" : : )
-#define OCTEON_SYNCWS __asm __volatile (".word 0x14f" : : )
-
#if defined(__mips_n64)
#define oct_write64(a, v) (*(volatile uint64_t *)(a) = (uint64_t)(v))
#define oct_write8_x8(a, v) (*(volatile uint8_t *)(a) = (uint8_t)(v))
@@ -305,45 +285,6 @@ static inline void oct_write32 (uint64_t
#define oct_readint32(a) ((int32_t)oct_read32((a)))
-#define OCTEON_HW_BASE ((volatile uint64_t *) 0L)
-#define OCTEON_REG_OFFSET (-4 * 1024ll) /* local scratchpad reg base */
-#define OCTEON_SCRATCH_BASE ((volatile uint8_t *)(OCTEON_HW_BASE + \
- OCTEON_REG_OFFSET))
-
-#define OCTEON_SCR_SCRATCH 8
-#define OCTEON_SCRATCH_0 16
-#define OCTEON_SCRATCH_1 24
-#define OCTEON_SCRATCH_2 32
-
-
-
-#define OCTEON_CHORD_HEX(dest_ptr) \
- ({ __asm __volatile( \
- ".set push\n" \
- ".set mips3\n" \
- ".set noreorder\n" \
- ".set noat\n" \
- ".word 0x7c02f03b \n"\
- "nop\n" \
- "nop\n" \
- "nop\n" \
- "nop\n" \
- "sd $2,0(%0)\n" \
- ".set pop" \
- : /* no outputs */ : "r" (dest_ptr) : "$2"); \
- })
-
-static inline uint64_t oct_scratch_read64 (uint64_t address)
-{
- return(*((volatile uint64_t *)(OCTEON_SCRATCH_BASE + address)));
-}
-
-static inline void oct_scratch_write64 (uint64_t address, uint64_t value)
-{
- *((volatile uint64_t *)(OCTEON_SCRATCH_BASE + address)) = value;
-}
-
-
/*
* Octeon Address Space Definitions
*/
@@ -552,63 +493,6 @@ static inline uint64_t octeon_build_bits
}
-/********************** simple spinlocks ***************/
-typedef struct {
- volatile uint32_t value;
-} octeon_spinlock_t;
-
-// note - macros not expanded in inline ASM, so values hardcoded
-#define OCTEON_SPINLOCK_UNLOCKED_VAL 0
-#define OCTEON_SPINLOCK_LOCKED_VAL 1
-
-/**
- * Initialize a spinlock
- *
- * @param lock Lock to initialize
- */
-static inline void octeon_spinlock_init(octeon_spinlock_t *lock)
-{
- lock->value = OCTEON_SPINLOCK_UNLOCKED_VAL;
-}
-/**
- * Releases lock
- *
- * @param lock pointer to lock structure
- */
-static inline void octeon_spinlock_unlock(octeon_spinlock_t *lock)
-{
- OCTEON_SYNCWS;
-
- lock->value = 0;
- OCTEON_SYNCWS;
-}
-
-/**
- * Gets lock, spins until lock is taken
- *
- * @param lock pointer to lock structure
- */
-static inline void octeon_spinlock_lock(octeon_spinlock_t *lock)
-{
- unsigned int tmp;
- __asm __volatile(
- ".set noreorder \n"
- "1: ll %1, %0 \n"
- " bnez %1, 1b \n"
- " li %1, 1 \n"
- " sc %1, %0 \n"
- " beqz %1, 1b \n"
- " nop \n"
- ".set reorder \n"
- : "+m" (lock->value), "=&r" (tmp )
- :
- : "memory");
-}
-
-/********************** end simple spinlocks ***************/
-
-
-
/* ------------------------------------------------------------------- *
* octeon_get_chipid() *
* ------------------------------------------------------------------- */
@@ -627,23 +511,6 @@ static inline uint32_t octeon_get_chipid
}
-static inline uint32_t octeon_get_except_base_reg (void)
-{
- uint32_t tmp;
-
- __asm volatile (
- " .set mips64r2 \n"
- " .set noreorder \n"
- " mfc0 %0, $15, 1 \n"
- " .set reorder \n"
- : "=&r" (tmp) : );
-
- return(tmp);
-}
-
-
-
-
static inline unsigned int get_coremask (void)
{
return(~(oct_read64(OCTEON_CIU_PP_RST)) & 0xffff);
@@ -653,7 +520,7 @@ static inline unsigned int get_coremask
static inline uint32_t octeon_get_core_num (void)
{
- return (0x3FF & octeon_get_except_base_reg());
+ return (0x3FF & mips_rd_ebase());
}
@@ -744,23 +611,6 @@ typedef union {
#endif /* LOCORE */
-/*
- * R4K Address space definitions
- */
-#define ADRSPC_K0BASE (0x80000000)
-#define ADRSPC_K0SIZE (0x20000000)
-#define ADRSPC_K1BASE (0xA0000000)
-#define ADRSPC_K1SIZE (0x20000000)
-#define ADRSPC_KSBASE (0xC0000000)
-#define ADRSPC_KSSIZE (0x20000000)
-#define ADRSPC_K3BASE (0xE0000000)
-#define ADRSPC_K3SIZE (0x20000000)
-#define ADRSPC_KUBASE (0x00000000)
-#define ADRSPC_KUSIZE (0x80000000)
-#define KSEG_MSB_ADDR 0xFFFFFFFF
-
-
-
#define OCTEON_CLOCK_DEFAULT (500 * 1000 * 1000)
Modified: user/jmallett/octeon/sys/mips/conf/OCTEON1
==============================================================================
--- user/jmallett/octeon/sys/mips/conf/OCTEON1 Tue Apr 20 23:43:32 2010 (r206958)
+++ user/jmallett/octeon/sys/mips/conf/OCTEON1 Tue Apr 20 23:45:09 2010 (r206959)
@@ -28,7 +28,7 @@ machine mips
cpu CPU_MIPS4KC
ident OCTEON1
-makeoptions ARCH_FLAGS="-march=mips64"
+makeoptions ARCH_FLAGS="-march=mips64r2"
makeoptions LDSCRIPT_NAME=ldscript.mips.octeon1
# Don't build any modules yet.
Modified: user/jmallett/octeon/sys/mips/conf/OCTEON1-32
==============================================================================
--- user/jmallett/octeon/sys/mips/conf/OCTEON1-32 Tue Apr 20 23:43:32 2010 (r206958)
+++ user/jmallett/octeon/sys/mips/conf/OCTEON1-32 Tue Apr 20 23:45:09 2010 (r206959)
@@ -23,7 +23,7 @@ ident OCTEON1
# Don't build any modules yet.
makeoptions MODULES_OVERRIDE=""
-makeoptions ARCH_FLAGS="-march=mips64"
+makeoptions ARCH_FLAGS="-march=mips64r2"
makeoptions LDSCRIPT_NAME=ldscript.mips.octeon1
makeoptions KERNLOADADDR=0xffffffff81000000
Modified: user/jmallett/octeon/sys/mips/conf/OCTEON1-o32
==============================================================================
--- user/jmallett/octeon/sys/mips/conf/OCTEON1-o32 Tue Apr 20 23:43:32 2010 (r206958)
+++ user/jmallett/octeon/sys/mips/conf/OCTEON1-o32 Tue Apr 20 23:45:09 2010 (r206959)
@@ -23,7 +23,7 @@ ident OCTEON1
# Don't build any modules yet.
makeoptions MODULES_OVERRIDE=""
-makeoptions ARCH_FLAGS="-march=mips64"
+makeoptions ARCH_FLAGS="-march=mips64r2"
makeoptions LDSCRIPT_NAME=ldscript.mips.octeon1
makeoptions KERNLOADADDR=0xffffffff81000000
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