svn commit: r206522 - in user/imp/tbemd/sys: amd64/acpica
amd64/amd64 amd64/conf amd64/ia32 amd64/include amd64/linux32
arm/arm arm/conf arm/include arm/mv arm/mv/kirkwood
arm/s3c2xx0 arm/xscale/ix...
Warner Losh
imp at FreeBSD.org
Mon Apr 12 23:12:39 UTC 2010
Author: imp
Date: Mon Apr 12 23:12:38 2010
New Revision: 206522
URL: http://svn.freebsd.org/changeset/base/206522
Log:
merge from head, part 7 of many.
Added:
user/imp/tbemd/sys/arm/conf/LN2410SBC
- copied unchanged from r206514, head/sys/arm/conf/LN2410SBC
user/imp/tbemd/sys/arm/s3c2xx0/
- copied from r206514, head/sys/arm/s3c2xx0/
user/imp/tbemd/sys/boot/i386/efi/
- copied from r206514, head/sys/boot/i386/efi/
user/imp/tbemd/sys/contrib/dev/acpica/compiler/aslpredef.c
- copied unchanged from r206514, head/sys/contrib/dev/acpica/compiler/aslpredef.c
user/imp/tbemd/sys/contrib/dev/acpica/executer/exdebug.c
- copied unchanged from r206514, head/sys/contrib/dev/acpica/executer/exdebug.c
user/imp/tbemd/sys/contrib/dev/iwn/iwlwifi-6000-9.193.4.1.fw.uu
- copied unchanged from r206514, head/sys/contrib/dev/iwn/iwlwifi-6000-9.193.4.1.fw.uu
user/imp/tbemd/sys/dev/e1000/if_lem.c
- copied unchanged from r206514, head/sys/dev/e1000/if_lem.c
user/imp/tbemd/sys/dev/e1000/if_lem.h
- copied unchanged from r206514, head/sys/dev/e1000/if_lem.h
user/imp/tbemd/sys/dev/hwpmc/hwpmc_uncore.c
- copied unchanged from r206514, head/sys/dev/hwpmc/hwpmc_uncore.c
user/imp/tbemd/sys/dev/hwpmc/hwpmc_uncore.h
- copied unchanged from r206514, head/sys/dev/hwpmc/hwpmc_uncore.h
user/imp/tbemd/sys/dev/syscons/logo/beastie.c
- copied unchanged from r206514, head/sys/dev/syscons/logo/beastie.c
user/imp/tbemd/sys/dev/usb/controller/ohci_s3c24x0.c
- copied unchanged from r206514, head/sys/dev/usb/controller/ohci_s3c24x0.c
user/imp/tbemd/sys/geom/sched/
- copied from r206514, head/sys/geom/sched/
Deleted:
user/imp/tbemd/sys/contrib/dev/iwn/iwlwifi-6000-9.176.4.1.fw.uu
user/imp/tbemd/sys/ia64/include/nexusvar.h
Modified:
user/imp/tbemd/sys/amd64/acpica/acpi_machdep.c
user/imp/tbemd/sys/amd64/amd64/apic_vector.S
user/imp/tbemd/sys/amd64/amd64/db_trace.c
user/imp/tbemd/sys/amd64/amd64/exception.S
user/imp/tbemd/sys/amd64/amd64/identcpu.c
user/imp/tbemd/sys/amd64/amd64/local_apic.c
user/imp/tbemd/sys/amd64/amd64/machdep.c
user/imp/tbemd/sys/amd64/amd64/mca.c
user/imp/tbemd/sys/amd64/amd64/pmap.c
user/imp/tbemd/sys/amd64/amd64/trap.c
user/imp/tbemd/sys/amd64/amd64/vm_machdep.c
user/imp/tbemd/sys/amd64/conf/GENERIC
user/imp/tbemd/sys/amd64/conf/NOTES
user/imp/tbemd/sys/amd64/conf/XENHVM
user/imp/tbemd/sys/amd64/ia32/ia32_signal.c
user/imp/tbemd/sys/amd64/include/apicvar.h
user/imp/tbemd/sys/amd64/include/elf.h
user/imp/tbemd/sys/amd64/include/mca.h
user/imp/tbemd/sys/amd64/include/md_var.h
user/imp/tbemd/sys/amd64/include/pmc_mdep.h
user/imp/tbemd/sys/amd64/include/reg.h
user/imp/tbemd/sys/amd64/include/specialreg.h
user/imp/tbemd/sys/amd64/linux32/linux.h
user/imp/tbemd/sys/amd64/linux32/linux32_sysvec.c
user/imp/tbemd/sys/arm/arm/busdma_machdep.c
user/imp/tbemd/sys/arm/arm/identcpu.c
user/imp/tbemd/sys/arm/arm/machdep.c
user/imp/tbemd/sys/arm/arm/pmap.c
user/imp/tbemd/sys/arm/arm/vm_machdep.c
user/imp/tbemd/sys/arm/conf/BWCT.hints
user/imp/tbemd/sys/arm/conf/KB920X
user/imp/tbemd/sys/arm/include/bus.h
user/imp/tbemd/sys/arm/mv/common.c
user/imp/tbemd/sys/arm/mv/kirkwood/kirkwood.c
user/imp/tbemd/sys/arm/mv/mv_sata.c
user/imp/tbemd/sys/arm/xscale/ixp425/cambria_fled.c
user/imp/tbemd/sys/boot/arm/at91/boot2/bwct_board.c
user/imp/tbemd/sys/boot/arm/at91/libat91/at91rm9200_lowlevel.c
user/imp/tbemd/sys/boot/i386/boot2/boot2.c
user/imp/tbemd/sys/boot/i386/gptboot/gptboot.c
user/imp/tbemd/sys/boot/i386/zfsboot/zfsboot.c
user/imp/tbemd/sys/cam/cam_xpt.c
user/imp/tbemd/sys/cam/scsi/scsi_all.h
user/imp/tbemd/sys/cam/scsi/scsi_da.c
user/imp/tbemd/sys/cam/scsi/scsi_sg.c
user/imp/tbemd/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/arc.c
user/imp/tbemd/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/dbuf.c
user/imp/tbemd/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/dmu_zfetch.c
user/imp/tbemd/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/sys/arc.h
user/imp/tbemd/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/vdev_geom.c
user/imp/tbemd/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/zio.c
user/imp/tbemd/sys/compat/freebsd32/freebsd32.h
user/imp/tbemd/sys/compat/freebsd32/freebsd32_ipc.h
user/imp/tbemd/sys/compat/freebsd32/freebsd32_misc.c
user/imp/tbemd/sys/compat/freebsd32/freebsd32_proto.h
user/imp/tbemd/sys/compat/freebsd32/freebsd32_syscall.h
user/imp/tbemd/sys/compat/freebsd32/freebsd32_syscalls.c
user/imp/tbemd/sys/compat/freebsd32/freebsd32_sysent.c
user/imp/tbemd/sys/compat/freebsd32/freebsd32_util.h
user/imp/tbemd/sys/compat/freebsd32/syscalls.master
user/imp/tbemd/sys/compat/ia32/ia32_reg.h
user/imp/tbemd/sys/compat/ia32/ia32_signal.h
user/imp/tbemd/sys/compat/ia32/ia32_sysvec.c
user/imp/tbemd/sys/compat/linprocfs/linprocfs.c
user/imp/tbemd/sys/compat/linux/linux_file.c
user/imp/tbemd/sys/compat/linux/linux_ioctl.c
user/imp/tbemd/sys/compat/linux/linux_stats.c
user/imp/tbemd/sys/compat/svr4/svr4_stat.c
user/imp/tbemd/sys/compat/x86bios/x86bios.c
user/imp/tbemd/sys/conf/NOTES
user/imp/tbemd/sys/conf/files
user/imp/tbemd/sys/conf/files.amd64
user/imp/tbemd/sys/conf/files.i386
user/imp/tbemd/sys/conf/files.ia64
user/imp/tbemd/sys/conf/files.pc98
user/imp/tbemd/sys/conf/files.sparc64
user/imp/tbemd/sys/conf/kern.mk
user/imp/tbemd/sys/conf/kern.post.mk
user/imp/tbemd/sys/conf/kern.pre.mk
user/imp/tbemd/sys/conf/kmod.mk
user/imp/tbemd/sys/conf/ldscript.mips.octeon1.32 (contents, props changed)
user/imp/tbemd/sys/conf/ldscript.mips.octeon1.64 (contents, props changed)
user/imp/tbemd/sys/conf/ldscript.mips.octeon1.n32 (contents, props changed)
user/imp/tbemd/sys/conf/options
user/imp/tbemd/sys/conf/options.amd64
user/imp/tbemd/sys/conf/options.i386
user/imp/tbemd/sys/conf/options.ia64
user/imp/tbemd/sys/contrib/dev/acpica/changes.txt
user/imp/tbemd/sys/contrib/dev/acpica/common/dmextern.c
user/imp/tbemd/sys/contrib/dev/acpica/common/dmtable.c
user/imp/tbemd/sys/contrib/dev/acpica/common/dmtbdump.c
user/imp/tbemd/sys/contrib/dev/acpica/common/dmtbinfo.c
user/imp/tbemd/sys/contrib/dev/acpica/compiler/aslanalyze.c
user/imp/tbemd/sys/contrib/dev/acpica/compiler/aslcompiler.h
user/imp/tbemd/sys/contrib/dev/acpica/compiler/aslglobal.h
user/imp/tbemd/sys/contrib/dev/acpica/compiler/aslmain.c
user/imp/tbemd/sys/contrib/dev/acpica/compiler/aslmap.c
user/imp/tbemd/sys/contrib/dev/acpica/compiler/aslstubs.c
user/imp/tbemd/sys/contrib/dev/acpica/compiler/asltypes.h
user/imp/tbemd/sys/contrib/dev/acpica/debugger/dbdisply.c
user/imp/tbemd/sys/contrib/dev/acpica/dispatcher/dsfield.c
user/imp/tbemd/sys/contrib/dev/acpica/dispatcher/dsmethod.c
user/imp/tbemd/sys/contrib/dev/acpica/dispatcher/dsmthdat.c
user/imp/tbemd/sys/contrib/dev/acpica/dispatcher/dsobject.c
user/imp/tbemd/sys/contrib/dev/acpica/dispatcher/dsopcode.c
user/imp/tbemd/sys/contrib/dev/acpica/dispatcher/dswexec.c
user/imp/tbemd/sys/contrib/dev/acpica/dispatcher/dswstate.c
user/imp/tbemd/sys/contrib/dev/acpica/events/evevent.c
user/imp/tbemd/sys/contrib/dev/acpica/events/evgpe.c
user/imp/tbemd/sys/contrib/dev/acpica/events/evgpeblk.c
user/imp/tbemd/sys/contrib/dev/acpica/events/evmisc.c
user/imp/tbemd/sys/contrib/dev/acpica/events/evxface.c
user/imp/tbemd/sys/contrib/dev/acpica/events/evxfevnt.c
user/imp/tbemd/sys/contrib/dev/acpica/executer/exconvrt.c
user/imp/tbemd/sys/contrib/dev/acpica/executer/excreate.c
user/imp/tbemd/sys/contrib/dev/acpica/executer/exfield.c
user/imp/tbemd/sys/contrib/dev/acpica/executer/exfldio.c
user/imp/tbemd/sys/contrib/dev/acpica/executer/exmisc.c
user/imp/tbemd/sys/contrib/dev/acpica/executer/exmutex.c
user/imp/tbemd/sys/contrib/dev/acpica/executer/exnames.c
user/imp/tbemd/sys/contrib/dev/acpica/executer/exoparg1.c
user/imp/tbemd/sys/contrib/dev/acpica/executer/exoparg2.c
user/imp/tbemd/sys/contrib/dev/acpica/executer/exoparg3.c
user/imp/tbemd/sys/contrib/dev/acpica/executer/exoparg6.c
user/imp/tbemd/sys/contrib/dev/acpica/executer/exprep.c
user/imp/tbemd/sys/contrib/dev/acpica/executer/exregion.c
user/imp/tbemd/sys/contrib/dev/acpica/executer/exresnte.c
user/imp/tbemd/sys/contrib/dev/acpica/executer/exresolv.c
user/imp/tbemd/sys/contrib/dev/acpica/executer/exresop.c
user/imp/tbemd/sys/contrib/dev/acpica/executer/exstore.c
user/imp/tbemd/sys/contrib/dev/acpica/executer/exsystem.c
user/imp/tbemd/sys/contrib/dev/acpica/hardware/hwregs.c
user/imp/tbemd/sys/contrib/dev/acpica/hardware/hwsleep.c
user/imp/tbemd/sys/contrib/dev/acpica/hardware/hwvalid.c
user/imp/tbemd/sys/contrib/dev/acpica/include/acdisasm.h
user/imp/tbemd/sys/contrib/dev/acpica/include/acevents.h
user/imp/tbemd/sys/contrib/dev/acpica/include/acexcep.h
user/imp/tbemd/sys/contrib/dev/acpica/include/acglobal.h
user/imp/tbemd/sys/contrib/dev/acpica/include/acinterp.h
user/imp/tbemd/sys/contrib/dev/acpica/include/aclocal.h
user/imp/tbemd/sys/contrib/dev/acpica/include/acoutput.h
user/imp/tbemd/sys/contrib/dev/acpica/include/acpixf.h
user/imp/tbemd/sys/contrib/dev/acpica/include/actables.h
user/imp/tbemd/sys/contrib/dev/acpica/include/actbl2.h
user/imp/tbemd/sys/contrib/dev/acpica/include/actypes.h
user/imp/tbemd/sys/contrib/dev/acpica/include/platform/acfreebsd.h
user/imp/tbemd/sys/contrib/dev/acpica/namespace/nsaccess.c
user/imp/tbemd/sys/contrib/dev/acpica/namespace/nsdump.c
user/imp/tbemd/sys/contrib/dev/acpica/namespace/nsnames.c
user/imp/tbemd/sys/contrib/dev/acpica/namespace/nssearch.c
user/imp/tbemd/sys/contrib/dev/acpica/namespace/nsutils.c
user/imp/tbemd/sys/contrib/dev/acpica/parser/psargs.c
user/imp/tbemd/sys/contrib/dev/acpica/parser/psloop.c
user/imp/tbemd/sys/contrib/dev/acpica/parser/psxface.c
user/imp/tbemd/sys/contrib/dev/acpica/resources/rscreate.c
user/imp/tbemd/sys/contrib/dev/acpica/resources/rslist.c
user/imp/tbemd/sys/contrib/dev/acpica/resources/rsmisc.c
user/imp/tbemd/sys/contrib/dev/acpica/tables/tbfadt.c
user/imp/tbemd/sys/contrib/dev/acpica/tables/tbutils.c
user/imp/tbemd/sys/contrib/dev/acpica/tables/tbxface.c
user/imp/tbemd/sys/contrib/dev/acpica/tables/tbxfroot.c
user/imp/tbemd/sys/contrib/dev/acpica/utilities/utalloc.c
user/imp/tbemd/sys/contrib/dev/acpica/utilities/utdelete.c
user/imp/tbemd/sys/contrib/dev/acpica/utilities/uteval.c
user/imp/tbemd/sys/contrib/dev/acpica/utilities/utglobal.c
user/imp/tbemd/sys/contrib/dev/acpica/utilities/utmisc.c
user/imp/tbemd/sys/contrib/dev/acpica/utilities/utmutex.c
user/imp/tbemd/sys/contrib/dev/acpica/utilities/utobject.c
user/imp/tbemd/sys/contrib/dev/acpica/utilities/uttrack.c
user/imp/tbemd/sys/contrib/dev/iwn/LICENSE
user/imp/tbemd/sys/contrib/x86emu/x86emu.c
user/imp/tbemd/sys/dev/aac/aac.c
user/imp/tbemd/sys/dev/acpica/acpi.c
user/imp/tbemd/sys/dev/acpica/acpi_button.c
user/imp/tbemd/sys/dev/acpica/acpi_ec.c
user/imp/tbemd/sys/dev/acpica/acpi_lid.c
user/imp/tbemd/sys/dev/acpica/acpi_video.c
user/imp/tbemd/sys/dev/acpica/acpivar.h
user/imp/tbemd/sys/dev/agp/agp_i810.c
user/imp/tbemd/sys/dev/ahci/ahci.c
user/imp/tbemd/sys/dev/ata/ata-all.h
user/imp/tbemd/sys/dev/ata/ata-raid.c
user/imp/tbemd/sys/dev/ath/ath_hal/ar5416/ar9285_attach.c
user/imp/tbemd/sys/dev/ath/if_ath.c
user/imp/tbemd/sys/dev/bce/if_bce.c
user/imp/tbemd/sys/dev/bce/if_bcefw.h
user/imp/tbemd/sys/dev/bce/if_bcereg.h
user/imp/tbemd/sys/dev/bge/if_bge.c
user/imp/tbemd/sys/dev/bktr/ioctl_bt848.h
user/imp/tbemd/sys/dev/bktr/ioctl_meteor.h
user/imp/tbemd/sys/dev/bwi/if_bwi.c
user/imp/tbemd/sys/dev/bwi/if_bwivar.h
user/imp/tbemd/sys/dev/bwn/if_bwn.c
user/imp/tbemd/sys/dev/bwn/if_bwnvar.h
user/imp/tbemd/sys/dev/cxgb/common/cxgb_ael1002.c
user/imp/tbemd/sys/dev/cxgb/common/cxgb_common.h
user/imp/tbemd/sys/dev/cxgb/common/cxgb_t3_hw.c
user/imp/tbemd/sys/dev/cxgb/cxgb_adapter.h
user/imp/tbemd/sys/dev/cxgb/cxgb_main.c
user/imp/tbemd/sys/dev/cxgb/cxgb_sge.c
user/imp/tbemd/sys/dev/drm/drm_pciids.h
user/imp/tbemd/sys/dev/drm/i915_drv.h
user/imp/tbemd/sys/dev/drm/i915_reg.h
user/imp/tbemd/sys/dev/e1000/e1000_80003es2lan.c
user/imp/tbemd/sys/dev/e1000/e1000_82571.c
user/imp/tbemd/sys/dev/e1000/e1000_82575.c
user/imp/tbemd/sys/dev/e1000/e1000_82575.h
user/imp/tbemd/sys/dev/e1000/e1000_defines.h
user/imp/tbemd/sys/dev/e1000/e1000_hw.h
user/imp/tbemd/sys/dev/e1000/e1000_ich8lan.c
user/imp/tbemd/sys/dev/e1000/e1000_ich8lan.h
user/imp/tbemd/sys/dev/e1000/e1000_mac.c
user/imp/tbemd/sys/dev/e1000/e1000_manage.c
user/imp/tbemd/sys/dev/e1000/e1000_phy.c
user/imp/tbemd/sys/dev/e1000/e1000_regs.h
user/imp/tbemd/sys/dev/e1000/if_em.c
user/imp/tbemd/sys/dev/e1000/if_em.h
user/imp/tbemd/sys/dev/e1000/if_igb.c
user/imp/tbemd/sys/dev/e1000/if_igb.h
user/imp/tbemd/sys/dev/fb/vesa.c
user/imp/tbemd/sys/dev/fb/vga.c
user/imp/tbemd/sys/dev/firewire/sbp.c
user/imp/tbemd/sys/dev/hwpmc/hwpmc_core.c
user/imp/tbemd/sys/dev/hwpmc/hwpmc_core.h
user/imp/tbemd/sys/dev/hwpmc/hwpmc_intel.c
user/imp/tbemd/sys/dev/hwpmc/hwpmc_logging.c
user/imp/tbemd/sys/dev/hwpmc/hwpmc_mod.c
user/imp/tbemd/sys/dev/hwpmc/pmc_events.h
user/imp/tbemd/sys/dev/isp/isp.c
user/imp/tbemd/sys/dev/isp/isp_freebsd.c
user/imp/tbemd/sys/dev/isp/isp_freebsd.h
user/imp/tbemd/sys/dev/isp/isp_library.c
user/imp/tbemd/sys/dev/isp/isp_pci.c
user/imp/tbemd/sys/dev/isp/isp_sbus.c
user/imp/tbemd/sys/dev/isp/ispvar.h
user/imp/tbemd/sys/dev/ispfw/ispfw.c
user/imp/tbemd/sys/dev/iwn/if_iwn.c
user/imp/tbemd/sys/dev/iwn/if_iwnreg.h
user/imp/tbemd/sys/dev/iwn/if_iwnvar.h
user/imp/tbemd/sys/dev/ixgbe/LICENSE
user/imp/tbemd/sys/dev/ixgbe/ixgbe.c
user/imp/tbemd/sys/dev/ixgbe/ixgbe.h
user/imp/tbemd/sys/dev/ixgbe/ixgbe_82598.c
user/imp/tbemd/sys/dev/ixgbe/ixgbe_82599.c
user/imp/tbemd/sys/dev/ixgbe/ixgbe_api.c
user/imp/tbemd/sys/dev/ixgbe/ixgbe_api.h
user/imp/tbemd/sys/dev/ixgbe/ixgbe_common.c
user/imp/tbemd/sys/dev/ixgbe/ixgbe_phy.c
user/imp/tbemd/sys/dev/ixgbe/ixgbe_phy.h
user/imp/tbemd/sys/dev/ixgbe/ixgbe_type.h
user/imp/tbemd/sys/dev/malo/if_malo.c
user/imp/tbemd/sys/dev/mii/brgphy.c
user/imp/tbemd/sys/dev/mii/brgphyreg.h
user/imp/tbemd/sys/dev/mii/mii.c
user/imp/tbemd/sys/dev/mii/miidevs
user/imp/tbemd/sys/dev/mpt/mpt_cam.c
user/imp/tbemd/sys/dev/msk/if_msk.c
user/imp/tbemd/sys/dev/msk/if_mskreg.h
user/imp/tbemd/sys/dev/mxge/if_mxge.c
user/imp/tbemd/sys/dev/ofw/ofw_standard.c
user/imp/tbemd/sys/dev/pci/vga_pci.c
user/imp/tbemd/sys/dev/ppc/ppc_pci.c
user/imp/tbemd/sys/dev/ral/rt2560.c
user/imp/tbemd/sys/dev/ral/rt2560var.h
user/imp/tbemd/sys/dev/ral/rt2661.c
user/imp/tbemd/sys/dev/ral/rt2661var.h
user/imp/tbemd/sys/dev/re/if_re.c
user/imp/tbemd/sys/dev/siba/siba.c
user/imp/tbemd/sys/dev/siba/siba_bwn.c
user/imp/tbemd/sys/dev/siba/siba_cc.c
user/imp/tbemd/sys/dev/siba/siba_core.c
user/imp/tbemd/sys/dev/siba/siba_pcib.c
user/imp/tbemd/sys/dev/siba/sibavar.h
user/imp/tbemd/sys/dev/siis/siis.c
user/imp/tbemd/sys/dev/sound/pci/envy24.c
user/imp/tbemd/sys/dev/sound/pci/envy24.h
user/imp/tbemd/sys/dev/sound/pci/envy24ht.c
user/imp/tbemd/sys/dev/sound/pci/envy24ht.h
user/imp/tbemd/sys/dev/sound/pci/es137x.c
user/imp/tbemd/sys/dev/sound/pci/es137x.h
user/imp/tbemd/sys/dev/sound/pci/hda/hdac.c
user/imp/tbemd/sys/dev/sound/pci/spicds.c
user/imp/tbemd/sys/dev/sound/pci/spicds.h
user/imp/tbemd/sys/dev/sound/pcm/dsp.c
user/imp/tbemd/sys/dev/syscons/logo/logo.c
user/imp/tbemd/sys/dev/syscons/logo/logo_saver.c
user/imp/tbemd/sys/dev/syscons/scvgarndr.c
user/imp/tbemd/sys/dev/syscons/scvidctl.c
user/imp/tbemd/sys/dev/syscons/syscons.c
user/imp/tbemd/sys/dev/uart/uart.h
user/imp/tbemd/sys/dev/uart/uart_cpu_sparc64.c
user/imp/tbemd/sys/dev/ubsec/ubsec.c
user/imp/tbemd/sys/dev/usb/controller/ehci_pci.c
user/imp/tbemd/sys/dev/usb/controller/ohci_pci.c
user/imp/tbemd/sys/dev/usb/controller/usb_controller.c
user/imp/tbemd/sys/dev/usb/controller/uss820dci.c
user/imp/tbemd/sys/dev/usb/input/ukbd.c
user/imp/tbemd/sys/dev/usb/quirk/usb_quirk.c
user/imp/tbemd/sys/dev/usb/serial/uftdi.c
user/imp/tbemd/sys/dev/usb/serial/uvisor.c
user/imp/tbemd/sys/dev/usb/template/usb_template.c
user/imp/tbemd/sys/dev/usb/template/usb_template.h
user/imp/tbemd/sys/dev/usb/template/usb_template_mtp.c
user/imp/tbemd/sys/dev/usb/usb_compat_linux.c
user/imp/tbemd/sys/dev/usb/usb_device.c
user/imp/tbemd/sys/dev/usb/usb_device.h
user/imp/tbemd/sys/dev/usb/usb_generic.c
user/imp/tbemd/sys/dev/usb/usb_transfer.c
user/imp/tbemd/sys/dev/usb/usbdevs
user/imp/tbemd/sys/dev/usb/wlan/if_rum.c
user/imp/tbemd/sys/dev/usb/wlan/if_rumvar.h
user/imp/tbemd/sys/dev/usb/wlan/if_run.c
user/imp/tbemd/sys/dev/usb/wlan/if_runreg.h
user/imp/tbemd/sys/dev/usb/wlan/if_runvar.h
user/imp/tbemd/sys/dev/usb/wlan/if_ural.c
user/imp/tbemd/sys/dev/usb/wlan/if_uralvar.h
user/imp/tbemd/sys/dev/usb/wlan/if_zyd.c
user/imp/tbemd/sys/dev/usb/wlan/if_zydreg.h
user/imp/tbemd/sys/dev/wpi/if_wpi.c
user/imp/tbemd/sys/dev/wpi/if_wpivar.h
user/imp/tbemd/sys/dev/xen/netback/netback.c
user/imp/tbemd/sys/fs/coda/cnode.h
user/imp/tbemd/sys/fs/coda/coda.h
user/imp/tbemd/sys/fs/coda/coda_subr.c
user/imp/tbemd/sys/fs/coda/coda_subr.h
user/imp/tbemd/sys/fs/coda/coda_venus.c
user/imp/tbemd/sys/fs/coda/coda_venus.h
user/imp/tbemd/sys/fs/coda/coda_vfsops.c
user/imp/tbemd/sys/fs/coda/coda_vfsops.h
user/imp/tbemd/sys/fs/coda/coda_vnops.c
user/imp/tbemd/sys/fs/deadfs/dead_vnops.c
user/imp/tbemd/sys/fs/fdescfs/fdesc_vnops.c
user/imp/tbemd/sys/fs/msdosfs/msdosfs_vfsops.c
user/imp/tbemd/sys/fs/nfs/nfs_commonport.c
user/imp/tbemd/sys/fs/nfs/nfs_commonsubs.c
user/imp/tbemd/sys/fs/nfs/nfs_var.h
user/imp/tbemd/sys/fs/nfs/nfsport.h
user/imp/tbemd/sys/fs/nfs/nfsrvstate.h
user/imp/tbemd/sys/fs/nfsserver/nfs_nfsdport.c
user/imp/tbemd/sys/fs/nfsserver/nfs_nfsdserv.c
user/imp/tbemd/sys/fs/nfsserver/nfs_nfsdstate.c
user/imp/tbemd/sys/fs/nwfs/nwfs.h
user/imp/tbemd/sys/fs/nwfs/nwfs_io.c
user/imp/tbemd/sys/fs/nwfs/nwfs_ioctl.c
user/imp/tbemd/sys/fs/nwfs/nwfs_mount.h
user/imp/tbemd/sys/fs/nwfs/nwfs_node.c
user/imp/tbemd/sys/fs/nwfs/nwfs_node.h
user/imp/tbemd/sys/fs/nwfs/nwfs_subr.c
user/imp/tbemd/sys/fs/nwfs/nwfs_subr.h
user/imp/tbemd/sys/fs/nwfs/nwfs_vfsops.c
user/imp/tbemd/sys/fs/nwfs/nwfs_vnops.c
user/imp/tbemd/sys/fs/procfs/procfs_dbregs.c
user/imp/tbemd/sys/fs/procfs/procfs_fpregs.c
user/imp/tbemd/sys/fs/procfs/procfs_ioctl.c
user/imp/tbemd/sys/fs/procfs/procfs_map.c
user/imp/tbemd/sys/fs/procfs/procfs_regs.c
user/imp/tbemd/sys/fs/smbfs/smbfs.h
user/imp/tbemd/sys/fs/smbfs/smbfs_io.c
user/imp/tbemd/sys/fs/smbfs/smbfs_node.c
user/imp/tbemd/sys/fs/smbfs/smbfs_node.h
user/imp/tbemd/sys/fs/smbfs/smbfs_smb.c
user/imp/tbemd/sys/fs/smbfs/smbfs_subr.c
user/imp/tbemd/sys/fs/smbfs/smbfs_subr.h
user/imp/tbemd/sys/fs/smbfs/smbfs_vfsops.c
user/imp/tbemd/sys/fs/smbfs/smbfs_vnops.c
user/imp/tbemd/sys/geom/gate/g_gate.c
user/imp/tbemd/sys/geom/geom_dump.c
user/imp/tbemd/sys/geom/geom_io.c
user/imp/tbemd/sys/geom/geom_vfs.c
user/imp/tbemd/sys/geom/multipath/g_multipath.c
user/imp/tbemd/sys/geom/vinum/geom_vinum.c
user/imp/tbemd/sys/i386/acpica/acpi_machdep.c
user/imp/tbemd/sys/i386/conf/GENERIC
user/imp/tbemd/sys/i386/conf/NOTES
user/imp/tbemd/sys/i386/conf/XEN
user/imp/tbemd/sys/i386/i386/apic_vector.s
user/imp/tbemd/sys/i386/i386/identcpu.c
user/imp/tbemd/sys/i386/i386/local_apic.c
user/imp/tbemd/sys/i386/i386/machdep.c
user/imp/tbemd/sys/i386/i386/mca.c
user/imp/tbemd/sys/i386/i386/mp_machdep.c
user/imp/tbemd/sys/i386/i386/mpboot.s
user/imp/tbemd/sys/i386/i386/pmap.c
user/imp/tbemd/sys/i386/i386/trap.c
user/imp/tbemd/sys/i386/ibcs2/ibcs2_stat.c
user/imp/tbemd/sys/i386/include/apicvar.h
user/imp/tbemd/sys/i386/include/bootinfo.h
user/imp/tbemd/sys/i386/include/mca.h
user/imp/tbemd/sys/i386/include/md_var.h
user/imp/tbemd/sys/i386/include/pmc_mdep.h
user/imp/tbemd/sys/i386/include/specialreg.h
user/imp/tbemd/sys/i386/linux/linux.h
user/imp/tbemd/sys/i386/linux/linux_sysvec.c
user/imp/tbemd/sys/i386/xen/mp_machdep.c
user/imp/tbemd/sys/ia64/conf/GENERIC
user/imp/tbemd/sys/ia64/conf/NOTES
user/imp/tbemd/sys/ia64/ia32/ia32_signal.c
user/imp/tbemd/sys/ia64/ia64/autoconf.c
user/imp/tbemd/sys/ia64/ia64/clock.c
user/imp/tbemd/sys/ia64/ia64/db_machdep.c
user/imp/tbemd/sys/ia64/ia64/exception.S
user/imp/tbemd/sys/ia64/ia64/genassym.c
user/imp/tbemd/sys/ia64/ia64/highfp.c
user/imp/tbemd/sys/ia64/ia64/interrupt.c
user/imp/tbemd/sys/ia64/ia64/locore.S
user/imp/tbemd/sys/ia64/ia64/machdep.c
user/imp/tbemd/sys/ia64/ia64/mp_machdep.c
user/imp/tbemd/sys/ia64/ia64/nexus.c
user/imp/tbemd/sys/ia64/ia64/pmap.c
user/imp/tbemd/sys/ia64/ia64/sal.c
user/imp/tbemd/sys/ia64/ia64/sapic.c
user/imp/tbemd/sys/ia64/ia64/trap.c
user/imp/tbemd/sys/ia64/ia64/vm_machdep.c
user/imp/tbemd/sys/ia64/include/acpica_machdep.h
user/imp/tbemd/sys/ia64/include/clock.h
user/imp/tbemd/sys/ia64/include/cpufunc.h
user/imp/tbemd/sys/ia64/include/elf.h
user/imp/tbemd/sys/ia64/include/frame.h
user/imp/tbemd/sys/ia64/include/intr.h
user/imp/tbemd/sys/ia64/include/intrcnt.h
user/imp/tbemd/sys/ia64/include/pcb.h
user/imp/tbemd/sys/ia64/include/pcpu.h
user/imp/tbemd/sys/ia64/include/reg.h
user/imp/tbemd/sys/ia64/include/smp.h
user/imp/tbemd/sys/ia64/pci/pci_cfgreg.c
user/imp/tbemd/sys/kern/imgact_elf.c
user/imp/tbemd/sys/kern/init_main.c
user/imp/tbemd/sys/kern/kern_alq.c
user/imp/tbemd/sys/kern/kern_clock.c
user/imp/tbemd/sys/kern/kern_event.c
user/imp/tbemd/sys/kern/kern_exec.c
user/imp/tbemd/sys/kern/kern_jail.c
user/imp/tbemd/sys/kern/kern_ktr.c
user/imp/tbemd/sys/kern/kern_module.c
user/imp/tbemd/sys/kern/kern_rwlock.c
user/imp/tbemd/sys/kern/kern_sig.c
user/imp/tbemd/sys/kern/kern_syscalls.c
user/imp/tbemd/sys/kern/kern_thr.c
user/imp/tbemd/sys/kern/kern_umtx.c
user/imp/tbemd/sys/kern/subr_eventhandler.c
user/imp/tbemd/sys/kern/subr_firmware.c
user/imp/tbemd/sys/kern/sys_generic.c
user/imp/tbemd/sys/kern/sys_pipe.c
user/imp/tbemd/sys/kern/sys_process.c
user/imp/tbemd/sys/kern/sysv_ipc.c
user/imp/tbemd/sys/kern/sysv_msg.c
user/imp/tbemd/sys/kern/sysv_sem.c
user/imp/tbemd/sys/kern/sysv_shm.c
user/imp/tbemd/sys/kern/tty_pts.c
user/imp/tbemd/sys/kern/uipc_mqueue.c
user/imp/tbemd/sys/kern/uipc_sem.c
user/imp/tbemd/sys/kern/uipc_shm.c
user/imp/tbemd/sys/kern/uipc_socket.c
user/imp/tbemd/sys/kern/uipc_syscalls.c
user/imp/tbemd/sys/kern/vfs_aio.c
user/imp/tbemd/sys/kern/vfs_bio.c
user/imp/tbemd/sys/kern/vfs_default.c
user/imp/tbemd/sys/kern/vfs_lookup.c
user/imp/tbemd/sys/kern/vfs_subr.c
user/imp/tbemd/sys/kern/vfs_syscalls.c
user/imp/tbemd/sys/kern/vfs_vnops.c
user/imp/tbemd/sys/libkern/iconv.c
user/imp/tbemd/sys/libkern/iconv_converter_if.m
user/imp/tbemd/sys/libkern/iconv_xlat.c
user/imp/tbemd/sys/libkern/strcasecmp.c
Directory Properties:
user/imp/tbemd/sys/contrib/dev/acpica/ (props changed)
user/imp/tbemd/sys/contrib/x86emu/ (props changed)
user/imp/tbemd/sys/dev/ath/ath_hal/ar5416/ar9160.ini (props changed)
Modified: user/imp/tbemd/sys/amd64/acpica/acpi_machdep.c
==============================================================================
--- user/imp/tbemd/sys/amd64/acpica/acpi_machdep.c Mon Apr 12 23:11:20 2010 (r206521)
+++ user/imp/tbemd/sys/amd64/acpica/acpi_machdep.c Mon Apr 12 23:12:38 2010 (r206522)
@@ -627,8 +627,10 @@ map_table(vm_paddr_t pa, int offset, con
if (ACPI_FAILURE(AcpiTbChecksum(table, length))) {
if (bootverbose)
printf("ACPI: Failed checksum for table %s\n", sig);
+#if (ACPI_CHECKSUM_ABORT)
table_unmap(table, length);
return (NULL);
+#endif
}
return (table);
}
Modified: user/imp/tbemd/sys/amd64/amd64/apic_vector.S
==============================================================================
--- user/imp/tbemd/sys/amd64/amd64/apic_vector.S Mon Apr 12 23:11:20 2010 (r206521)
+++ user/imp/tbemd/sys/amd64/amd64/apic_vector.S Mon Apr 12 23:12:38 2010 (r206522)
@@ -104,6 +104,18 @@ IDTVEC(timerint)
MEXITCOUNT
jmp doreti
+/*
+ * Local APIC error interrupt handler.
+ */
+ .text
+ SUPERALIGN_TEXT
+IDTVEC(errorint)
+ PUSH_FRAME
+ FAKE_MCOUNT(TF_RIP(%rsp))
+ call lapic_handle_error
+ MEXITCOUNT
+ jmp doreti
+
#ifdef SMP
/*
* Global address space TLB shootdown.
Modified: user/imp/tbemd/sys/amd64/amd64/db_trace.c
==============================================================================
--- user/imp/tbemd/sys/amd64/amd64/db_trace.c Mon Apr 12 23:11:20 2010 (r206521)
+++ user/imp/tbemd/sys/amd64/amd64/db_trace.c Mon Apr 12 23:12:38 2010 (r206522)
@@ -319,7 +319,7 @@ db_nextframe(struct amd64_frame **fp, db
frame_type = INTERRUPT;
else if (strcmp(name, "Xfast_syscall") == 0)
frame_type = SYSCALL;
-#ifdef COMPAT_IA32
+#ifdef COMPAT_FREEBSD32
else if (strcmp(name, "Xint0x80_syscall") == 0)
frame_type = SYSCALL;
#endif
Modified: user/imp/tbemd/sys/amd64/amd64/exception.S
==============================================================================
--- user/imp/tbemd/sys/amd64/amd64/exception.S Mon Apr 12 23:11:20 2010 (r206521)
+++ user/imp/tbemd/sys/amd64/amd64/exception.S Mon Apr 12 23:12:38 2010 (r206522)
@@ -572,7 +572,7 @@ ENTRY(fork_trampoline)
* included.
*/
-#ifdef COMPAT_IA32
+#ifdef COMPAT_FREEBSD32
.data
.p2align 4
.text
@@ -668,7 +668,8 @@ ld_fs: movw %ax,%fs
movl $MSR_FSBASE,%ecx
movl PCB_FSBASE(%r8),%eax
movl PCB_FSBASE+4(%r8),%edx
- wrmsr
+ .globl ld_fsbase
+ld_fsbase: wrmsr
1:
/* Restore %gs and gsbase */
movw TF_GS(%rsp),%si
@@ -685,7 +686,8 @@ ld_gs: movw %si,%gs
movl $MSR_KGSBASE,%ecx
movl PCB_GSBASE(%r8),%eax
movl PCB_GSBASE+4(%r8),%edx
- wrmsr
+ .globl ld_gsbase
+ld_gsbase: wrmsr
1: .globl ld_es
ld_es: movw TF_ES(%rsp),%es
.globl ld_ds
@@ -798,6 +800,30 @@ gs_load_fault:
call trap
movw $KUG32SEL,TF_GS(%rsp)
jmp doreti
+
+ ALIGN_TEXT
+ .globl fsbase_load_fault
+fsbase_load_fault:
+ movl $T_PROTFLT,TF_TRAPNO(%rsp)
+ movq %rsp, %rdi
+ call trap
+ movq PCPU(CURTHREAD),%r8
+ movq TD_PCB(%r8),%r8
+ movq $0,PCB_FSBASE(%r8)
+ jmp doreti
+
+ ALIGN_TEXT
+ .globl gsbase_load_fault
+gsbase_load_fault:
+ popfq
+ movl $T_PROTFLT,TF_TRAPNO(%rsp)
+ movq %rsp, %rdi
+ call trap
+ movq PCPU(CURTHREAD),%r8
+ movq TD_PCB(%r8),%r8
+ movq $0,PCB_GSBASE(%r8)
+ jmp doreti
+
#ifdef HWPMC_HOOKS
ENTRY(end_exceptions)
#endif
Modified: user/imp/tbemd/sys/amd64/amd64/identcpu.c
==============================================================================
--- user/imp/tbemd/sys/amd64/amd64/identcpu.c Mon Apr 12 23:11:20 2010 (r206521)
+++ user/imp/tbemd/sys/amd64/amd64/identcpu.c Mon Apr 12 23:12:38 2010 (r206522)
@@ -187,7 +187,9 @@ printcpuinfo(void)
if (cpu_vendor_id == CPU_VENDOR_INTEL ||
cpu_vendor_id == CPU_VENDOR_AMD ||
cpu_vendor_id == CPU_VENDOR_CENTAUR) {
- printf(" Stepping = %u", cpu_id & 0xf);
+ printf(" Family = %x", CPUID_TO_FAMILY(cpu_id));
+ printf(" Model = %x", CPUID_TO_MODEL(cpu_id));
+ printf(" Stepping = %u", cpu_id & CPUID_STEPPING);
if (cpu_high > 0) {
/*
Modified: user/imp/tbemd/sys/amd64/amd64/local_apic.c
==============================================================================
--- user/imp/tbemd/sys/amd64/amd64/local_apic.c Mon Apr 12 23:11:20 2010 (r206521)
+++ user/imp/tbemd/sys/amd64/amd64/local_apic.c Mon Apr 12 23:12:38 2010 (r206522)
@@ -115,14 +115,12 @@ struct lapic {
int la_ioint_irqs[APIC_NUM_IOINTS + 1];
} static lapics[MAX_APIC_ID + 1];
-/* XXX: should thermal be an NMI? */
-
/* Global defaults for local APIC LVT entries. */
static struct lvt lvts[LVT_MAX + 1] = {
{ 1, 1, 1, 1, APIC_LVT_DM_EXTINT, 0 }, /* LINT0: masked ExtINT */
{ 1, 1, 0, 1, APIC_LVT_DM_NMI, 0 }, /* LINT1: NMI */
{ 1, 1, 1, 1, APIC_LVT_DM_FIXED, APIC_TIMER_INT }, /* Timer */
- { 1, 1, 1, 1, APIC_LVT_DM_FIXED, APIC_ERROR_INT }, /* Error */
+ { 1, 1, 0, 1, APIC_LVT_DM_FIXED, APIC_ERROR_INT }, /* Error */
{ 1, 1, 1, 1, APIC_LVT_DM_NMI, 0 }, /* PMC */
{ 1, 1, 1, 1, APIC_LVT_DM_FIXED, APIC_THERMAL_INT }, /* Thermal */
};
@@ -225,7 +223,10 @@ lapic_init(vm_paddr_t addr)
/* Local APIC timer interrupt. */
setidt(APIC_TIMER_INT, IDTVEC(timerint), SDT_SYSIGT, SEL_KPL, 0);
- /* XXX: error/thermal interrupts */
+ /* Local APIC error interrupt. */
+ setidt(APIC_ERROR_INT, IDTVEC(errorint), SDT_SYSIGT, SEL_KPL, 0);
+
+ /* XXX: Thermal interrupt */
}
/*
@@ -278,7 +279,7 @@ lapic_dump(const char* str)
lapic->id, lapic->version, lapic->ldr, lapic->dfr);
printf(" lint0: 0x%08x lint1: 0x%08x TPR: 0x%08x SVR: 0x%08x\n",
lapic->lvt_lint0, lapic->lvt_lint1, lapic->tpr, lapic->svr);
- printf(" timer: 0x%08x therm: 0x%08x err: 0x%08x pcm: 0x%08x\n",
+ printf(" timer: 0x%08x therm: 0x%08x err: 0x%08x pmc: 0x%08x\n",
lapic->lvt_timer, lapic->lvt_thermal, lapic->lvt_error,
lapic->lvt_pcint);
}
@@ -326,7 +327,11 @@ lapic_setup(int boot)
lapic_timer_enable_intr();
}
- /* XXX: Error and thermal LVTs */
+ /* Program error LVT and clear any existing errors. */
+ lapic->lvt_error = lvt_mode(la, LVT_ERROR, lapic->lvt_error);
+ lapic->esr = 0;
+
+ /* XXX: Thermal LVT */
intr_restore(eflags);
}
@@ -725,18 +730,6 @@ lapic_eoi(void)
lapic->eoi = 0;
}
-/*
- * Read the contents of the error status register. We have to write
- * to the register first before reading from it.
- */
-u_int
-lapic_error(void)
-{
-
- lapic->esr = 0;
- return (lapic->esr);
-}
-
void
lapic_handle_intr(int vector, struct trapframe *frame)
{
@@ -863,6 +856,24 @@ lapic_timer_enable_intr(void)
lapic->lvt_timer = value;
}
+void
+lapic_handle_error(void)
+{
+ u_int32_t esr;
+
+ /*
+ * Read the contents of the error status register. Write to
+ * the register first before reading from it to force the APIC
+ * to update its value to indicate any errors that have
+ * occurred since the previous write to the register.
+ */
+ lapic->esr = 0;
+ esr = lapic->esr;
+
+ printf("CPU%d: local APIC error 0x%x\n", PCPU_GET(cpuid), esr);
+ lapic_eoi();
+}
+
u_int
apic_cpuid(u_int apic_id)
{
Modified: user/imp/tbemd/sys/amd64/amd64/machdep.c
==============================================================================
--- user/imp/tbemd/sys/amd64/amd64/machdep.c Mon Apr 12 23:11:20 2010 (r206521)
+++ user/imp/tbemd/sys/amd64/amd64/machdep.c Mon Apr 12 23:12:38 2010 (r206522)
@@ -841,11 +841,7 @@ SYSCTL_PROC(_machdep, OID_AUTO, idle, CT
* Reset registers to default values on exec.
*/
void
-exec_setregs(td, entry, stack, ps_strings)
- struct thread *td;
- u_long entry;
- u_long stack;
- u_long ps_strings;
+exec_setregs(struct thread *td, struct image_params *imgp, u_long stack)
{
struct trapframe *regs = td->td_frame;
struct pcb *pcb = td->td_pcb;
@@ -863,7 +859,7 @@ exec_setregs(td, entry, stack, ps_string
pcb->pcb_full_iret = 1;
bzero((char *)regs, sizeof(struct trapframe));
- regs->tf_rip = entry;
+ regs->tf_rip = imgp->entry_addr;
regs->tf_rsp = ((stack - 8) & ~0xFul) + 8;
regs->tf_rdi = stack; /* argv */
regs->tf_rflags = PSL_USER | (regs->tf_rflags & PSL_T);
Modified: user/imp/tbemd/sys/amd64/amd64/mca.c
==============================================================================
--- user/imp/tbemd/sys/amd64/amd64/mca.c Mon Apr 12 23:11:20 2010 (r206521)
+++ user/imp/tbemd/sys/amd64/amd64/mca.c Mon Apr 12 23:12:38 2010 (r206522)
@@ -60,11 +60,20 @@ static int mca_count; /* Number of reco
SYSCTL_NODE(_hw, OID_AUTO, mca, CTLFLAG_RD, NULL, "Machine Check Architecture");
-static int mca_enabled = 0;
+static int mca_enabled = 1;
TUNABLE_INT("hw.mca.enabled", &mca_enabled);
SYSCTL_INT(_hw_mca, OID_AUTO, enabled, CTLFLAG_RDTUN, &mca_enabled, 0,
"Administrative toggle for machine check support");
+static int amd10h_L1TP = 1;
+TUNABLE_INT("hw.mca.amd10h_L1TP", &amd10h_L1TP);
+SYSCTL_INT(_hw_mca, OID_AUTO, amd10h_L1TP, CTLFLAG_RDTUN, &amd10h_L1TP, 0,
+ "Administrative toggle for logging of level one TLB parity (L1TP) errors");
+
+int workaround_erratum383;
+SYSCTL_INT(_hw_mca, OID_AUTO, erratum383, CTLFLAG_RD, &workaround_erratum383, 0,
+ "Is the workaround for Erratum 383 on AMD Family 10h processors enabled?");
+
static STAILQ_HEAD(, mca_internal) mca_records;
static struct callout mca_timer;
static int mca_ticks = 3600; /* Check hourly by default. */
@@ -177,19 +186,46 @@ mca_error_request(uint16_t mca_error)
return ("???");
}
+static const char *
+mca_error_mmtype(uint16_t mca_error)
+{
+
+ switch ((mca_error & 0x70) >> 4) {
+ case 0x0:
+ return ("GEN");
+ case 0x1:
+ return ("RD");
+ case 0x2:
+ return ("WR");
+ case 0x3:
+ return ("AC");
+ case 0x4:
+ return ("MS");
+ }
+ return ("???");
+}
+
/* Dump details about a single machine check. */
static void __nonnull(1)
mca_log(const struct mca_record *rec)
{
uint16_t mca_error;
- printf("MCA: bank %d, status 0x%016llx\n", rec->mr_bank,
+ printf("MCA: Bank %d, Status 0x%016llx\n", rec->mr_bank,
(long long)rec->mr_status);
- printf("MCA: CPU %d ", rec->mr_apic_id);
+ printf("MCA: Global Cap 0x%016llx, Status 0x%016llx\n",
+ (long long)rec->mr_mcg_cap, (long long)rec->mr_mcg_status);
+ printf("MCA: Vendor \"%s\", ID 0x%x, APIC ID %d\n", cpu_vendor,
+ rec->mr_cpu_id, rec->mr_apic_id);
+ printf("MCA: CPU %d ", rec->mr_cpu);
if (rec->mr_status & MC_STATUS_UC)
printf("UNCOR ");
- else
+ else {
printf("COR ");
+ if (rec->mr_mcg_cap & MCG_CAP_TES_P)
+ printf("(%lld) ", ((long long)rec->mr_status &
+ MC_STATUS_COR_COUNT) >> 38);
+ }
if (rec->mr_status & MC_STATUS_PCC)
printf("PCC ");
if (rec->mr_status & MC_STATUS_OVER)
@@ -212,6 +248,9 @@ mca_log(const struct mca_record *rec)
case 0x0004:
printf("FRC error");
break;
+ case 0x0005:
+ printf("internal parity error");
+ break;
case 0x0400:
printf("internal timer error");
break;
@@ -236,6 +275,17 @@ mca_log(const struct mca_record *rec)
break;
}
+ /* Memory controller error. */
+ if ((mca_error & 0xef80) == 0x0080) {
+ printf("%s channel ", mca_error_mmtype(mca_error));
+ if ((mca_error & 0x000f) != 0x000f)
+ printf("%d", mca_error & 0x000f);
+ else
+ printf("??");
+ printf(" memory error");
+ break;
+ }
+
/* Cache error. */
if ((mca_error & 0xef00) == 0x0100) {
printf("%sCACHE %s %s error",
@@ -313,6 +363,11 @@ mca_check_status(int bank, struct mca_re
rec->mr_misc = rdmsr(MSR_MC_MISC(bank));
rec->mr_tsc = rdtsc();
rec->mr_apic_id = PCPU_GET(apic_id);
+ rec->mr_mcg_cap = rdmsr(MSR_MCG_CAP);
+ rec->mr_mcg_status = rdmsr(MSR_MCG_STATUS);
+ rec->mr_cpu_id = cpu_id;
+ rec->mr_cpu_vendor_id = cpu_vendor_id;
+ rec->mr_cpu = PCPU_GET(cpuid);
/*
* Clear machine check. Don't do this for uncorrectable
@@ -481,7 +536,7 @@ void
mca_init(void)
{
uint64_t mcg_cap;
- uint64_t ctl;
+ uint64_t ctl, mask;
int skip;
int i;
@@ -489,6 +544,15 @@ mca_init(void)
if (!mca_enabled || !(cpu_feature & CPUID_MCE))
return;
+ /*
+ * On AMD Family 10h processors, unless logging of level one TLB
+ * parity (L1TP) errors is disabled, enable the recommended workaround
+ * for Erratum 383.
+ */
+ if (cpu_vendor_id == CPU_VENDOR_AMD &&
+ CPUID_TO_FAMILY(cpu_id) == 0x10 && amd10h_L1TP)
+ workaround_erratum383 = 1;
+
if (cpu_feature & CPUID_MCA) {
if (PCPU_GET(cpuid) == 0)
mca_setup();
@@ -499,6 +563,19 @@ mca_init(void)
/* Enable MCA features. */
wrmsr(MSR_MCG_CTL, MCG_CTL_ENABLE);
+ /*
+ * Disable logging of level one TLB parity (L1TP) errors by
+ * the data cache as an alternative workaround for AMD Family
+ * 10h Erratum 383. Unlike the recommended workaround, there
+ * is no performance penalty to this workaround. However,
+ * L1TP errors will go unreported.
+ */
+ if (cpu_vendor_id == CPU_VENDOR_AMD &&
+ CPUID_TO_FAMILY(cpu_id) == 0x10 && !amd10h_L1TP) {
+ mask = rdmsr(MSR_MC0_CTL_MASK);
+ if ((mask & (1UL << 5)) == 0)
+ wrmsr(MSR_MC0_CTL_MASK, mask | (1UL << 5));
+ }
for (i = 0; i < (mcg_cap & MCG_CAP_COUNT); i++) {
/* By default enable logging of all errors. */
ctl = 0xffffffffffffffffUL;
Modified: user/imp/tbemd/sys/amd64/amd64/pmap.c
==============================================================================
--- user/imp/tbemd/sys/amd64/amd64/pmap.c Mon Apr 12 23:11:20 2010 (r206521)
+++ user/imp/tbemd/sys/amd64/amd64/pmap.c Mon Apr 12 23:12:38 2010 (r206522)
@@ -7,7 +7,7 @@
* All rights reserved.
* Copyright (c) 2003 Peter Wemm
* All rights reserved.
- * Copyright (c) 2005-2008 Alan L. Cox <alc at cs.rice.edu>
+ * Copyright (c) 2005-2010 Alan L. Cox <alc at cs.rice.edu>
* All rights reserved.
*
* This code is derived from software contributed to Berkeley by
@@ -152,7 +152,7 @@ __FBSDID("$FreeBSD$");
#if !defined(DIAGNOSTIC)
#ifdef __GNUC_GNU_INLINE__
-#define PMAP_INLINE inline
+#define PMAP_INLINE __attribute__((__gnu_inline__)) inline
#else
#define PMAP_INLINE extern inline
#endif
@@ -255,6 +255,9 @@ static void pmap_remove_entry(struct pma
static void pmap_insert_entry(pmap_t pmap, vm_offset_t va, vm_page_t m);
static boolean_t pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va,
vm_page_t m);
+static void pmap_update_pde(pmap_t pmap, vm_offset_t va, pd_entry_t *pde,
+ pd_entry_t newpde);
+static void pmap_update_pde_invalidate(vm_offset_t va, pd_entry_t newpde);
static vm_page_t pmap_allocpde(pmap_t pmap, vm_offset_t va, int flags);
static vm_page_t pmap_allocpte(pmap_t pmap, vm_offset_t va, int flags);
@@ -573,8 +576,6 @@ pmap_bootstrap(vm_paddr_t *firstaddr)
virtual_avail = va;
- invltlb();
-
/* Initialize the PAT MSR. */
pmap_init_pat();
}
@@ -686,13 +687,13 @@ pmap_init(void)
pv_entry_high_water = 9 * (pv_entry_max / 10);
/*
- * Disable large page mappings by default if the kernel is running in
- * a virtual machine on an AMD Family 10h processor. This is a work-
- * around for Erratum 383.
+ * If the kernel is running in a virtual machine on an AMD Family 10h
+ * processor, then it must assume that MCA is enabled by the virtual
+ * machine monitor.
*/
if (vm_guest == VM_GUEST_VM && cpu_vendor_id == CPU_VENDOR_AMD &&
CPUID_TO_FAMILY(cpu_id) == 0x10)
- pg_ps_enabled = 0;
+ workaround_erratum383 = 1;
/*
* Are large page mappings enabled?
@@ -848,6 +849,45 @@ pmap_cache_bits(int mode, boolean_t is_p
cache_bits |= PG_NC_PWT;
return (cache_bits);
}
+
+/*
+ * After changing the page size for the specified virtual address in the page
+ * table, flush the corresponding entries from the processor's TLB. Only the
+ * calling processor's TLB is affected.
+ *
+ * The calling thread must be pinned to a processor.
+ */
+static void
+pmap_update_pde_invalidate(vm_offset_t va, pd_entry_t newpde)
+{
+ u_long cr4;
+
+ if ((newpde & PG_PS) == 0)
+ /* Demotion: flush a specific 2MB page mapping. */
+ invlpg(va);
+ else if ((newpde & PG_G) == 0)
+ /*
+ * Promotion: flush every 4KB page mapping from the TLB
+ * because there are too many to flush individually.
+ */
+ invltlb();
+ else {
+ /*
+ * Promotion: flush every 4KB page mapping from the TLB,
+ * including any global (PG_G) mappings.
+ */
+ cr4 = rcr4();
+ load_cr4(cr4 & ~CR4_PGE);
+ /*
+ * Although preemption at this point could be detrimental to
+ * performance, it would not lead to an error. PG_G is simply
+ * ignored if CR4.PGE is clear. Moreover, in case this block
+ * is re-entered, the load_cr4() either above or below will
+ * modify CR4.PGE flushing the TLB.
+ */
+ load_cr4(cr4 | CR4_PGE);
+ }
+}
#ifdef SMP
/*
* For SMP, these functions have to use the IPI mechanism for coherence.
@@ -944,6 +984,69 @@ pmap_invalidate_cache(void)
smp_cache_flush();
sched_unpin();
}
+
+struct pde_action {
+ cpumask_t store; /* processor that updates the PDE */
+ cpumask_t invalidate; /* processors that invalidate their TLB */
+ vm_offset_t va;
+ pd_entry_t *pde;
+ pd_entry_t newpde;
+};
+
+static void
+pmap_update_pde_action(void *arg)
+{
+ struct pde_action *act = arg;
+
+ if (act->store == PCPU_GET(cpumask))
+ pde_store(act->pde, act->newpde);
+}
+
+static void
+pmap_update_pde_teardown(void *arg)
+{
+ struct pde_action *act = arg;
+
+ if ((act->invalidate & PCPU_GET(cpumask)) != 0)
+ pmap_update_pde_invalidate(act->va, act->newpde);
+}
+
+/*
+ * Change the page size for the specified virtual address in a way that
+ * prevents any possibility of the TLB ever having two entries that map the
+ * same virtual address using different page sizes. This is the recommended
+ * workaround for Erratum 383 on AMD Family 10h processors. It prevents a
+ * machine check exception for a TLB state that is improperly diagnosed as a
+ * hardware error.
+ */
+static void
+pmap_update_pde(pmap_t pmap, vm_offset_t va, pd_entry_t *pde, pd_entry_t newpde)
+{
+ struct pde_action act;
+ cpumask_t active, cpumask;
+
+ sched_pin();
+ cpumask = PCPU_GET(cpumask);
+ if (pmap == kernel_pmap)
+ active = all_cpus;
+ else
+ active = pmap->pm_active;
+ if ((active & PCPU_GET(other_cpus)) != 0) {
+ act.store = cpumask;
+ act.invalidate = active;
+ act.va = va;
+ act.pde = pde;
+ act.newpde = newpde;
+ smp_rendezvous_cpus(cpumask | active,
+ smp_no_rendevous_barrier, pmap_update_pde_action,
+ pmap_update_pde_teardown, &act);
+ } else {
+ pde_store(pde, newpde);
+ if ((active & cpumask) != 0)
+ pmap_update_pde_invalidate(va, newpde);
+ }
+ sched_unpin();
+}
#else /* !SMP */
/*
* Normal, non-SMP, invalidation functions.
@@ -981,6 +1084,15 @@ pmap_invalidate_cache(void)
wbinvd();
}
+
+static void
+pmap_update_pde(pmap_t pmap, vm_offset_t va, pd_entry_t *pde, pd_entry_t newpde)
+{
+
+ pde_store(pde, newpde);
+ if (pmap == kernel_pmap || pmap->pm_active)
+ pmap_update_pde_invalidate(va, newpde);
+}
#endif /* !SMP */
static void
@@ -994,7 +1106,8 @@ pmap_invalidate_cache_range(vm_offset_t
if (cpu_feature & CPUID_SS)
; /* If "Self Snoop" is supported, do nothing. */
- else if (cpu_feature & CPUID_CLFSH) {
+ else if ((cpu_feature & CPUID_CLFSH) != 0 &&
+ eva - sva < 2 * 1024 * 1024) {
/*
* Otherwise, do per-cache line flush. Use the mfence
@@ -1011,7 +1124,8 @@ pmap_invalidate_cache_range(vm_offset_t
/*
* No targeted cache flush methods are supported by CPU,
- * globally invalidate cache as a last resort.
+ * or the supplied range is bigger than 2MB.
+ * Globally invalidate cache.
*/
pmap_invalidate_cache();
}
@@ -2361,7 +2475,10 @@ pmap_demote_pde(pmap_t pmap, pd_entry_t
* processor changing the setting of PG_A and/or PG_M between
* the read above and the store below.
*/
- pde_store(pde, newpde);
+ if (workaround_erratum383)
+ pmap_update_pde(pmap, va, pde, newpde);
+ else
+ pde_store(pde, newpde);
/*
* Invalidate a stale recursive mapping of the page table page.
@@ -2977,7 +3094,10 @@ setpte:
/*
* Map the superpage.
*/
- pde_store(pde, PG_PS | newpde);
+ if (workaround_erratum383)
+ pmap_update_pde(pmap, va, pde, PG_PS | newpde);
+ else
+ pde_store(pde, PG_PS | newpde);
pmap_pde_promotions++;
CTR2(KTR_PMAP, "pmap_promote_pde: success for va %#lx"
Modified: user/imp/tbemd/sys/amd64/amd64/trap.c
==============================================================================
--- user/imp/tbemd/sys/amd64/amd64/trap.c Mon Apr 12 23:11:20 2010 (r206521)
+++ user/imp/tbemd/sys/amd64/amd64/trap.c Mon Apr 12 23:12:38 2010 (r206522)
@@ -566,6 +566,14 @@ trap(struct trapframe *frame)
frame->tf_gs = _ugssel;
goto out;
}
+ if (frame->tf_rip == (long)ld_gsbase) {
+ frame->tf_rip = (long)gsbase_load_fault;
+ goto out;
+ }
+ if (frame->tf_rip == (long)ld_fsbase) {
+ frame->tf_rip = (long)fsbase_load_fault;
+ goto out;
+ }
if (PCPU_GET(curpcb)->pcb_onfault != NULL) {
frame->tf_rip =
(long)PCPU_GET(curpcb)->pcb_onfault;
Modified: user/imp/tbemd/sys/amd64/amd64/vm_machdep.c
==============================================================================
--- user/imp/tbemd/sys/amd64/amd64/vm_machdep.c Mon Apr 12 23:11:20 2010 (r206521)
+++ user/imp/tbemd/sys/amd64/amd64/vm_machdep.c Mon Apr 12 23:12:38 2010 (r206522)
@@ -439,7 +439,7 @@ cpu_set_upcall_kse(struct thread *td, vo
*/
cpu_thread_clean(td);
-#ifdef COMPAT_IA32
+#ifdef COMPAT_FREEBSD32
if (td->td_proc->p_sysent->sv_flags & SV_ILP32) {
/*
* Set the trap frame to point at the beginning of the uts
@@ -490,7 +490,7 @@ cpu_set_user_tls(struct thread *td, void
if ((u_int64_t)tls_base >= VM_MAXUSER_ADDRESS)
return (EINVAL);
-#ifdef COMPAT_IA32
+#ifdef COMPAT_FREEBSD32
if (td->td_proc->p_sysent->sv_flags & SV_ILP32) {
td->td_pcb->pcb_gsbase = (register_t)tls_base;
return (0);
Modified: user/imp/tbemd/sys/amd64/conf/GENERIC
==============================================================================
--- user/imp/tbemd/sys/amd64/conf/GENERIC Mon Apr 12 23:11:20 2010 (r206521)
+++ user/imp/tbemd/sys/amd64/conf/GENERIC Mon Apr 12 23:12:38 2010 (r206522)
@@ -44,8 +44,7 @@ options PROCFS # Process filesystem (
options PSEUDOFS # Pseudo-filesystem framework
options GEOM_PART_GPT # GUID Partition Tables.
options GEOM_LABEL # Provides labelization
-options COMPAT_43TTY # BSD 4.3 TTY compat (sgtty)
-options COMPAT_IA32 # Compatible with i386 binaries
+options COMPAT_FREEBSD32 # Compatible with i386 binaries
options COMPAT_FREEBSD4 # Compatible with FreeBSD4
options COMPAT_FREEBSD5 # Compatible with FreeBSD5
options COMPAT_FREEBSD6 # Compatible with FreeBSD6
Modified: user/imp/tbemd/sys/amd64/conf/NOTES
==============================================================================
--- user/imp/tbemd/sys/amd64/conf/NOTES Mon Apr 12 23:11:20 2010 (r206521)
+++ user/imp/tbemd/sys/amd64/conf/NOTES Mon Apr 12 23:12:38 2010 (r206522)
@@ -483,7 +483,7 @@ options PMAP_SHPGPERPROC=201
#XXX these 32 bit binaries is added.
# Enable 32-bit runtime support for FreeBSD/i386 binaries.
-options COMPAT_IA32
+options COMPAT_FREEBSD32
# Enable iBCS2 runtime support for SCO and ISC binaries
#XXX#options IBCS2
@@ -494,7 +494,7 @@ options COMPAT_IA32
# Enable Linux ABI emulation
#XXX#options COMPAT_LINUX
-# Enable 32-bit Linux ABI emulation (requires COMPAT_43 and COMPAT_IA32)
+# Enable 32-bit Linux ABI emulation (requires COMPAT_43 and COMPAT_FREEBSD32)
options COMPAT_LINUX32
# Enable the linux-like proc filesystem support (requires COMPAT_LINUX32
Modified: user/imp/tbemd/sys/amd64/conf/XENHVM
==============================================================================
--- user/imp/tbemd/sys/amd64/conf/XENHVM Mon Apr 12 23:11:20 2010 (r206521)
+++ user/imp/tbemd/sys/amd64/conf/XENHVM Mon Apr 12 23:12:38 2010 (r206522)
@@ -45,8 +45,7 @@ options PROCFS # Process filesystem (
options PSEUDOFS # Pseudo-filesystem framework
options GEOM_PART_GPT # GUID Partition Tables.
options GEOM_LABEL # Provides labelization
-options COMPAT_43TTY # BSD 4.3 TTY compat (sgtty)
-options COMPAT_IA32 # Compatible with i386 binaries
+options COMPAT_FREEBSD32 # Compatible with i386 binaries
options COMPAT_FREEBSD4 # Compatible with FreeBSD4
options COMPAT_FREEBSD5 # Compatible with FreeBSD5
options COMPAT_FREEBSD6 # Compatible with FreeBSD6
Modified: user/imp/tbemd/sys/amd64/ia32/ia32_signal.c
==============================================================================
--- user/imp/tbemd/sys/amd64/ia32/ia32_signal.c Mon Apr 12 23:11:20 2010 (r206521)
+++ user/imp/tbemd/sys/amd64/ia32/ia32_signal.c Mon Apr 12 23:12:38 2010 (r206522)
@@ -701,11 +701,7 @@ freebsd32_sigreturn(td, uap)
* Clear registers on exec
*/
void
-ia32_setregs(td, entry, stack, ps_strings)
- struct thread *td;
- u_long entry;
- u_long stack;
- u_long ps_strings;
+ia32_setregs(struct thread *td, struct image_params *imgp, u_long stack)
{
struct trapframe *regs = td->td_frame;
struct pcb *pcb = td->td_pcb;
@@ -721,12 +717,12 @@ ia32_setregs(td, entry, stack, ps_string
pcb->pcb_initial_fpucw = __INITIAL_FPUCW_I386__;
bzero((char *)regs, sizeof(struct trapframe));
- regs->tf_rip = entry;
+ regs->tf_rip = imgp->entry_addr;
regs->tf_rsp = stack;
regs->tf_rflags = PSL_USER | (regs->tf_rflags & PSL_T);
regs->tf_ss = _udatasel;
regs->tf_cs = _ucode32sel;
- regs->tf_rbx = ps_strings;
+ regs->tf_rbx = imgp->ps_strings;
regs->tf_ds = _udatasel;
regs->tf_es = _udatasel;
regs->tf_fs = _ufssel;
Modified: user/imp/tbemd/sys/amd64/include/apicvar.h
==============================================================================
--- user/imp/tbemd/sys/amd64/include/apicvar.h Mon Apr 12 23:11:20 2010 (r206521)
+++ user/imp/tbemd/sys/amd64/include/apicvar.h Mon Apr 12 23:12:38 2010 (r206522)
@@ -179,7 +179,8 @@ struct apic_enumerator {
inthand_t
IDTVEC(apic_isr1), IDTVEC(apic_isr2), IDTVEC(apic_isr3),
IDTVEC(apic_isr4), IDTVEC(apic_isr5), IDTVEC(apic_isr6),
- IDTVEC(apic_isr7), IDTVEC(spuriousint), IDTVEC(timerint);
+ IDTVEC(apic_isr7), IDTVEC(errorint), IDTVEC(spuriousint),
+ IDTVEC(timerint);
extern vm_paddr_t lapic_paddr;
extern int apic_cpuids[];
@@ -211,13 +212,13 @@ void lapic_disable_pmc(void);
void lapic_dump(const char *str);
int lapic_enable_pmc(void);
void lapic_eoi(void);
-u_int lapic_error(void);
int lapic_id(void);
void lapic_init(vm_paddr_t addr);
int lapic_intr_pending(u_int vector);
void lapic_ipi_raw(register_t icrlo, u_int dest);
void lapic_ipi_vectored(u_int vector, int dest);
int lapic_ipi_wait(int delay);
+void lapic_handle_error(void);
void lapic_handle_intr(int vector, struct trapframe *frame);
void lapic_handle_timer(struct trapframe *frame);
void lapic_reenable_pmc(void);
Modified: user/imp/tbemd/sys/amd64/include/elf.h
==============================================================================
--- user/imp/tbemd/sys/amd64/include/elf.h Mon Apr 12 23:11:20 2010 (r206521)
+++ user/imp/tbemd/sys/amd64/include/elf.h Mon Apr 12 23:12:38 2010 (r206522)
@@ -42,6 +42,7 @@
#include <sys/elf_generic.h>
#define ELF_ARCH EM_X86_64
+#define ELF_ARCH32 EM_386
#define ELF_MACHINE_OK(x) ((x) == EM_X86_64)
Modified: user/imp/tbemd/sys/amd64/include/mca.h
==============================================================================
--- user/imp/tbemd/sys/amd64/include/mca.h Mon Apr 12 23:11:20 2010 (r206521)
+++ user/imp/tbemd/sys/amd64/include/mca.h Mon Apr 12 23:12:38 2010 (r206522)
@@ -37,6 +37,11 @@ struct mca_record {
uint64_t mr_tsc;
int mr_apic_id;
int mr_bank;
+ uint64_t mr_mcg_cap;
+ uint64_t mr_mcg_status;
+ int mr_cpu_id;
+ int mr_cpu_vendor_id;
+ int mr_cpu;
};
#ifdef _KERNEL
Modified: user/imp/tbemd/sys/amd64/include/md_var.h
==============================================================================
--- user/imp/tbemd/sys/amd64/include/md_var.h Mon Apr 12 23:11:20 2010 (r206521)
+++ user/imp/tbemd/sys/amd64/include/md_var.h Mon Apr 12 23:12:38 2010 (r206522)
@@ -61,6 +61,7 @@ extern char sigcode[];
extern int szsigcode;
extern uint64_t *vm_page_dump;
extern int vm_page_dump_size;
+extern int workaround_erratum383;
extern int _udatasel;
extern int _ucodesel;
extern int _ucode32sel;
@@ -82,10 +83,14 @@ void ld_ds(void) __asm(__STRING(ld_ds));
void ld_es(void) __asm(__STRING(ld_es));
void ld_fs(void) __asm(__STRING(ld_fs));
void ld_gs(void) __asm(__STRING(ld_gs));
+void ld_fsbase(void) __asm(__STRING(ld_fsbase));
+void ld_gsbase(void) __asm(__STRING(ld_gsbase));
void ds_load_fault(void) __asm(__STRING(ds_load_fault));
void es_load_fault(void) __asm(__STRING(es_load_fault));
void fs_load_fault(void) __asm(__STRING(fs_load_fault));
void gs_load_fault(void) __asm(__STRING(gs_load_fault));
+void fsbase_load_fault(void) __asm(__STRING(fsbase_load_fault));
+void gsbase_load_fault(void) __asm(__STRING(gsbase_load_fault));
void dump_add_page(vm_paddr_t);
void dump_drop_page(vm_paddr_t);
void initializecpu(void);
Modified: user/imp/tbemd/sys/amd64/include/pmc_mdep.h
==============================================================================
--- user/imp/tbemd/sys/amd64/include/pmc_mdep.h Mon Apr 12 23:11:20 2010 (r206521)
+++ user/imp/tbemd/sys/amd64/include/pmc_mdep.h Mon Apr 12 23:12:38 2010 (r206522)
@@ -43,17 +43,20 @@ struct pmc_mdep;
#include <dev/hwpmc/hwpmc_core.h>
#include <dev/hwpmc/hwpmc_piv.h>
#include <dev/hwpmc/hwpmc_tsc.h>
+#include <dev/hwpmc/hwpmc_uncore.h>
/*
* Intel processors implementing V2 and later of the Intel performance
* measurement architecture have PMCs of the following classes: TSC,
- * IAF and IAP.
+ * IAF, IAP, UCF and UCP.
*/
#define PMC_MDEP_CLASS_INDEX_TSC 0
#define PMC_MDEP_CLASS_INDEX_K8 1
#define PMC_MDEP_CLASS_INDEX_P4 1
#define PMC_MDEP_CLASS_INDEX_IAP 1
#define PMC_MDEP_CLASS_INDEX_IAF 2
+#define PMC_MDEP_CLASS_INDEX_UCP 3
+#define PMC_MDEP_CLASS_INDEX_UCF 4
/*
* On the amd64 platform we support the following PMCs.
@@ -63,12 +66,16 @@ struct pmc_mdep;
* PIV Intel P4/HTT and P4/EMT64
* IAP Intel Core/Core2/Atom CPUs in 64 bits mode.
* IAF Intel fixed-function PMCs in Core2 and later CPUs.
+ * UCP Intel Uncore programmable PMCs.
+ * UCF Intel Uncore fixed-function PMCs.
*/
union pmc_md_op_pmcallocate {
struct pmc_md_amd_op_pmcallocate pm_amd;
struct pmc_md_iaf_op_pmcallocate pm_iaf;
struct pmc_md_iap_op_pmcallocate pm_iap;
+ struct pmc_md_ucf_op_pmcallocate pm_ucf;
+ struct pmc_md_ucp_op_pmcallocate pm_ucp;
struct pmc_md_p4_op_pmcallocate pm_p4;
uint64_t __pad[4];
};
@@ -83,6 +90,8 @@ union pmc_md_pmc {
struct pmc_md_amd_pmc pm_amd;
struct pmc_md_iaf_pmc pm_iaf;
struct pmc_md_iap_pmc pm_iap;
+ struct pmc_md_ucf_pmc pm_ucf;
+ struct pmc_md_ucp_pmc pm_ucp;
struct pmc_md_p4_pmc pm_p4;
};
Modified: user/imp/tbemd/sys/amd64/include/reg.h
==============================================================================
--- user/imp/tbemd/sys/amd64/include/reg.h Mon Apr 12 23:11:20 2010 (r206521)
+++ user/imp/tbemd/sys/amd64/include/reg.h Mon Apr 12 23:12:38 2010 (r206522)
@@ -37,6 +37,10 @@
#ifndef _MACHINE_REG_H_
#define _MACHINE_REG_H_
+#if defined(_KERNEL) && !defined(_STANDALONE)
+#include "opt_compat.h"
+#endif
+
/*
* Register set accessible via /proc/$pid/regs and PT_{SET,GET}REGS.
*/
@@ -105,7 +109,7 @@ struct dbreg {
#define DBREG_DR7_EXEC 0x00 /* break on execute */
#define DBREG_DR7_WRONLY 0x01 /* break on write */
#define DBREG_DR7_RDWR 0x03 /* break on read or write */
-#define DBREG_DR7_MASK(i) ((u_long)0xf << ((i) * 4 + 16) | 0x3 << (i) * 2)
+#define DBREG_DR7_MASK(i) (0xful << ((i) * 4 + 16) | 0x3 << (i) * 2)
#define DBREG_DR7_SET(i, len, access, enable) \
((u_long)((len) << 2 | (access)) << ((i) * 4 + 16) | (enable) << (i) * 2)
#define DBREG_DR7_GD 0x2000
@@ -116,6 +120,11 @@ struct dbreg {
#define DBREG_DRX(d,x) ((d)->dr[(x)]) /* reference dr0 - dr15 by
register number */
+#ifdef COMPAT_FREEBSD32
+#include <machine/fpu.h>
+#include <compat/ia32/ia32_reg.h>
+#endif
+
#ifdef _KERNEL
/*
* XXX these interfaces are MI, so they should be declared in a MI place.
Modified: user/imp/tbemd/sys/amd64/include/specialreg.h
==============================================================================
--- user/imp/tbemd/sys/amd64/include/specialreg.h Mon Apr 12 23:11:20 2010 (r206521)
+++ user/imp/tbemd/sys/amd64/include/specialreg.h Mon Apr 12 23:12:38 2010 (r206522)
@@ -267,6 +267,7 @@
#define MSR_MTRR16kBase 0x258
#define MSR_MTRR4kBase 0x268
#define MSR_PAT 0x277
+#define MSR_MC0_CTL2 0x280
#define MSR_MTRRdefType 0x2ff
#define MSR_MC0_CTL 0x400
#define MSR_MC0_STATUS 0x401
@@ -320,16 +321,16 @@
#define MTRR_N64K 8 /* numbers of fixed-size entries */
#define MTRR_N16K 16
#define MTRR_N4K 64
-#define MTRR_CAP_WC 0x0000000000000400UL
-#define MTRR_CAP_FIXED 0x0000000000000100UL
-#define MTRR_CAP_VCNT 0x00000000000000ffUL
-#define MTRR_DEF_ENABLE 0x0000000000000800UL
-#define MTRR_DEF_FIXED_ENABLE 0x0000000000000400UL
-#define MTRR_DEF_TYPE 0x00000000000000ffUL
-#define MTRR_PHYSBASE_PHYSBASE 0x000ffffffffff000UL
-#define MTRR_PHYSBASE_TYPE 0x00000000000000ffUL
-#define MTRR_PHYSMASK_PHYSMASK 0x000ffffffffff000UL
-#define MTRR_PHYSMASK_VALID 0x0000000000000800UL
+#define MTRR_CAP_WC 0x0000000000000400
+#define MTRR_CAP_FIXED 0x0000000000000100
+#define MTRR_CAP_VCNT 0x00000000000000ff
+#define MTRR_DEF_ENABLE 0x0000000000000800
+#define MTRR_DEF_FIXED_ENABLE 0x0000000000000400
+#define MTRR_DEF_TYPE 0x00000000000000ff
+#define MTRR_PHYSBASE_PHYSBASE 0x000ffffffffff000
+#define MTRR_PHYSBASE_TYPE 0x00000000000000ff
+#define MTRR_PHYSMASK_PHYSMASK 0x000ffffffffff000
+#define MTRR_PHYSMASK_VALID 0x0000000000000800
/* Performance Control Register (5x86 only). */
#define PCR0 0x20
@@ -352,27 +353,38 @@
#define MCG_CAP_COUNT 0x000000ff
#define MCG_CAP_CTL_P 0x00000100
#define MCG_CAP_EXT_P 0x00000200
+#define MCG_CAP_CMCI_P 0x00000400
#define MCG_CAP_TES_P 0x00000800
#define MCG_CAP_EXT_CNT 0x00ff0000
+#define MCG_CAP_SER_P 0x01000000
#define MCG_STATUS_RIPV 0x00000001
#define MCG_STATUS_EIPV 0x00000002
#define MCG_STATUS_MCIP 0x00000004
-#define MCG_CTL_ENABLE 0xffffffffffffffffUL
-#define MCG_CTL_DISABLE 0x0000000000000000UL
+#define MCG_CTL_ENABLE 0xffffffffffffffff
+#define MCG_CTL_DISABLE 0x0000000000000000
#define MSR_MC_CTL(x) (MSR_MC0_CTL + (x) * 4)
#define MSR_MC_STATUS(x) (MSR_MC0_STATUS + (x) * 4)
#define MSR_MC_ADDR(x) (MSR_MC0_ADDR + (x) * 4)
#define MSR_MC_MISC(x) (MSR_MC0_MISC + (x) * 4)
-#define MC_STATUS_MCA_ERROR 0x000000000000ffffUL
-#define MC_STATUS_MODEL_ERROR 0x00000000ffff0000UL
-#define MC_STATUS_OTHER_INFO 0x01ffffff00000000UL
-#define MC_STATUS_PCC 0x0200000000000000UL
-#define MC_STATUS_ADDRV 0x0400000000000000UL
-#define MC_STATUS_MISCV 0x0800000000000000UL
-#define MC_STATUS_EN 0x1000000000000000UL
-#define MC_STATUS_UC 0x2000000000000000UL
-#define MC_STATUS_OVER 0x4000000000000000UL
-#define MC_STATUS_VAL 0x8000000000000000UL
+#define MSR_MC_CTL2(x) (MSR_MC0_CTL2 + (x)) /* If MCG_CAP_CMCI_P */
+#define MC_STATUS_MCA_ERROR 0x000000000000ffff
+#define MC_STATUS_MODEL_ERROR 0x00000000ffff0000
+#define MC_STATUS_OTHER_INFO 0x01ffffff00000000
+#define MC_STATUS_COR_COUNT 0x001fffc000000000 /* If MCG_CAP_TES_P */
+#define MC_STATUS_TES_STATUS 0x0060000000000000 /* If MCG_CAP_TES_P */
+#define MC_STATUS_AR 0x0080000000000000 /* If MCG_CAP_CMCI_P */
+#define MC_STATUS_S 0x0100000000000000 /* If MCG_CAP_CMCI_P */
+#define MC_STATUS_PCC 0x0200000000000000
+#define MC_STATUS_ADDRV 0x0400000000000000
+#define MC_STATUS_MISCV 0x0800000000000000
+#define MC_STATUS_EN 0x1000000000000000
+#define MC_STATUS_UC 0x2000000000000000
+#define MC_STATUS_OVER 0x4000000000000000
+#define MC_STATUS_VAL 0x8000000000000000
+#define MC_MISC_RA_LSB 0x000000000000003f /* If MCG_CAP_SER_P */
+#define MC_MISC_ADDRESS_MODE 0x00000000000001c0 /* If MCG_CAP_SER_P */
+#define MC_CTL2_THRESHOLD 0x0000000000003fff
+#define MC_CTL2_CMCI_EN 0x0000000040000000
/*
* The following four 3-byte registers control the non-cacheable regions.
@@ -494,6 +506,7 @@
#define MSR_TOP_MEM 0xc001001a /* boundary for ram below 4G */
#define MSR_TOP_MEM2 0xc001001d /* boundary for ram above 4G */
#define MSR_K8_UCODE_UPDATE 0xc0010020 /* update microcode */
+#define MSR_MC0_CTL_MASK 0xc0010044
/* VIA ACE crypto featureset: for via_feature_rng */
#define VIA_HAS_RNG 1 /* cpu has RNG */
Modified: user/imp/tbemd/sys/amd64/linux32/linux.h
==============================================================================
--- user/imp/tbemd/sys/amd64/linux32/linux.h Mon Apr 12 23:11:20 2010 (r206521)
*** DIFF OUTPUT TRUNCATED AT 1000 LINES ***
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