svn commit: r206338 - in user/jmallett/octeon: libexec/rtld-elf/mips sys/mips/include

[Juli Mallett]

Author: jmallett
Date: Wed Apr  7 04:51:19 2010
New Revision: 206338
URL: http://svn.freebsd.org/changeset/base/206338

Log:
  o) Fix unaligned macros in <machine/asm.h>.
  o) Do function calls in rtld via t9 for clarity.

Modified:
  user/jmallett/octeon/libexec/rtld-elf/mips/rtld_start.S
  user/jmallett/octeon/sys/mips/include/asm.h

Modified: user/jmallett/octeon/libexec/rtld-elf/mips/rtld_start.S
==============================================================================
--- user/jmallett/octeon/libexec/rtld-elf/mips/rtld_start.S	Wed Apr  7 02:25:36 2010	(r206337)
+++ user/jmallett/octeon/libexec/rtld-elf/mips/rtld_start.S	Wed Apr  7 04:51:19 2010	(r206338)
@@ -68,7 +68,8 @@ LEAF(rtld_start)
 	move	a0, s0			/* sp */
 	PTR_ADDU a1, sp, 2*PTR_SIZE	/* &our atexit function */
 	PTR_ADDU a2, sp, 3*PTR_SIZE	/* obj_main entry */
-	jal	_C_LABEL(_rtld)		/* v0 = _rtld(sp, cleanup, objp) */
+	PTR_LA	t9, _C_LABEL(_rtld)
+	jalr	t9			/* v0 = _rtld(sp, cleanup, objp) */
 	 nop
 
 	PTR_L	a1, 2*PTR_SIZE(sp)	/* our atexit function */
@@ -123,7 +124,7 @@ _rtld_bind_start:
 	move	s0, sp
 
 	move	a0, v1			/* old GP */
-	subu	a0, a0, 0x7ff0		/* The offset of $gp from the	*/
+	PTR_SUBU	a0, a0, 0x7ff0		/* The offset of $gp from the	*/
        					/* beginning of the .got section: */
 					/* $gp = .got + 0x7ff0, so	*/
 					/* .got = $gp - 0x7ff0		*/
@@ -136,7 +137,8 @@ _rtld_bind_start:
 	and	a0, a0, 0x7fffffff
 	move	a1, t8			/* symbol index */
 
-	jal	_C_LABEL(_mips_rtld_bind)
+	PTR_LA	t9, _C_LABEL(_mips_rtld_bind)
+	jalr	t9
 	 nop
 
 	move	sp, s0

Modified: user/jmallett/octeon/sys/mips/include/asm.h
==============================================================================
--- user/jmallett/octeon/sys/mips/include/asm.h	Wed Apr  7 02:25:36 2010	(r206337)
+++ user/jmallett/octeon/sys/mips/include/asm.h	Wed Apr  7 04:51:19 2010	(r206338)
@@ -98,45 +98,6 @@
 
 #define	_C_LABEL(x)	x
 
-/*
- *   Endian-independent assembly-code aliases for unaligned memory accesses.
- */
-#if _BYTE_ORDER == _LITTLE_ENDIAN
-# define LWHI lwr
-# define LWLO lwl
-# define SWHI swr
-# define SWLO swl
-# if SZREG == 4
-#  define REG_LHI   lwr
-#  define REG_LLO   lwl
-#  define REG_SHI   swr
-#  define REG_SLO   swl
-# else
-#  define REG_LHI   ldr
-#  define REG_LLO   ldl
-#  define REG_SHI   sdr
-#  define REG_SLO   sdl
-# endif
-#endif
-
-#if _BYTE_ORDER == _BIG_ENDIAN
-# define LWHI lwl
-# define LWLO lwr
-# define SWHI swl
-# define SWLO swr
-# if SZREG == 4
-#  define REG_LHI   lwl
-#  define REG_LLO   lwr
-#  define REG_SHI   swl
-#  define REG_SLO   swr
-# else
-#  define REG_LHI   ldl
-#  define REG_LLO   ldr
-#  define REG_SHI   sdl
-#  define REG_SLO   sdr
-# endif
-#endif
-
 #ifdef USE_AENT
 #define	AENT(x)		\
 	.aent	x, 0
@@ -409,6 +370,45 @@ _C_LABEL(x):
 #define	CALLFRAME_RA	(CALLFRAME_SIZ - 1 * SZREG)
 
 /*
+ *   Endian-independent assembly-code aliases for unaligned memory accesses.
+ */
+#if _BYTE_ORDER == _LITTLE_ENDIAN
+# define LWHI lwr
+# define LWLO lwl
+# define SWHI swr
+# define SWLO swl
+# if SZREG == 4
+#  define REG_LHI   lwr
+#  define REG_LLO   lwl
+#  define REG_SHI   swr
+#  define REG_SLO   swl
+# else
+#  define REG_LHI   ldr
+#  define REG_LLO   ldl
+#  define REG_SHI   sdr
+#  define REG_SLO   sdl
+# endif
+#endif
+
+#if _BYTE_ORDER == _BIG_ENDIAN
+# define LWHI lwl
+# define LWLO lwr
+# define SWHI swl
+# define SWLO swr
+# if SZREG == 4
+#  define REG_LHI   lwl
+#  define REG_LLO   lwr
+#  define REG_SHI   swl
+#  define REG_SLO   swr
+# else
+#  define REG_LHI   ldl
+#  define REG_LLO   ldr
+#  define REG_SHI   sdl
+#  define REG_SLO   sdr
+# endif
+#endif
+
+/*
  * While it would be nice to be compatible with the SGI
  * REG_L and REG_S macros, because they do not take parameters, it
  * is impossible to use them with the _MIPS_SIM_ABIX32 model.