svn commit: r190576 - in user/mav/ata/sys: . arm/conf compat/freebsd32 conf dev/ath dev/drm dev/ed dev/if_ndis dev/ipw dev/iwi dev/iwn dev/malo dev/mii dev/ofw dev/ral dev/sound/pci/hda dev/usb/wla...

Alexander Motin mav at FreeBSD.org
Mon Mar 30 14:32:35 PDT 2009 

Author: mav
Date: Mon Mar 30 21:32:33 2009
New Revision: 190576
URL: http://svn.freebsd.org/changeset/base/190576

Log:
  Catch up HEAD.

Added:
  user/mav/ata/sys/dev/mii/axphy.c
     - copied unchanged from r190573, head/sys/dev/mii/axphy.c
  user/mav/ata/sys/dev/mii/axphyreg.h
     - copied unchanged from r190573, head/sys/dev/mii/axphyreg.h
  user/mav/ata/sys/geom/vinum/geom_vinum_create.c
     - copied unchanged from r190573, head/sys/geom/vinum/geom_vinum_create.c
  user/mav/ata/sys/geom/vinum/geom_vinum_events.c
     - copied unchanged from r190573, head/sys/geom/vinum/geom_vinum_events.c
Modified:
  user/mav/ata/sys/   (props changed)
  user/mav/ata/sys/arm/conf/AVILA
  user/mav/ata/sys/arm/conf/CAMBRIA
  user/mav/ata/sys/compat/freebsd32/freebsd32_ioctl.c
  user/mav/ata/sys/compat/freebsd32/freebsd32_ioctl.h
  user/mav/ata/sys/conf/files
  user/mav/ata/sys/conf/newvers.sh
  user/mav/ata/sys/conf/options
  user/mav/ata/sys/dev/ath/if_ath.c
  user/mav/ata/sys/dev/ath/if_athvar.h
  user/mav/ata/sys/dev/drm/drm_pci.c
  user/mav/ata/sys/dev/drm/r600_cp.c
  user/mav/ata/sys/dev/ed/ax88x90reg.h
  user/mav/ata/sys/dev/ed/if_ed.c
  user/mav/ata/sys/dev/ed/if_ed_pccard.c
  user/mav/ata/sys/dev/ed/if_edreg.h
  user/mav/ata/sys/dev/if_ndis/if_ndis.c
  user/mav/ata/sys/dev/ipw/if_ipw.c
  user/mav/ata/sys/dev/iwi/if_iwi.c
  user/mav/ata/sys/dev/iwn/if_iwn.c
  user/mav/ata/sys/dev/malo/if_malo.c
  user/mav/ata/sys/dev/malo/if_malo_pci.c
  user/mav/ata/sys/dev/malo/if_malohal.c
  user/mav/ata/sys/dev/mii/miidevs
  user/mav/ata/sys/dev/ofw/ofw_standard.c
  user/mav/ata/sys/dev/ofw/openfirm.c
  user/mav/ata/sys/dev/ral/rt2560.c
  user/mav/ata/sys/dev/ral/rt2560var.h
  user/mav/ata/sys/dev/ral/rt2661.c
  user/mav/ata/sys/dev/ral/rt2661var.h
  user/mav/ata/sys/dev/sound/pci/hda/hdac.c
  user/mav/ata/sys/dev/usb/wlan/if_rum.c
  user/mav/ata/sys/dev/usb/wlan/if_rumvar.h
  user/mav/ata/sys/dev/usb/wlan/if_ural.c
  user/mav/ata/sys/dev/usb/wlan/if_uralvar.h
  user/mav/ata/sys/dev/usb/wlan/if_zyd.c
  user/mav/ata/sys/dev/usb/wlan/usb_wlan.h
  user/mav/ata/sys/dev/wi/if_wi.c
  user/mav/ata/sys/dev/wpi/if_wpi.c
  user/mav/ata/sys/dev/xen/netfront/   (props changed)
  user/mav/ata/sys/dev/xen/xenpci/   (props changed)
  user/mav/ata/sys/geom/part/g_part_ebr.c
  user/mav/ata/sys/geom/part/g_part_gpt.c
  user/mav/ata/sys/geom/part/g_part_mbr.c
  user/mav/ata/sys/geom/part/g_part_pc98.c
  user/mav/ata/sys/geom/vinum/geom_vinum.c
  user/mav/ata/sys/geom/vinum/geom_vinum.h
  user/mav/ata/sys/geom/vinum/geom_vinum_drive.c
  user/mav/ata/sys/geom/vinum/geom_vinum_init.c
  user/mav/ata/sys/geom/vinum/geom_vinum_list.c
  user/mav/ata/sys/geom/vinum/geom_vinum_move.c
  user/mav/ata/sys/geom/vinum/geom_vinum_plex.c
  user/mav/ata/sys/geom/vinum/geom_vinum_raid5.c
  user/mav/ata/sys/geom/vinum/geom_vinum_raid5.h
  user/mav/ata/sys/geom/vinum/geom_vinum_rename.c
  user/mav/ata/sys/geom/vinum/geom_vinum_rm.c
  user/mav/ata/sys/geom/vinum/geom_vinum_share.c
  user/mav/ata/sys/geom/vinum/geom_vinum_share.h
  user/mav/ata/sys/geom/vinum/geom_vinum_state.c
  user/mav/ata/sys/geom/vinum/geom_vinum_subr.c
  user/mav/ata/sys/geom/vinum/geom_vinum_var.h
  user/mav/ata/sys/geom/vinum/geom_vinum_volume.c
  user/mav/ata/sys/i386/cpufreq/hwpstate.c
  user/mav/ata/sys/kern/sysv_sem.c
  user/mav/ata/sys/kern/vfs_cache.c
  user/mav/ata/sys/kern/vfs_mount.c
  user/mav/ata/sys/kern/vfs_subr.c
  user/mav/ata/sys/mips/include/bus.h
  user/mav/ata/sys/modules/ath/Makefile
  user/mav/ata/sys/modules/geom/geom_vinum/Makefile
  user/mav/ata/sys/modules/mii/Makefile
  user/mav/ata/sys/net/if.c
  user/mav/ata/sys/net80211/ieee80211.c
  user/mav/ata/sys/net80211/ieee80211_ddb.c
  user/mav/ata/sys/net80211/ieee80211_freebsd.c
  user/mav/ata/sys/net80211/ieee80211_ioctl.c
  user/mav/ata/sys/net80211/ieee80211_node.c
  user/mav/ata/sys/net80211/ieee80211_scan.c
  user/mav/ata/sys/net80211/ieee80211_superg.c
  user/mav/ata/sys/net80211/ieee80211_var.h
  user/mav/ata/sys/security/mac_biba/mac_biba.c
  user/mav/ata/sys/security/mac_bsdextended/mac_bsdextended.c
  user/mav/ata/sys/security/mac_mls/mac_mls.c
  user/mav/ata/sys/sys/elf_common.h
  user/mav/ata/sys/sys/vnode.h
  user/mav/ata/sys/tools/vnode_if.awk

Modified: user/mav/ata/sys/arm/conf/AVILA
==============================================================================
--- user/mav/ata/sys/arm/conf/AVILA	Mon Mar 30 21:31:52 2009	(r190575)
+++ user/mav/ata/sys/arm/conf/AVILA	Mon Mar 30 21:32:33 2009	(r190576)
@@ -111,7 +111,6 @@ device		wlan_tkip	# 802.11 TKIP support
 device		wlan_xauth
 
 device		ath		# Atheros pci/cardbus NIC's
-options		ATH_SUPPORT_TDMA
 options 	ATH_DEBUG
 options		ATH_DIAGAPI
 #options		ATH_TX99_DIAG

Modified: user/mav/ata/sys/arm/conf/CAMBRIA
==============================================================================
--- user/mav/ata/sys/arm/conf/CAMBRIA	Mon Mar 30 21:31:52 2009	(r190575)
+++ user/mav/ata/sys/arm/conf/CAMBRIA	Mon Mar 30 21:32:33 2009	(r190576)
@@ -114,7 +114,6 @@ device		wlan_tkip	# 802.11 TKIP support
 device		wlan_xauth
 
 device		ath		# Atheros pci/cardbus NIC's
-options		ATH_SUPPORT_TDMA
 options 	ATH_DEBUG
 options		ATH_DIAGAPI
 #options		ATH_TX99_DIAG

Modified: user/mav/ata/sys/compat/freebsd32/freebsd32_ioctl.c
==============================================================================
--- user/mav/ata/sys/compat/freebsd32/freebsd32_ioctl.c	Mon Mar 30 21:31:52 2009	(r190575)
+++ user/mav/ata/sys/compat/freebsd32/freebsd32_ioctl.c	Mon Mar 30 21:32:33 2009	(r190576)
@@ -35,6 +35,7 @@ __FBSDID("$FreeBSD$");
 #include <sys/param.h>
 #include <sys/cdio.h>
 #include <sys/fcntl.h>
+#include <sys/filio.h>
 #include <sys/file.h>
 #include <sys/ioccom.h>
 #include <sys/mdioctl.h>
@@ -178,6 +179,22 @@ freebsd32_ioctl_ioc_read_toc(struct thre
 	return error;
 }
 
+static int
+freebsd32_ioctl_fiodgname(struct thread *td,
+    struct freebsd32_ioctl_args *uap, struct file *fp)
+{
+	struct fiodgname_arg fgn;
+	struct fiodgname_arg32 fgn32;
+	int error;
+
+	if ((error = copyin(uap->data, &fgn32, sizeof fgn32)) != 0)
+		return (error);
+	CP(fgn32, fgn, len);
+	PTRIN_CP(fgn32, fgn, buf);
+	error = fo_ioctl(fp, FIODGNAME, (caddr_t)&fgn, td->td_ucred, td);
+	fdrop(fp, td);
+	return (error);
+}
 
 int
 freebsd32_ioctl(struct thread *td, struct freebsd32_ioctl_args *uap)
@@ -210,6 +227,9 @@ freebsd32_ioctl(struct thread *td, struc
 	case CDIOREADTOCHEADER_32:
 		return freebsd32_ioctl_ioc_toc_header(td, uap, fp);
 
+	case FIODGNAME_32:
+		return freebsd32_ioctl_fiodgname(td, uap, fp);
+
 	default:
 		fdrop(fp, td);
 		ap.fd = uap->fd;

Modified: user/mav/ata/sys/compat/freebsd32/freebsd32_ioctl.h
==============================================================================
--- user/mav/ata/sys/compat/freebsd32/freebsd32_ioctl.h	Mon Mar 30 21:31:52 2009	(r190575)
+++ user/mav/ata/sys/compat/freebsd32/freebsd32_ioctl.h	Mon Mar 30 21:32:33 2009	(r190576)
@@ -62,11 +62,17 @@ struct md_ioctl32 {
 	int		md_pad[MDNPAD32]; /* padding for future ideas */
 };
 
+struct fiodgname_arg32 {
+	int		len;
+	caddr_t32	buf;
+};
+
 #define	CDIOREADTOCENTRYS_32 _IOWR('c', 5, struct ioc_read_toc_entry32)
 #define	CDIOREADTOCHEADER_32 _IOR('c', 4, struct ioc_toc_header32)
 #define	MDIOCATTACH_32	_IOC(IOC_INOUT, 'm', 0, sizeof(struct md_ioctl32) + 4)
 #define	MDIOCDETACH_32	_IOC(IOC_INOUT, 'm', 1, sizeof(struct md_ioctl32) + 4)
 #define	MDIOCQUERY_32	_IOC(IOC_INOUT, 'm', 2, sizeof(struct md_ioctl32) + 4)
 #define	MDIOCLIST_32	_IOC(IOC_INOUT, 'm', 3, sizeof(struct md_ioctl32) + 4)
+#define	FIODGNAME_32	_IOW('f', 120, struct fiodgname_arg32)
 
 #endif	/* _COMPAT_FREEBSD32_IOCTL_H_ */

Modified: user/mav/ata/sys/conf/files
==============================================================================
--- user/mav/ata/sys/conf/files	Mon Mar 30 21:31:52 2009	(r190575)
+++ user/mav/ata/sys/conf/files	Mon Mar 30 21:32:33 2009	(r190576)
@@ -1103,6 +1103,7 @@ dev/mfi/mfi_cam.c		optional mfip scbus
 dev/mii/acphy.c			optional miibus | acphy
 dev/mii/amphy.c			optional miibus | amphy
 dev/mii/atphy.c			optional miibus | atphy
+dev/mii/axphy.c			optional miibus | axphy
 dev/mii/bmtphy.c		optional miibus | bmtphy
 dev/mii/brgphy.c		optional miibus | brgphy
 dev/mii/ciphy.c			optional miibus | ciphy

Modified: user/mav/ata/sys/conf/newvers.sh
==============================================================================
--- user/mav/ata/sys/conf/newvers.sh	Mon Mar 30 21:31:52 2009	(r190575)
+++ user/mav/ata/sys/conf/newvers.sh	Mon Mar 30 21:32:33 2009	(r190576)
@@ -100,7 +100,13 @@ for dir in /bin /usr/bin /usr/local/bin;
 done
 
 if [ -n "$svnversion" -a -d "${SRCDIR}/.svn" ] ; then
-	svn=" r`cd $SRCDIR && $svnversion`"
+	# If we are called from the kernel build, limit
+	# the scope of svnversion to sys/ .
+	if [ -e "${SRCDIR}/sys/conf/newvers.sh" ] ; then
+		svn=" r`cd $SRCDIR/sys && $svnversion`"
+	else
+		svn=" r`cd $SRCDIR && $svnversion`"
+	fi
 else
 	svn=""
 fi

Modified: user/mav/ata/sys/conf/options
==============================================================================
--- user/mav/ata/sys/conf/options	Mon Mar 30 21:31:52 2009	(r190575)
+++ user/mav/ata/sys/conf/options	Mon Mar 30 21:32:33 2009	(r190576)
@@ -745,7 +745,6 @@ ATH_TXBUF		opt_ath.h
 ATH_RXBUF		opt_ath.h
 ATH_DIAGAPI		opt_ath.h
 ATH_TX99_DIAG		opt_ath.h
-ATH_SUPPORT_TDMA	opt_ath.h
 
 # options for the Atheros hal
 AH_SUPPORT_AR5416	opt_ah.h

Modified: user/mav/ata/sys/dev/ath/if_ath.c
==============================================================================
--- user/mav/ata/sys/dev/ath/if_ath.c	Mon Mar 30 21:31:52 2009	(r190575)
+++ user/mav/ata/sys/dev/ath/if_ath.c	Mon Mar 30 21:32:33 2009	(r190576)
@@ -39,6 +39,7 @@ __FBSDID("$FreeBSD$");
 
 #include "opt_inet.h"
 #include "opt_ath.h"
+#include "opt_wlan.h"
 
 #include <sys/param.h>
 #include <sys/systm.h> 
@@ -70,7 +71,7 @@ __FBSDID("$FreeBSD$");
 
 #include <net80211/ieee80211_var.h>
 #include <net80211/ieee80211_regdomain.h>
-#ifdef ATH_SUPPORT_TDMA
+#ifdef IEEE80211_SUPPORT_TDMA
 #include <net80211/ieee80211_tdma.h>
 #endif
 
@@ -213,7 +214,7 @@ static int	ath_raw_xmit(struct ieee80211
 static void	ath_bpfattach(struct ath_softc *);
 static void	ath_announce(struct ath_softc *);
 
-#ifdef ATH_SUPPORT_TDMA
+#ifdef IEEE80211_SUPPORT_TDMA
 static void	ath_tdma_settimers(struct ath_softc *sc, u_int32_t nexttbtt,
 		    u_int32_t bintval);
 static void	ath_tdma_bintvalsetup(struct ath_softc *sc,
@@ -255,7 +256,7 @@ ath_hal_getcca(struct ath_hal *ah)
 #define	TDMA_EP_RND(x,mul) \
 	((((x)%(mul)) >= ((mul)/2)) ? ((x) + ((mul) - 1)) / (mul) : (x)/(mul))
 #define	TDMA_AVG(x)		TDMA_EP_RND(x, TDMA_EP_MULTIPLIER)
-#endif /* ATH_SUPPORT_TDMA */
+#endif /* IEEE80211_SUPPORT_TDMA */
 
 SYSCTL_DECL(_hw_ath);
 
@@ -353,6 +354,7 @@ ath_attach(u_int16_t devid, struct ath_s
 	HAL_STATUS status;
 	int error = 0, i;
 	u_int wmodes;
+	uint8_t macaddr[IEEE80211_ADDR_LEN];
 
 	DPRINTF(sc, ATH_DEBUG_ANY, "%s: devid 0x%x\n", __func__, devid);
 
@@ -657,7 +659,7 @@ ath_attach(u_int16_t devid, struct ath_s
 	wmodes = ath_hal_getwirelessmodes(ah);
 	if (wmodes & (HAL_MODE_108G|HAL_MODE_TURBO))
 		ic->ic_caps |= IEEE80211_C_TURBOP;
-#ifdef ATH_SUPPORT_TDMA
+#ifdef IEEE80211_SUPPORT_TDMA
 	if (ath_hal_macversion(ah) > 0x78) {
 		ic->ic_caps |= IEEE80211_C_TDMA; /* capable of TDMA */
 		ic->ic_tdma_update = ath_tdma_update;
@@ -681,14 +683,14 @@ ath_attach(u_int16_t devid, struct ath_s
 	sc->sc_hasveol = ath_hal_hasveol(ah);
 
 	/* get mac address from hardware */
-	ath_hal_getmac(ah, ic->ic_myaddr);
+	ath_hal_getmac(ah, macaddr);
 	if (sc->sc_hasbmask)
 		ath_hal_getbssidmask(ah, sc->sc_hwbssidmask);
 
 	/* NB: used to size node table key mapping array */
 	ic->ic_max_keyix = sc->sc_keymax;
 	/* call MI attach routine. */
-	ieee80211_ifattach(ic);
+	ieee80211_ifattach(ic, macaddr);
 	ic->ic_setregdomain = ath_setregdomain;
 	ic->ic_getradiocaps = ath_getradiocaps;
 	sc->sc_opmode = HAL_M_STA;
@@ -886,7 +888,7 @@ ath_vap_create(struct ieee80211com *ic,
 		needbeacon = 1;
 		break;
 	case IEEE80211_M_AHDEMO:
-#ifdef ATH_SUPPORT_TDMA
+#ifdef IEEE80211_SUPPORT_TDMA
 		if (flags & IEEE80211_CLONE_TDMA) {
 			needbeacon = 1;
 			flags |= IEEE80211_CLONE_NOBEACONS;
@@ -1011,7 +1013,7 @@ ath_vap_create(struct ieee80211com *ic,
 		sc->sc_opmode = HAL_M_STA;
 		break;
 	case IEEE80211_M_AHDEMO:
-#ifdef ATH_SUPPORT_TDMA
+#ifdef IEEE80211_SUPPORT_TDMA
 		if (vap->iv_caps & IEEE80211_C_TDMA) {
 			sc->sc_tdma = 1;
 			/* NB: disable tsf adjust */
@@ -1117,7 +1119,7 @@ ath_vap_delete(struct ieee80211vap *vap)
 	}
 	if (vap->iv_opmode != IEEE80211_M_WDS)
 		sc->sc_nvaps--;
-#ifdef ATH_SUPPORT_TDMA
+#ifdef IEEE80211_SUPPORT_TDMA
 	/* TDMA operation ceases when the last vap is destroyed */
 	if (sc->sc_tdma && sc->sc_nvaps == 0) {
 		sc->sc_tdma = 0;
@@ -1278,7 +1280,7 @@ ath_intr(void *arg)
 			 * this is too slow to meet timing constraints
 			 * under load.
 			 */
-#ifdef ATH_SUPPORT_TDMA
+#ifdef IEEE80211_SUPPORT_TDMA
 			if (sc->sc_tdma) {
 				if (sc->sc_tdmaswba == 0) {
 					struct ieee80211com *ic = ifp->if_l2com;
@@ -1625,7 +1627,7 @@ ath_reset(struct ifnet *ifp)
 	 */
 	ath_chan_change(sc, ic->ic_curchan);
 	if (sc->sc_beacons) {
-#ifdef ATH_SUPPORT_TDMA
+#ifdef IEEE80211_SUPPORT_TDMA
 		if (sc->sc_tdma)
 			ath_tdma_config(sc, NULL);
 		else
@@ -2755,7 +2757,6 @@ static void
 ath_mode_init(struct ath_softc *sc)
 {
 	struct ifnet *ifp = sc->sc_ifp;
-	struct ieee80211com *ic = ifp->if_l2com;
 	struct ath_hal *ah = sc->sc_ah;
 	u_int32_t rfilt;
 
@@ -2766,16 +2767,8 @@ ath_mode_init(struct ath_softc *sc)
 	/* configure operational mode */
 	ath_hal_setopmode(ah);
 
-	/*
-	 * Handle any link-level address change.  Note that we only
-	 * need to force ic_myaddr; any other addresses are handled
-	 * as a byproduct of the ifnet code marking the interface
-	 * down then up.
-	 *
-	 * XXX should get from lladdr instead of arpcom but that's more work
-	 */
-	IEEE80211_ADDR_COPY(ic->ic_myaddr, IF_LLADDR(ifp));
-	ath_hal_setmac(ah, ic->ic_myaddr);
+	/* handle any link-level address change */
+	ath_hal_setmac(ah, IF_LLADDR(ifp));
 
 	/* calculate and install multicast filter */
 	ath_update_mcast(ifp);
@@ -4284,7 +4277,7 @@ rx_accept:
 			/*
 			 * Sending station is known, dispatch directly.
 			 */
-#ifdef ATH_SUPPORT_TDMA
+#ifdef IEEE80211_SUPPORT_TDMA
 			sc->sc_tdmars = rs;
 #endif
 			type = ieee80211_input(ni, m,
@@ -4459,7 +4452,7 @@ ath_txq_update(struct ath_softc *sc, int
 	HAL_TXQ_INFO qi;
 
 	ath_hal_gettxqueueprops(ah, txq->axq_qnum, &qi);
-#ifdef ATH_SUPPORT_TDMA
+#ifdef IEEE80211_SUPPORT_TDMA
 	if (sc->sc_tdma) {
 		/*
 		 * AIFS is zero so there's no pre-transmit wait.  The
@@ -4493,7 +4486,7 @@ ath_txq_update(struct ath_softc *sc, int
 		qi.tqi_cwmax = ATH_EXPONENT_TO_VALUE(wmep->wmep_logcwmax);
 		qi.tqi_readyTime = 0;
 		qi.tqi_burstTime = ATH_TXOP_TO_US(wmep->wmep_txopLimit);
-#ifdef ATH_SUPPORT_TDMA
+#ifdef IEEE80211_SUPPORT_TDMA
 	}
 #endif
 
@@ -4683,7 +4676,7 @@ ath_tx_handoff(struct ath_softc *sc, str
 	KASSERT((bf->bf_flags & ATH_BUF_BUSY) == 0,
 	     ("busy status 0x%x", bf->bf_flags));
 	if (txq->axq_qnum != ATH_TXQ_SWQ) {
-#ifdef ATH_SUPPORT_TDMA
+#ifdef IEEE80211_SUPPORT_TDMA
 		int qbusy;
 
 		ATH_TXQ_INSERT_TAIL(txq, bf, bf_list);
@@ -4753,7 +4746,7 @@ ath_tx_handoff(struct ath_softc *sc, str
 			    txq->axq_qnum, txq->axq_link,
 			    (caddr_t)bf->bf_daddr, bf->bf_desc, txq->axq_depth);
 		}
-#endif /* ATH_SUPPORT_TDMA */
+#endif /* IEEE80211_SUPPORT_TDMA */
 		txq->axq_link = &bf->bf_desc[bf->bf_nseg - 1].ds_link;
 		ath_hal_txstart(ah, txq->axq_qnum);
 	} else {
@@ -4988,7 +4981,7 @@ ath_tx_start(struct ath_softc *sc, struc
 	}
 	if (flags & HAL_TXDESC_NOACK)		/* NB: avoid double counting */
 		sc->sc_stats.ast_tx_noack++;
-#ifdef ATH_SUPPORT_TDMA
+#ifdef IEEE80211_SUPPORT_TDMA
 	if (sc->sc_tdma && (flags & HAL_TXDESC_NOACK) == 0) {
 		DPRINTF(sc, ATH_DEBUG_TDMA,
 		    "%s: discard frame, ACK required w/ TDMA\n", __func__);
@@ -5230,7 +5223,7 @@ ath_tx_processq(struct ath_softc *sc, st
 			break;
 		}
 		ATH_TXQ_REMOVE_HEAD(txq, bf_list);
-#ifdef ATH_SUPPORT_TDMA
+#ifdef IEEE80211_SUPPORT_TDMA
 		if (txq->axq_depth > 0) {
 			/*
 			 * More frames follow.  Mark the buffer busy
@@ -5941,7 +5934,7 @@ ath_newstate(struct ieee80211vap *vap, e
 		    ni->ni_capinfo, ieee80211_chan2ieee(ic, ic->ic_curchan));
 
 		switch (vap->iv_opmode) {
-#ifdef ATH_SUPPORT_TDMA
+#ifdef IEEE80211_SUPPORT_TDMA
 		case IEEE80211_M_AHDEMO:
 			if ((vap->iv_caps & IEEE80211_C_TDMA) == 0)
 				break;
@@ -5975,7 +5968,7 @@ ath_newstate(struct ieee80211vap *vap, e
 			    ni->ni_tstamp.tsf != 0) {
 				sc->sc_syncbeacon = 1;
 			} else if (!sc->sc_beacons) {
-#ifdef ATH_SUPPORT_TDMA
+#ifdef IEEE80211_SUPPORT_TDMA
 				if (vap->iv_caps & IEEE80211_C_TDMA)
 					ath_tdma_config(sc, vap);
 				else
@@ -6043,7 +6036,7 @@ ath_newstate(struct ieee80211vap *vap, e
 			taskqueue_block(sc->sc_tq);
 			sc->sc_beacons = 0;
 		}
-#ifdef ATH_SUPPORT_TDMA
+#ifdef IEEE80211_SUPPORT_TDMA
 		ath_hal_setcca(ah, AH_TRUE);
 #endif
 	}
@@ -6551,7 +6544,7 @@ ath_ioctl(struct ifnet *ifp, u_long cmd,
 		sc->sc_stats.ast_rx_packets = ifp->if_ipackets;
 		sc->sc_stats.ast_tx_rssi = ATH_RSSI(sc->sc_halstats.ns_avgtxrssi);
 		sc->sc_stats.ast_rx_rssi = ATH_RSSI(sc->sc_halstats.ns_avgrssi);
-#ifdef ATH_SUPPORT_TDMA
+#ifdef IEEE80211_SUPPORT_TDMA
 		sc->sc_stats.ast_tdma_tsfadjp = TDMA_AVG(sc->sc_avgtsfdeltap);
 		sc->sc_stats.ast_tdma_tsfadjm = TDMA_AVG(sc->sc_avgtsfdeltam);
 #endif
@@ -6841,7 +6834,7 @@ ath_sysctl_intmit(SYSCTL_HANDLER_ARGS)
 	return !ath_hal_setintmit(sc->sc_ah, intmit) ? EINVAL : 0;
 }
 
-#ifdef ATH_SUPPORT_TDMA
+#ifdef IEEE80211_SUPPORT_TDMA
 static int
 ath_sysctl_setcca(SYSCTL_HANDLER_ARGS)
 {
@@ -6855,7 +6848,7 @@ ath_sysctl_setcca(SYSCTL_HANDLER_ARGS)
 	sc->sc_setcca = (setcca != 0);
 	return 0;
 }
-#endif /* ATH_SUPPORT_TDMA */
+#endif /* IEEE80211_SUPPORT_TDMA */
 
 static void
 ath_sysctlattach(struct ath_softc *sc)
@@ -6954,7 +6947,7 @@ ath_sysctlattach(struct ath_softc *sc)
 	SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
 		"monpass", CTLFLAG_RW, &sc->sc_monpass, 0,
 		"mask of error frames to pass when monitoring");
-#ifdef ATH_SUPPORT_TDMA
+#ifdef IEEE80211_SUPPORT_TDMA
 	if (ath_hal_macversion(ah) > 0x78) {
 		sc->sc_tdmadbaprep = 2;
 		SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
@@ -7293,7 +7286,7 @@ ath_announce(struct ath_softc *sc)
 		if_printf(ifp, "using %u tx buffers\n", ath_txbuf);
 }
 
-#ifdef ATH_SUPPORT_TDMA
+#ifdef IEEE80211_SUPPORT_TDMA
 static __inline uint32_t
 ath_hal_getnexttbtt(struct ath_hal *ah)
 {
@@ -7653,4 +7646,4 @@ ath_tdma_beacon_send(struct ath_softc *s
 		vap->iv_bss->ni_tstamp.tsf = ath_hal_gettsf64(ah);
 	}
 }
-#endif /* ATH_SUPPORT_TDMA */
+#endif /* IEEE80211_SUPPORT_TDMA */

Modified: user/mav/ata/sys/dev/ath/if_athvar.h
==============================================================================
--- user/mav/ata/sys/dev/ath/if_athvar.h	Mon Mar 30 21:31:52 2009	(r190575)
+++ user/mav/ata/sys/dev/ath/if_athvar.h	Mon Mar 30 21:32:33 2009	(r190576)
@@ -345,7 +345,6 @@ struct ath_softc {
 	int			sc_lastlongcal;	/* last long cal completed */
 	int			sc_lastcalreset;/* last cal reset done */
 	HAL_NODE_STATS		sc_halstats;	/* station-mode rssi stats */
-#ifdef ATH_SUPPORT_TDMA
 	u_int			sc_tdmadbaprep;	/* TDMA DBA prep time */
 	u_int			sc_tdmaswbaprep;/* TDMA SWBA prep time */
 	u_int			sc_tdmaswba;	/* TDMA SWBA counter */
@@ -356,7 +355,6 @@ struct ath_softc {
 	struct ath_rx_status	*sc_tdmars;	/* TDMA status of last rx */
 	u_int32_t		sc_avgtsfdeltap;/* TDMA slot adjust (+) */
 	u_int32_t		sc_avgtsfdeltam;/* TDMA slot adjust (-) */
-#endif
 };
 
 #define	ATH_LOCK_INIT(_sc) \

Modified: user/mav/ata/sys/dev/drm/drm_pci.c
==============================================================================
--- user/mav/ata/sys/dev/drm/drm_pci.c	Mon Mar 30 21:31:52 2009	(r190575)
+++ user/mav/ata/sys/dev/drm/drm_pci.c	Mon Mar 30 21:32:33 2009	(r190576)
@@ -91,7 +91,7 @@ drm_pci_alloc(struct drm_device *dev, si
 	}
 
 	ret = bus_dmamem_alloc(dmah->tag, &dmah->vaddr,
-	    BUS_DMA_WAITOK | BUS_DMA_ZERO, &dmah->map);
+	    BUS_DMA_WAITOK | BUS_DMA_ZERO | BUS_DMA_NOCACHE, &dmah->map);
 	if (ret != 0) {
 		bus_dma_tag_destroy(dmah->tag);
 		free(dmah, DRM_MEM_DMA);

Modified: user/mav/ata/sys/dev/drm/r600_cp.c
==============================================================================
--- user/mav/ata/sys/dev/drm/r600_cp.c	Mon Mar 30 21:31:52 2009	(r190575)
+++ user/mav/ata/sys/dev/drm/r600_cp.c	Mon Mar 30 21:32:33 2009	(r190576)
@@ -392,17 +392,17 @@ static void r600_cp_load_microcode(drm_r
 		DRM_INFO("Loading RS780 CP Microcode\n");
 		for (i = 0; i < PM4_UCODE_SIZE; i++) {
 			RADEON_WRITE(R600_CP_ME_RAM_DATA,
-				     RV670_cp_microcode[i][0]);
+				     RS780_cp_microcode[i][0]);
 			RADEON_WRITE(R600_CP_ME_RAM_DATA,
-				     RV670_cp_microcode[i][1]);
+				     RS780_cp_microcode[i][1]);
 			RADEON_WRITE(R600_CP_ME_RAM_DATA,
-				     RV670_cp_microcode[i][2]);
+				     RS780_cp_microcode[i][2]);
 		}
 
 		RADEON_WRITE(R600_CP_PFP_UCODE_ADDR, 0);
 		DRM_INFO("Loading RS780 PFP Microcode\n");
 		for (i = 0; i < PFP_UCODE_SIZE; i++)
-			RADEON_WRITE(R600_CP_PFP_UCODE_DATA, RV670_pfp_microcode[i]);
+			RADEON_WRITE(R600_CP_PFP_UCODE_DATA, RS780_pfp_microcode[i]);
 	}
 	RADEON_WRITE(R600_CP_PFP_UCODE_ADDR, 0);
 	RADEON_WRITE(R600_CP_ME_RAM_WADDR, 0);

Modified: user/mav/ata/sys/dev/ed/ax88x90reg.h
==============================================================================
--- user/mav/ata/sys/dev/ed/ax88x90reg.h	Mon Mar 30 21:31:52 2009	(r190575)
+++ user/mav/ata/sys/dev/ed/ax88x90reg.h	Mon Mar 30 21:32:33 2009	(r190576)
@@ -30,7 +30,7 @@
 /* AX88x90 based miibus defines */
 #define ED_AX88X90_MIIBUS	0x04	/* MII bus register on ASIC */
 #define ED_AX88X90_MII_CLK	    0x01
-#define ED_AX88X90_MII_DIROUT	    0x02
+#define ED_AX88X90_MII_DIRIN	    0x02
 #define ED_AX88X90_MII_DATAIN	    0x04
 #define ED_AX88X90_MII_DATAOUT	    0x08
 #define	ED_AX88X90_TEST		0x05	/* "test" register on asic */

Modified: user/mav/ata/sys/dev/ed/if_ed.c
==============================================================================
--- user/mav/ata/sys/dev/ed/if_ed.c	Mon Mar 30 21:31:52 2009	(r190575)
+++ user/mav/ata/sys/dev/ed/if_ed.c	Mon Mar 30 21:32:33 2009	(r190576)
@@ -392,6 +392,8 @@ ed_detach(device_t dev)
 	if (sc->irq_res != NULL && sc->irq_handle)
 		bus_teardown_intr(dev, sc->irq_res, sc->irq_handle);
 	ed_release_resources(dev);
+	if (sc->miibus)
+		device_delete_child(dev, sc->miibus);
 	ED_LOCK_DESTROY(sc);
 	bus_generic_detach(dev);
 	return (0);
@@ -427,10 +429,19 @@ ed_stop_hw(struct ed_softc *sc)
 	 * Wait for interface to enter stopped state, but limit # of checks to
 	 * 'n' (about 5ms). It shouldn't even take 5us on modern DS8390's, but
 	 * just in case it's an old one.
+	 *
+	 * The AX88x90 chips don't seem to implement this behavor.  The
+	 * datasheets say it is only turned on when the chip enters a RESET
+	 * state and is silent about behavior for the stopped state we just
+	 * entered.
 	 */
-	if (sc->chip_type != ED_CHIP_TYPE_AX88190)
-		while (((ed_nic_inb(sc, ED_P0_ISR) & ED_ISR_RST) == 0) && --n)
-			continue;
+	if (sc->chip_type == ED_CHIP_TYPE_AX88190 ||
+	    sc->chip_type == ED_CHIP_TYPE_AX88790)
+		return;
+	while (((ed_nic_inb(sc, ED_P0_ISR) & ED_ISR_RST) == 0) && --n)
+		continue;
+	if (n <= 0)
+		device_printf(sc->dev, "ed_stop_hw RST never set\n");
 }
 
 /*
@@ -916,10 +927,10 @@ edintr(void *arg)
 	ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STA);
 
 	/*
-	 * loop until there are no more new interrupts.  When the card
-	 * goes away, the hardware will read back 0xff.  Looking at
-	 * the interrupts, it would appear that 0xff is impossible,
-	 * or at least extremely unlikely.
+	 * loop until there are no more new interrupts.  When the card goes
+	 * away, the hardware will read back 0xff.  Looking at the interrupts,
+	 * it would appear that 0xff is impossible, or at least extremely
+	 * unlikely.
 	 */
 	while ((isr = ed_nic_inb(sc, ED_P0_ISR)) != 0 && isr != 0xff) {
 
@@ -930,12 +941,14 @@ edintr(void *arg)
 		 */
 		ed_nic_outb(sc, ED_P0_ISR, isr);
 
-		/* 
-		 * XXX workaround for AX88190
+		/*
+		 * The AX88190 and AX88190A has problems acking an interrupt
+		 * and having them clear.  This interferes with top-level loop
+		 * here.  Wait for all the bits to clear.
+		 *
 		 * We limit this to 5000 iterations.  At 1us per inb/outb,
-		 * this translates to about 15ms, which should be plenty
-		 * of time, and also gives protection in the card eject
-		 * case.
+		 * this translates to about 15ms, which should be plenty of
+		 * time, and also gives protection in the card eject case.
 		 */
 		if (sc->chip_type == ED_CHIP_TYPE_AX88190) {
 			count = 5000;		/* 15ms */
@@ -1530,7 +1543,8 @@ ed_setrcr(struct ed_softc *sc)
 	ED_ASSERT_LOCKED(sc);
 
 	/* Bit 6 in AX88190 RCR register must be set. */
-	if (sc->chip_type == ED_CHIP_TYPE_AX88190)
+	if (sc->chip_type == ED_CHIP_TYPE_AX88190 ||
+	    sc->chip_type == ED_CHIP_TYPE_AX88790)
 		reg1 = ED_RCR_INTT;
 	else
 		reg1 = 0x00;

Modified: user/mav/ata/sys/dev/ed/if_ed_pccard.c
==============================================================================
--- user/mav/ata/sys/dev/ed/if_ed_pccard.c	Mon Mar 30 21:31:52 2009	(r190575)
+++ user/mav/ata/sys/dev/ed/if_ed_pccard.c	Mon Mar 30 21:32:33 2009	(r190576)
@@ -245,7 +245,6 @@ static void	ed_pccard_dl100xx_mii_writeb
     int nbits);
 
 static int	ed_pccard_ax88x90(device_t dev, const struct ed_product *);
-static void	ed_pccard_ax88x90_mii_reset(struct ed_softc *sc);
 static u_int	ed_pccard_ax88x90_mii_readbits(struct ed_softc *sc, int nbits);
 static void	ed_pccard_ax88x90_mii_writebits(struct ed_softc *sc, u_int val,
     int nbits);
@@ -364,7 +363,7 @@ ed_pccard_rom_mac(device_t dev, uint8_t 
 	 */
 	ed_pio_readmem(sc, 0, romdata, 32);
 	if (bootverbose)
-		printf("ROM DATA: %32D\n", romdata, " ");
+		device_printf(dev, "ROM DATA: %32D\n", romdata, " ");
 	if (romdata[28] != 0x57 || romdata[30] != 0x57)
 		return (0);
 	for (i = 0; i < ETHER_ADDR_LEN; i++)
@@ -440,6 +439,7 @@ ed_pccard_attach(device_t dev)
 	u_long size;
 	static uint16_t *intr_vals[] = {NULL, NULL};
 
+	sc->dev = dev;
 	if ((pp = (const struct ed_product *) pccard_product_lookup(dev, 
 	    (const struct pccard_product *) ed_pccard_products,
 	    sizeof(ed_pccard_products[0]), NULL)) == NULL)
@@ -485,9 +485,8 @@ ed_pccard_attach(device_t dev)
 		error = ed_pccard_tc5299j(dev, pp);
 	if (error != 0)
 		error = ed_probe_Novell_generic(dev, flags);
-	if (error != 0) {
-		if (pp->flags & NE2000DVF_TOSHIBA)
-			flags |= ED_FLAGS_TOSH_ETHER;
+	if (error != 0 && (pp->flags & NE2000DVF_TOSHIBA)) {
+		flags |= ED_FLAGS_TOSH_ETHER;
 		flags |= ED_FLAGS_PCCARD;
 		sc->asic_offset = ED_WD_ASIC_OFFSET;
 		sc->nic_offset  = ED_WD_NIC_OFFSET;
@@ -564,11 +563,11 @@ ed_pccard_attach(device_t dev)
 		ed_pccard_dl100xx_mii_reset(sc);
 		(void)mii_phy_probe(dev, &sc->miibus, ed_ifmedia_upd,
 		    ed_ifmedia_sts);
-	} else if (sc->chip_type == ED_CHIP_TYPE_AX88190) {
-		ed_pccard_ax88x90_mii_reset(sc);
+	} else if (sc->chip_type == ED_CHIP_TYPE_AX88190 ||
+	    sc->chip_type == ED_CHIP_TYPE_AX88790) {
 		if ((error = mii_phy_probe(dev, &sc->miibus, ed_ifmedia_upd,
 		     ed_ifmedia_sts)) != 0) {
-			device_printf(dev, "Missing mii!\n");
+			device_printf(dev, "Missing mii %d!\n", error);
 			goto bad;
 		}
 		    
@@ -722,11 +721,100 @@ ed_pccard_dl100xx_mii_readbits(struct ed
 	return val;
 }
 
+static void
+ed_pccard_ax88x90_reset(struct ed_softc *sc)
+{
+	int i;
+
+	/* Reset Card */
+	ed_nic_outb(sc, ED_P0_CR, ED_CR_RD2 | ED_CR_STP | ED_CR_PAGE_0);
+	ed_asic_outb(sc, ED_NOVELL_RESET, ed_asic_inb(sc, ED_NOVELL_RESET));
+
+	/* Wait for the interrupt to fire */
+	for (i = 10000; i > 0; i--)
+		if (ed_nic_inb(sc, ED_P0_ISR) & ED_ISR_RST)
+			break;
+	ed_nic_outb(sc, ED_P0_ISR, ED_ISR_RST);	/* ACK INTR */
+	if (i == 0)
+		device_printf(sc->dev, "Reset didn't finish\n");
+}
+
+/*
+ * Probe and vendor-specific initialization routine for ax88x90 boards
+ */
+static int
+ed_probe_ax88x90_generic(device_t dev, int flags)
+{
+	struct ed_softc *sc = device_get_softc(dev);
+	u_int   memsize;
+	static char test_pattern[32] = "THIS is A memory TEST pattern";
+	char    test_buffer[32];
+
+	ed_pccard_ax88x90_reset(sc);
+	DELAY(10 * 1000);
+
+	/* Make sure that we really have an 8390 based board */
+	if (!ed_probe_generic8390(sc))
+		return (ENXIO);
+
+	sc->vendor = ED_VENDOR_NOVELL;
+	sc->mem_shared = 0;
+	sc->cr_proto = ED_CR_RD2;
+
+	/*
+	 * Test the ability to read and write to the NIC memory.
+	 */
+
+	/*
+	 * This prevents packets from being stored in the NIC memory when the
+	 * readmem routine turns on the start bit in the CR.
+	 */
+	ed_nic_outb(sc, ED_P0_RCR, ED_RCR_MON);
+
+	/* Temporarily initialize DCR for byte operations */
+	ed_nic_outb(sc, ED_P0_DCR, ED_DCR_FT1 | ED_DCR_LS);
+	sc->isa16bit = 1;
+	ed_nic_outb(sc, ED_P0_DCR, ED_DCR_WTS | ED_DCR_FT1 | ED_DCR_LS);
+	ed_nic_outb(sc, ED_P0_PSTART, 16384 / ED_PAGE_SIZE);
+	ed_nic_outb(sc, ED_P0_PSTOP, 32768 / ED_PAGE_SIZE);
+	/*
+	 * Write a test pattern in word mode. If this also fails, then
+	 * we don't know what this board is.
+	 */
+	ed_pio_writemem(sc, test_pattern, 16384, sizeof(test_pattern));
+	ed_pio_readmem(sc, 16384, test_buffer, sizeof(test_pattern));
+	if (bcmp(test_pattern, test_buffer, sizeof(test_pattern)) != 0)
+		return (ENXIO);
+	sc->type = ED_TYPE_NE2000;
+	if (ed_asic_inb(sc, ED_AX88X90_TEST) != 0)
+		sc->chip_type = ED_CHIP_TYPE_AX88790;
+	else
+		sc->chip_type = ED_CHIP_TYPE_AX88190;
+
+	/* 8k of memory plus an additional 8k if 16bit */
+	memsize = 8192 + sc->isa16bit * 8192;
+	sc->mem_size = memsize;
+
+	/* NIC memory doesn't start at zero on an NE board */
+	/* The start address is tied to the bus width */
+	sc->mem_start = 8192 + sc->isa16bit * 8192;
+	sc->mem_end = sc->mem_start + memsize;
+	sc->tx_page_start = memsize / ED_PAGE_SIZE;
+	sc->txb_cnt = 2;
+	sc->rec_page_start = sc->tx_page_start + sc->txb_cnt * ED_TXBUF_SIZE;
+	sc->rec_page_stop = sc->tx_page_start + memsize / ED_PAGE_SIZE;
+
+	sc->mem_ring = sc->mem_start + sc->txb_cnt * ED_PAGE_SIZE * ED_TXBUF_SIZE;
+	/* clear any pending interrupts that might have occurred above */
+	ed_nic_outb(sc, ED_P0_ISR, 0xff);
+	sc->sc_write_mbufs = ed_pio_write_mbufs;
+	return (0);
+}
+
 static int
-ed_pccard_ax88x90_geteprom(struct ed_softc *sc)
+ed_pccard_ax88x90_enaddr(struct ed_softc *sc)
 {
-	int prom[16],i;
-	u_char tmp;
+	int i, j;
 	struct {
 		unsigned char offset, value;
 	} pg_seq[] = {
@@ -739,42 +827,75 @@ ed_pccard_ax88x90_geteprom(struct ed_sof
 		{ED_P0_ISR, 0xff},
 		{ED_P0_RCR, ED_RCR_MON | ED_RCR_INTT}, /* Set To Monitor */
 		{ED_P0_TCR, ED_TCR_LB0},	/* loopback mode. */
-		{ED_P0_RBCR0, 32},
+		{ED_P0_RBCR0, 0x20},
 		{ED_P0_RBCR1, 0x00},
 		{ED_P0_RSAR0, 0x00},
 		{ED_P0_RSAR1, 0x04},
 		{ED_P0_CR, ED_CR_RD0 | ED_CR_STA | ED_CR_PAGE_0},
 	};
 
-	/* Reset Card */
-	tmp = ed_asic_inb(sc, ED_NOVELL_RESET);
-	ed_asic_outb(sc, ED_NOVELL_RESET, tmp);
-	DELAY(5000);
-	ed_nic_outb(sc, ED_P0_CR, ED_CR_RD2 | ED_CR_STP | ED_CR_PAGE_0);
-	DELAY(5000);
-
 	/* Card Settings */
 	for (i = 0; i < sizeof(pg_seq) / sizeof(pg_seq[0]); i++)
 		ed_nic_outb(sc, pg_seq[i].offset, pg_seq[i].value);
 
 	/* Get Data */
-	for (i = 0; i < ETHER_ADDR_LEN / 2; i++)
-		prom[i] = ed_asic_inw(sc, 0);
 	for (i = 0; i < ETHER_ADDR_LEN; i += 2) {
-		sc->enaddr[i] = prom[i / 2] & 0xff;
-		sc->enaddr[i + 1] = (prom[i / 2] >> 8) & 0xff;
+		j = ed_asic_inw(sc, 0);
+		sc->enaddr[i] = j & 0xff;
+		sc->enaddr[i + 1] = (j >> 8) & 0xff;
 	}
 	return (0);
 }
 
+static int
+ed_pccard_ax88x90_check_mii(device_t dev, struct ed_softc *sc)
+{
+	int	i, id;
+
+	/*
+	 * All AX88x90 devices have MII and a PHY, so we use this to weed out
+	 * chips that would otherwise make it through the tests we have after
+	 * this point.
+	 */
+	for (i = 0; i < 32; i++) {
+		id = ed_miibus_readreg(dev, i, MII_BMSR);
+		if (id != 0 && id != 0xffff)
+			break;
+	}
+	/*
+	 * Found one, we're good.
+	 */
+	if (i != 32)
+		return (0);
+	/*
+	 * Didn't find anything, so try to power up and try again.  The PHY
+	 * may be not responding because we're in power down mode.
+	 */
+	if (sc->chip_type == ED_CHIP_TYPE_AX88190)
+		return (ENXIO);
+	pccard_ccr_write_1(dev, PCCARD_CCR_STATUS, PCCARD_CCR_STATUS_PWRDWN);
+	for (i = 0; i < 32; i++) {
+		id = ed_miibus_readreg(dev, i, MII_BMSR);
+		if (id != 0 && id != 0xffff)
+			break;
+	}
+	/*
+	 * Still no joy?  We're AFU, punt.
+	 */
+	if (i == 32)
+		return (ENXIO);
+	return (0);
+	
+}
+
 /*
  * Special setup for AX88[17]90
  */
 static int
 ed_pccard_ax88x90(device_t dev, const struct ed_product *pp)
 {
-	int	error, iobase, i, id;
-	char *ts;
+	int	error;
+	int iobase;
 	struct	ed_softc *sc = device_get_softc(dev);
 
 	if (!(pp->flags & NE2000DVF_AX88X90))
@@ -786,93 +907,51 @@ ed_pccard_ax88x90(device_t dev, const st
 	/*
 	 * Set the IOBASE Register.  The AX88x90 cards are potentially
 	 * multifunction cards, and thus requires a slight workaround.
-	 * We write the address the card is at.
+	 * We write the address the card is at, on the off chance that this
+	 * card is not MFC.
+	 * XXX I'm not sure that this is still needed...
 	 */
 	iobase = rman_get_start(sc->port_res);
 	pccard_ccr_write_1(dev, PCCARD_CCR_IOBASE0, iobase & 0xff);
 	pccard_ccr_write_1(dev, PCCARD_CCR_IOBASE1, (iobase >> 8) & 0xff);
 
-	ts = "AX88190";
-	if (ed_asic_inb(sc, ED_AX88X90_TEST) != 0) {
-		/*
-		 * AX88790 (and I think AX88190A) chips need to be
-		 * powered down.  There's an erratum that says we should
-		 * power down the PHY for 2.5s, but this seems to power
-		 * down the whole card.  I'm unsure why this was done, but
-		 * appears to be required for proper operation.
-		 */
-		pccard_ccr_write_1(dev, PCCARD_CCR_STATUS,
-		    PCCARD_CCR_STATUS_PWRDWN);
-		/*
-		 * Linux axnet driver selects the internal phy for the ax88790
-		 */
-		ed_asic_outb(sc, ED_AX88X90_GPIO, ED_AX88X90_GPIO_INT_PHY);
-		ts = "AX88790";
-	}
-
-	/*
-	 * Check to see if we have a MII PHY ID at any of the first 17
-	 * locations.  All AX88x90 devices have MII and a PHY, so we use
-	 * this to weed out chips that would otherwise make it through
-	 * the tests we have after this point.
-	 */
 	sc->mii_readbits = ed_pccard_ax88x90_mii_readbits;
 	sc->mii_writebits = ed_pccard_ax88x90_mii_writebits;
-	for (i = 0; i < 17; i++) {
-		id = ed_miibus_readreg(dev, i, MII_PHYIDR1);
-		if (id != 0 && id != 0xffff)
-			break;
-	}
-	if (i == 17) {
-		sc->mii_readbits = 0;
-		sc->mii_writebits = 0;
-		return (ENXIO);
+	error = ed_probe_ax88x90_generic(dev, device_get_flags(dev));
+	if (error) {
+		if (bootverbose)
+			device_printf(dev, "probe ax88x90 failed %d\n",
+			    error);
+		goto fail;
 	}
-	
-	sc->chip_type = ED_CHIP_TYPE_AX88190;
-	error = ed_pccard_ax88x90_geteprom(sc);
+	error = ed_pccard_ax88x90_enaddr(sc);
 	if (error)
-		return (error);
-	error = ed_probe_Novell_generic(dev, device_get_flags(dev));
-	if (bootverbose)
-		device_printf(dev, "probe novel returns %d\n", error);
-	if (error == 0) {
-		sc->vendor = ED_VENDOR_NOVELL;
-		sc->type = ED_TYPE_NE2000;
-		sc->chip_type = ED_CHIP_TYPE_AX88190;
-		sc->type_str = ts;
-	}
+		goto fail;
+	error = ed_pccard_ax88x90_check_mii(dev, sc);
+	if (error)
+		goto fail;
+	sc->vendor = ED_VENDOR_NOVELL;
+	sc->type = ED_TYPE_NE2000;
+	if (sc->chip_type == ED_CHIP_TYPE_AX88190)
+		sc->type_str = "AX88190";
+	else
+		sc->type_str = "AX88790";
+	return (0);
+fail:;
+	sc->mii_readbits = 0;
+	sc->mii_writebits = 0;
 	return (error);
 }
 
-/* MII bit-twiddling routines for cards using AX88x90 chipset */
-#define AX88X90_MIISET(sc, x) ed_asic_outb(sc, ED_AX88X90_MIIBUS, \
-    ed_asic_inb(sc, ED_AX88X90_MIIBUS) | (x))
-#define AX88X90_MIICLR(sc, x) ed_asic_outb(sc, ED_AX88X90_MIIBUS, \
-    ed_asic_inb(sc, ED_AX88X90_MIIBUS) & ~(x))
-
-static void
-ed_pccard_ax88x90_mii_reset(struct ed_softc *sc)
-{
-	/* Do nothing! */
-}
-
 static void
 ed_pccard_ax88x90_mii_writebits(struct ed_softc *sc, u_int val, int nbits)
 {
-	int i;
+	int i, data;
 
-	AX88X90_MIICLR(sc, ED_AX88X90_MII_DIROUT);
 	for (i = nbits - 1; i >= 0; i--) {
-		if ((val >> i) & 1)
-			AX88X90_MIISET(sc, ED_AX88X90_MII_DATAOUT);
-		else
-			AX88X90_MIICLR(sc, ED_AX88X90_MII_DATAOUT);
-		DELAY(10);
-		AX88X90_MIISET(sc, ED_AX88X90_MII_CLK);
-		DELAY(10);
-		AX88X90_MIICLR(sc, ED_AX88X90_MII_CLK);
-		DELAY(10);
+		data = (val >> i) & 1 ? ED_AX88X90_MII_DATAOUT : 0;
+		ed_asic_outb(sc, ED_AX88X90_MIIBUS, data);
+		ed_asic_outb(sc, ED_AX88X90_MIIBUS, data | ED_AX88X90_MII_CLK);
 	}
 }
 
@@ -881,16 +960,15 @@ ed_pccard_ax88x90_mii_readbits(struct ed
 {
 	int i;
 	u_int val = 0;
+	uint8_t mdio;
 
-	AX88X90_MIISET(sc, ED_AX88X90_MII_DIROUT);
+	mdio = ED_AX88X90_MII_DIRIN;
 	for (i = nbits - 1; i >= 0; i--) {
-		AX88X90_MIISET(sc, ED_AX88X90_MII_CLK);
-		DELAY(10);
+		ed_asic_outb(sc, ED_AX88X90_MIIBUS, mdio);
 		val <<= 1;
 		if (ed_asic_inb(sc, ED_AX88X90_MIIBUS) & ED_AX88X90_MII_DATAIN)
 			val++;
-		AX88X90_MIICLR(sc, ED_AX88X90_MII_CLK);
-		DELAY(10);
+		ed_asic_outb(sc, ED_AX88X90_MIIBUS, mdio | ED_AX88X90_MII_CLK);
 	}
 	return val;
 }
@@ -1015,20 +1093,29 @@ ed_miibus_readreg(device_t dev, int phy,
 	struct ed_softc *sc;
 	int failed, val;
 
+	sc = device_get_softc(dev);
 	/*
-	 * The AX88790 seem to have phy 0..f external, and 0x10 internal.
-	 * but they also seem to have a bogus one that shows up at phy
-	 * 0x11 through 0x1f.
+	 * The AX88790 has an interesting quirk.  It has an internal phy that
+	 * needs a special bit set to access, but can also have additional
+	 * external PHYs set for things like HomeNET media.  When accessing
+	 * the internal PHY, a bit has to be set, when accessing the external
+	 * PHYs, it must be clear.  See Errata 1, page 51, in the AX88790
+	 * datasheet for more details.
 	 */
-	if (phy >= 0x11)
-		return (0);
+	if (sc->chip_type == ED_CHIP_TYPE_AX88790) {
+		if (phy == 0x10)
+			ed_asic_outb(sc, ED_AX88X90_GPIO,
+			    ED_AX88X90_GPIO_INT_PHY);
+		else
+			ed_asic_outb(sc, ED_AX88X90_GPIO, 0);
+	}
 
-	sc = device_get_softc(dev);
 	(*sc->mii_writebits)(sc, 0xffffffff, 32);
 	(*sc->mii_writebits)(sc, ED_MII_STARTDELIM, ED_MII_STARTDELIM_BITS);
 	(*sc->mii_writebits)(sc, ED_MII_READOP, ED_MII_OP_BITS);
 	(*sc->mii_writebits)(sc, phy, ED_MII_PHY_BITS);
 	(*sc->mii_writebits)(sc, reg, ED_MII_REG_BITS);
+	(*sc->mii_readbits)(sc, ED_MII_ACK_BITS);
 	failed = (*sc->mii_readbits)(sc, ED_MII_ACK_BITS);
 	val = (*sc->mii_readbits)(sc, ED_MII_DATA_BITS);
 	(*sc->mii_writebits)(sc, ED_MII_IDLE, ED_MII_IDLE_BITS);
@@ -1040,15 +1127,22 @@ ed_miibus_writereg(device_t dev, int phy
 {
 	struct ed_softc *sc;
 
+	sc = device_get_softc(dev);
 	/*
-	 * The AX88790 seem to have phy 0..f external, and 0x10 internal.
-	 * but they also seem to have a bogus one that shows up at phy
-	 * 0x11 through 0x1f.
+	 * The AX88790 has an interesting quirk.  It has an internal phy that
+	 * needs a special bit set to access, but can also have additional
+	 * external PHYs set for things like HomeNET media.  When accessing
+	 * the internal PHY, a bit has to be set, when accessing the external
+	 * PHYs, it must be clear.  See Errata 1, page 51, in the AX88790
+	 * datasheet for more details.
 	 */
-	if (phy >= 0x11)
-		return (0);
-
-	sc = device_get_softc(dev);
+	if (sc->chip_type == ED_CHIP_TYPE_AX88790) {
+		if (phy == 0x10)
+			ed_asic_outb(sc, ED_AX88X90_GPIO,
+			    ED_AX88X90_GPIO_INT_PHY);
+		else
+			ed_asic_outb(sc, ED_AX88X90_GPIO, 0);

*** DIFF OUTPUT TRUNCATED AT 1000 LINES ***

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