svn commit: r187228 - in user/sam/wifi/sys: . amd64/amd64
amd64/conf amd64/include arm/arm arm/include arm/mv
arm/mv/discovery arm/mv/kirkwood arm/mv/orion boot/common
boot/forth boot/i386/libi386 ...
Sam Leffler
sam at FreeBSD.org
Wed Jan 14 10:19:10 PST 2009
Author: sam
Date: Wed Jan 14 18:19:06 2009
New Revision: 187228
URL: http://svn.freebsd.org/changeset/base/187228
Log:
sync w/ HEAD
Added:
user/sam/wifi/sys/arm/arm/cpufunc_asm_sheeva.S
- copied unchanged from r187227, head/sys/arm/arm/cpufunc_asm_sheeva.S
user/sam/wifi/sys/bsm/audit_domain.h
- copied unchanged from r187227, head/sys/bsm/audit_domain.h
user/sam/wifi/sys/bsm/audit_socket_type.h
- copied unchanged from r187227, head/sys/bsm/audit_socket_type.h
user/sam/wifi/sys/dev/usb2/controller/atmegadci.c
- copied unchanged from r187227, head/sys/dev/usb2/controller/atmegadci.c
user/sam/wifi/sys/dev/usb2/controller/atmegadci.h
- copied unchanged from r187227, head/sys/dev/usb2/controller/atmegadci.h
user/sam/wifi/sys/dev/usb2/controller/atmegadci_atmelarm.c
- copied unchanged from r187227, head/sys/dev/usb2/controller/atmegadci_atmelarm.c
user/sam/wifi/sys/dev/usb2/ethernet/if_auereg.h
- copied unchanged from r187227, head/sys/dev/usb2/ethernet/if_auereg.h
user/sam/wifi/sys/dev/usb2/ethernet/if_axereg.h
- copied unchanged from r187227, head/sys/dev/usb2/ethernet/if_axereg.h
user/sam/wifi/sys/dev/usb2/ethernet/if_cdcereg.h
- copied unchanged from r187227, head/sys/dev/usb2/ethernet/if_cdcereg.h
user/sam/wifi/sys/dev/usb2/ethernet/if_cuereg.h
- copied unchanged from r187227, head/sys/dev/usb2/ethernet/if_cuereg.h
user/sam/wifi/sys/dev/usb2/ethernet/if_kuefw.h
- copied unchanged from r187227, head/sys/dev/usb2/ethernet/if_kuefw.h
user/sam/wifi/sys/dev/usb2/ethernet/if_kuereg.h
- copied unchanged from r187227, head/sys/dev/usb2/ethernet/if_kuereg.h
user/sam/wifi/sys/dev/usb2/ethernet/if_ruereg.h
- copied unchanged from r187227, head/sys/dev/usb2/ethernet/if_ruereg.h
user/sam/wifi/sys/dev/usb2/ethernet/if_udavreg.h
- copied unchanged from r187227, head/sys/dev/usb2/ethernet/if_udavreg.h
user/sam/wifi/sys/dev/usb2/wlan/if_rumfw.h
- copied unchanged from r187227, head/sys/dev/usb2/wlan/if_rumfw.h
user/sam/wifi/sys/dev/usb2/wlan/if_rumreg.h
- copied unchanged from r187227, head/sys/dev/usb2/wlan/if_rumreg.h
user/sam/wifi/sys/dev/usb2/wlan/if_rumvar.h
- copied unchanged from r187227, head/sys/dev/usb2/wlan/if_rumvar.h
user/sam/wifi/sys/dev/usb2/wlan/if_uralreg.h
- copied unchanged from r187227, head/sys/dev/usb2/wlan/if_uralreg.h
user/sam/wifi/sys/dev/usb2/wlan/if_uralvar.h
- copied unchanged from r187227, head/sys/dev/usb2/wlan/if_uralvar.h
user/sam/wifi/sys/dev/usb2/wlan/if_zydfw.h
- copied unchanged from r187227, head/sys/dev/usb2/wlan/if_zydfw.h
user/sam/wifi/sys/dev/usb2/wlan/if_zydreg.h
- copied unchanged from r187227, head/sys/dev/usb2/wlan/if_zydreg.h
user/sam/wifi/sys/modules/usb2/controller_atmegadci/
- copied from r187227, head/sys/modules/usb2/controller_atmegadci/
user/sam/wifi/sys/security/audit/audit_bsm_domain.c
- copied unchanged from r187227, head/sys/security/audit/audit_bsm_domain.c
user/sam/wifi/sys/security/audit/audit_bsm_socket_type.c
- copied unchanged from r187227, head/sys/security/audit/audit_bsm_socket_type.c
Deleted:
user/sam/wifi/sys/arm/arm/cpufunc_asm_feroceon.S
user/sam/wifi/sys/boot/common/load.c
user/sam/wifi/sys/dev/usb2/ethernet/if_aue2_reg.h
user/sam/wifi/sys/dev/usb2/ethernet/if_axe2_reg.h
user/sam/wifi/sys/dev/usb2/ethernet/if_cdce2_reg.h
user/sam/wifi/sys/dev/usb2/ethernet/if_cue2_reg.h
user/sam/wifi/sys/dev/usb2/ethernet/if_kue2_fw.h
user/sam/wifi/sys/dev/usb2/ethernet/if_kue2_reg.h
user/sam/wifi/sys/dev/usb2/ethernet/if_rue2_reg.h
user/sam/wifi/sys/dev/usb2/ethernet/if_udav2_reg.h
user/sam/wifi/sys/dev/usb2/wlan/if_rum2_fw.h
user/sam/wifi/sys/dev/usb2/wlan/if_rum2_reg.h
user/sam/wifi/sys/dev/usb2/wlan/if_rum2_var.h
user/sam/wifi/sys/dev/usb2/wlan/if_ural2_reg.h
user/sam/wifi/sys/dev/usb2/wlan/if_ural2_var.h
user/sam/wifi/sys/dev/usb2/wlan/if_zyd2_fw.h
user/sam/wifi/sys/dev/usb2/wlan/if_zyd2_reg.h
user/sam/wifi/sys/powerpc/booke/support.S
Modified:
user/sam/wifi/sys/ (props changed)
user/sam/wifi/sys/amd64/amd64/amd64_mem.c
user/sam/wifi/sys/amd64/amd64/exception.S
user/sam/wifi/sys/amd64/amd64/identcpu.c
user/sam/wifi/sys/amd64/amd64/initcpu.c
user/sam/wifi/sys/amd64/amd64/msi.c
user/sam/wifi/sys/amd64/conf/GENERIC
user/sam/wifi/sys/amd64/conf/USB2
user/sam/wifi/sys/amd64/include/md_var.h
user/sam/wifi/sys/amd64/include/specialreg.h
user/sam/wifi/sys/arm/arm/cpufunc.c
user/sam/wifi/sys/arm/arm/elf_trampoline.c
user/sam/wifi/sys/arm/include/cpufunc.h
user/sam/wifi/sys/arm/mv/common.c
user/sam/wifi/sys/arm/mv/discovery/db78xxx.c
user/sam/wifi/sys/arm/mv/discovery/discovery.c
user/sam/wifi/sys/arm/mv/files.mv
user/sam/wifi/sys/arm/mv/gpio.c
user/sam/wifi/sys/arm/mv/kirkwood/db88f6xxx.c
user/sam/wifi/sys/arm/mv/kirkwood/kirkwood.c
user/sam/wifi/sys/arm/mv/mv_machdep.c
user/sam/wifi/sys/arm/mv/mv_pci.c
user/sam/wifi/sys/arm/mv/mvreg.h
user/sam/wifi/sys/arm/mv/mvvar.h
user/sam/wifi/sys/arm/mv/obio.c
user/sam/wifi/sys/arm/mv/orion/db88f5xxx.c
user/sam/wifi/sys/arm/mv/orion/orion.c
user/sam/wifi/sys/boot/forth/support.4th
user/sam/wifi/sys/boot/i386/libi386/bootinfo64.c
user/sam/wifi/sys/bsm/audit.h
user/sam/wifi/sys/bsm/audit_errno.h
user/sam/wifi/sys/bsm/audit_internal.h
user/sam/wifi/sys/bsm/audit_kevents.h
user/sam/wifi/sys/bsm/audit_record.h
user/sam/wifi/sys/cam/cam_xpt.c
user/sam/wifi/sys/cam/cam_xpt_sim.h
user/sam/wifi/sys/cam/scsi/scsi_cd.c
user/sam/wifi/sys/cam/scsi/scsi_ch.c
user/sam/wifi/sys/cam/scsi/scsi_pass.c
user/sam/wifi/sys/cam/scsi/scsi_pt.c
user/sam/wifi/sys/cam/scsi/scsi_sa.c
user/sam/wifi/sys/cam/scsi/scsi_ses.c
user/sam/wifi/sys/cam/scsi/scsi_sg.c
user/sam/wifi/sys/conf/Makefile.arm
user/sam/wifi/sys/conf/NOTES
user/sam/wifi/sys/conf/files
user/sam/wifi/sys/conf/files.amd64
user/sam/wifi/sys/conf/files.powerpc
user/sam/wifi/sys/conf/kern.pre.mk
user/sam/wifi/sys/conf/options
user/sam/wifi/sys/contrib/pf/ (props changed)
user/sam/wifi/sys/crypto/via/padlock.c
user/sam/wifi/sys/crypto/via/padlock_hash.c
user/sam/wifi/sys/dev/adb/adb_kbd.c
user/sam/wifi/sys/dev/agp/agp_amd64.c
user/sam/wifi/sys/dev/ata/ata-queue.c
user/sam/wifi/sys/dev/ata/atapi-cam.c
user/sam/wifi/sys/dev/ath/ath_hal/ar5212/ar5212_rfgain.c
user/sam/wifi/sys/dev/ath/if_ath.c
user/sam/wifi/sys/dev/ath/if_athioctl.h
user/sam/wifi/sys/dev/ath/if_athvar.h
user/sam/wifi/sys/dev/bce/if_bce.c
user/sam/wifi/sys/dev/e1000/if_igb.c
user/sam/wifi/sys/dev/fxp/if_fxp.c
user/sam/wifi/sys/dev/if_ndis/if_ndis.c
user/sam/wifi/sys/dev/md/md.c
user/sam/wifi/sys/dev/mge/if_mge.c
user/sam/wifi/sys/dev/mge/if_mgevar.h
user/sam/wifi/sys/dev/msk/if_msk.c
user/sam/wifi/sys/dev/msk/if_mskreg.h
user/sam/wifi/sys/dev/sound/pci/hda/hdac.c
user/sam/wifi/sys/dev/sound/pcm/dsp.c
user/sam/wifi/sys/dev/sound/pcm/mixer.c
user/sam/wifi/sys/dev/sound/pcm/sound.c
user/sam/wifi/sys/dev/sound/pcm/sound.h
user/sam/wifi/sys/dev/syscons/teken/ (props changed)
user/sam/wifi/sys/dev/uart/uart_cpu_mv.c
user/sam/wifi/sys/dev/usb/ehci_ixp4xx.c (props changed)
user/sam/wifi/sys/dev/usb/ehci_mbus.c
user/sam/wifi/sys/dev/usb/usbdevs
user/sam/wifi/sys/dev/usb2/controller/at91dci.c
user/sam/wifi/sys/dev/usb2/controller/at91dci.h
user/sam/wifi/sys/dev/usb2/controller/at91dci_atmelarm.c
user/sam/wifi/sys/dev/usb2/controller/ehci2.c
user/sam/wifi/sys/dev/usb2/controller/ehci2.h
user/sam/wifi/sys/dev/usb2/controller/ehci2_pci.c
user/sam/wifi/sys/dev/usb2/controller/musb2_otg.c
user/sam/wifi/sys/dev/usb2/controller/musb2_otg.h
user/sam/wifi/sys/dev/usb2/controller/musb2_otg_atmelarm.c
user/sam/wifi/sys/dev/usb2/controller/ohci2.c
user/sam/wifi/sys/dev/usb2/controller/ohci2.h
user/sam/wifi/sys/dev/usb2/controller/ohci2_atmelarm.c
user/sam/wifi/sys/dev/usb2/controller/ohci2_pci.c
user/sam/wifi/sys/dev/usb2/controller/uhci2.c
user/sam/wifi/sys/dev/usb2/controller/uhci2.h
user/sam/wifi/sys/dev/usb2/controller/uhci2_pci.c
user/sam/wifi/sys/dev/usb2/controller/usb2_bus.h
user/sam/wifi/sys/dev/usb2/controller/usb2_controller.c
user/sam/wifi/sys/dev/usb2/controller/usb2_controller.h
user/sam/wifi/sys/dev/usb2/controller/uss820dci.c
user/sam/wifi/sys/dev/usb2/controller/uss820dci.h
user/sam/wifi/sys/dev/usb2/controller/uss820dci_atmelarm.c
user/sam/wifi/sys/dev/usb2/core/usb2_busdma.c
user/sam/wifi/sys/dev/usb2/core/usb2_compat_linux.c
user/sam/wifi/sys/dev/usb2/core/usb2_core.h
user/sam/wifi/sys/dev/usb2/core/usb2_debug.c
user/sam/wifi/sys/dev/usb2/core/usb2_device.c
user/sam/wifi/sys/dev/usb2/core/usb2_generic.c
user/sam/wifi/sys/dev/usb2/core/usb2_handle_request.c
user/sam/wifi/sys/dev/usb2/core/usb2_hub.c
user/sam/wifi/sys/dev/usb2/core/usb2_mbuf.h
user/sam/wifi/sys/dev/usb2/core/usb2_parse.c
user/sam/wifi/sys/dev/usb2/core/usb2_request.c
user/sam/wifi/sys/dev/usb2/core/usb2_sw_transfer.c
user/sam/wifi/sys/dev/usb2/core/usb2_transfer.c
user/sam/wifi/sys/dev/usb2/core/usb2_transfer.h
user/sam/wifi/sys/dev/usb2/ethernet/if_aue2.c
user/sam/wifi/sys/dev/usb2/ethernet/if_axe2.c
user/sam/wifi/sys/dev/usb2/ethernet/if_cdce2.c
user/sam/wifi/sys/dev/usb2/ethernet/if_cue2.c
user/sam/wifi/sys/dev/usb2/ethernet/if_kue2.c
user/sam/wifi/sys/dev/usb2/ethernet/if_rue2.c
user/sam/wifi/sys/dev/usb2/ethernet/if_udav2.c
user/sam/wifi/sys/dev/usb2/image/uscanner2.c
user/sam/wifi/sys/dev/usb2/include/usb2_defs.h
user/sam/wifi/sys/dev/usb2/include/usb2_devid.h
user/sam/wifi/sys/dev/usb2/include/usb2_devtable.h
user/sam/wifi/sys/dev/usb2/include/usb2_standard.h
user/sam/wifi/sys/dev/usb2/misc/ufm2.c
user/sam/wifi/sys/dev/usb2/serial/u3g2.c
user/sam/wifi/sys/dev/usb2/serial/uark2.c
user/sam/wifi/sys/dev/usb2/serial/ubsa2.c
user/sam/wifi/sys/dev/usb2/serial/ubser2.c
user/sam/wifi/sys/dev/usb2/serial/uchcom2.c
user/sam/wifi/sys/dev/usb2/serial/ucycom2.c
user/sam/wifi/sys/dev/usb2/serial/ufoma2.c
user/sam/wifi/sys/dev/usb2/serial/uftdi2.c
user/sam/wifi/sys/dev/usb2/serial/ugensa2.c
user/sam/wifi/sys/dev/usb2/serial/uipaq2.c
user/sam/wifi/sys/dev/usb2/serial/ulpt2.c
user/sam/wifi/sys/dev/usb2/serial/umct2.c
user/sam/wifi/sys/dev/usb2/serial/umodem2.c
user/sam/wifi/sys/dev/usb2/serial/umoscom2.c
user/sam/wifi/sys/dev/usb2/serial/uplcom2.c
user/sam/wifi/sys/dev/usb2/serial/usb2_serial.c
user/sam/wifi/sys/dev/usb2/serial/usb2_serial.h
user/sam/wifi/sys/dev/usb2/serial/uvisor2.c
user/sam/wifi/sys/dev/usb2/serial/uvscom2.c
user/sam/wifi/sys/dev/usb2/sound/uaudio2.c
user/sam/wifi/sys/dev/usb2/storage/ata-usb2.c
user/sam/wifi/sys/dev/usb2/storage/umass2.c
user/sam/wifi/sys/dev/usb2/storage/urio2.c
user/sam/wifi/sys/dev/usb2/wlan/if_rum2.c
user/sam/wifi/sys/dev/usb2/wlan/if_ural2.c
user/sam/wifi/sys/dev/usb2/wlan/if_zyd2.c
user/sam/wifi/sys/fs/devfs/devfs_vnops.c
user/sam/wifi/sys/fs/msdosfs/msdosfs_conv.c
user/sam/wifi/sys/fs/msdosfs/msdosfs_denode.c
user/sam/wifi/sys/fs/pseudofs/pseudofs_vncache.c
user/sam/wifi/sys/geom/geom_vfs.c
user/sam/wifi/sys/i386/conf/GENERIC
user/sam/wifi/sys/i386/conf/USB2
user/sam/wifi/sys/i386/i386/i686_mem.c
user/sam/wifi/sys/i386/i386/identcpu.c
user/sam/wifi/sys/i386/i386/initcpu.c
user/sam/wifi/sys/i386/i386/msi.c
user/sam/wifi/sys/kern/kern_timeout.c
user/sam/wifi/sys/kern/sysv_sem.c
user/sam/wifi/sys/kern/vfs_extattr.c
user/sam/wifi/sys/mips/mips/elf64_machdep.c (props changed)
user/sam/wifi/sys/modules/Makefile
user/sam/wifi/sys/modules/iwnfw/Makefile
user/sam/wifi/sys/modules/usb2/serial_3g/ (props changed)
user/sam/wifi/sys/net/if_loop.c
user/sam/wifi/sys/net/route.h
user/sam/wifi/sys/net/rtsock.c
user/sam/wifi/sys/net80211/ieee80211.c
user/sam/wifi/sys/net80211/ieee80211.h
user/sam/wifi/sys/net80211/ieee80211_adhoc.c
user/sam/wifi/sys/net80211/ieee80211_ddb.c
user/sam/wifi/sys/net80211/ieee80211_freebsd.c
user/sam/wifi/sys/net80211/ieee80211_input.c
user/sam/wifi/sys/net80211/ieee80211_input.h
user/sam/wifi/sys/net80211/ieee80211_ioctl.c
user/sam/wifi/sys/net80211/ieee80211_ioctl.h
user/sam/wifi/sys/net80211/ieee80211_node.c
user/sam/wifi/sys/net80211/ieee80211_node.h
user/sam/wifi/sys/net80211/ieee80211_output.c
user/sam/wifi/sys/net80211/ieee80211_proto.h
user/sam/wifi/sys/net80211/ieee80211_scan.h
user/sam/wifi/sys/net80211/ieee80211_scan_sta.c
user/sam/wifi/sys/net80211/ieee80211_var.h
user/sam/wifi/sys/netgraph/ng_vjc.c
user/sam/wifi/sys/netinet/in.c
user/sam/wifi/sys/netinet/in.h
user/sam/wifi/sys/netinet/in_pcb.c
user/sam/wifi/sys/netinet/in_pcb.h
user/sam/wifi/sys/netinet/ip_output.c
user/sam/wifi/sys/netinet/tcp_syncache.c
user/sam/wifi/sys/netinet6/in6.c
user/sam/wifi/sys/powerpc/booke/locore.S
user/sam/wifi/sys/powerpc/booke/machdep.c
user/sam/wifi/sys/powerpc/booke/pmap.c
user/sam/wifi/sys/powerpc/booke/trap_subr.S
user/sam/wifi/sys/powerpc/include/pcpu.h
user/sam/wifi/sys/powerpc/include/pmap.h
user/sam/wifi/sys/powerpc/include/pte.h
user/sam/wifi/sys/powerpc/include/tlb.h
user/sam/wifi/sys/powerpc/powermac/macgpio.c
user/sam/wifi/sys/powerpc/powerpc/genassym.c
user/sam/wifi/sys/security/audit/audit_bsm_errno.c
user/sam/wifi/sys/security/audit/audit_bsm_token.c
user/sam/wifi/sys/security/mac/mac_framework.c
user/sam/wifi/sys/security/mac/mac_inet6.c
user/sam/wifi/sys/security/mac/mac_internal.h
user/sam/wifi/sys/security/mac/mac_policy.h
user/sam/wifi/sys/security/mac_biba/mac_biba.c
user/sam/wifi/sys/security/mac_bsdextended/mac_bsdextended.c
user/sam/wifi/sys/security/mac_ifoff/mac_ifoff.c
user/sam/wifi/sys/security/mac_lomac/mac_lomac.c
user/sam/wifi/sys/security/mac_mls/mac_mls.c
user/sam/wifi/sys/security/mac_none/mac_none.c
user/sam/wifi/sys/security/mac_partition/mac_partition.c
user/sam/wifi/sys/security/mac_portacl/mac_portacl.c
user/sam/wifi/sys/security/mac_seeotheruids/mac_seeotheruids.c
user/sam/wifi/sys/security/mac_stub/mac_stub.c
user/sam/wifi/sys/security/mac_test/mac_test.c
user/sam/wifi/sys/sys/soundcard.h
user/sam/wifi/sys/ufs/ffs/ffs_vfsops.c
user/sam/wifi/sys/ufs/ufs/ufs_extattr.c
Modified: user/sam/wifi/sys/amd64/amd64/amd64_mem.c
==============================================================================
--- user/sam/wifi/sys/amd64/amd64/amd64_mem.c Wed Jan 14 17:25:28 2009 (r187227)
+++ user/sam/wifi/sys/amd64/amd64/amd64_mem.c Wed Jan 14 18:19:06 2009 (r187228)
@@ -678,9 +678,17 @@ amd64_mem_drvinit(void *unused)
return;
if ((cpu_id & 0xf00) != 0x600 && (cpu_id & 0xf00) != 0xf00)
return;
- if (cpu_vendor_id != CPU_VENDOR_INTEL &&
- cpu_vendor_id != CPU_VENDOR_AMD)
+ switch (cpu_vendor_id) {
+ case CPU_VENDOR_INTEL:
+ case CPU_VENDOR_AMD:
+ break;
+ case CPU_VENDOR_CENTAUR:
+ if (cpu_exthigh >= 0x80000008)
+ break;
+ /* FALLTHROUGH */
+ default:
return;
+ }
mem_range_softc.mr_op = &amd64_mrops;
}
SYSINIT(amd64memdev, SI_SUB_DRIVERS, SI_ORDER_FIRST, amd64_mem_drvinit, NULL);
Modified: user/sam/wifi/sys/amd64/amd64/exception.S
==============================================================================
--- user/sam/wifi/sys/amd64/amd64/exception.S Wed Jan 14 17:25:28 2009 (r187227)
+++ user/sam/wifi/sys/amd64/amd64/exception.S Wed Jan 14 18:19:06 2009 (r187228)
@@ -494,6 +494,7 @@ outofnmi:
movq %rsp,%rdx /* frame */
sti
call *%rax
+ cli
nocallchain:
#endif
testl %ebx,%ebx
Modified: user/sam/wifi/sys/amd64/amd64/identcpu.c
==============================================================================
--- user/sam/wifi/sys/amd64/amd64/identcpu.c Wed Jan 14 17:25:28 2009 (r187227)
+++ user/sam/wifi/sys/amd64/amd64/identcpu.c Wed Jan 14 18:19:06 2009 (r187228)
@@ -72,6 +72,7 @@ void panicifcpuunsupported(void);
static u_int find_cpu_vendor_id(void);
static void print_AMD_info(void);
static void print_AMD_assoc(int i);
+static void print_via_padlock_info(void);
int cpu_class;
char machine[] = "amd64";
@@ -132,24 +133,33 @@ printcpuinfo(void)
}
}
- if (cpu_vendor_id == CPU_VENDOR_INTEL) {
+ switch (cpu_vendor_id) {
+ case CPU_VENDOR_INTEL:
/* Please make up your mind folks! */
strcat(cpu_model, "EM64T");
- } else if (cpu_vendor_id == CPU_VENDOR_AMD) {
+ break;
+ case CPU_VENDOR_AMD:
/*
* Values taken from AMD Processor Recognition
* http://www.amd.com/K6/k6docs/pdf/20734g.pdf
* (also describes ``Features'' encodings.
*/
strcpy(cpu_model, "AMD ");
- switch (cpu_id & 0xF00) {
- case 0xf00:
+ if ((cpu_id & 0xf00) == 0xf00)
strcat(cpu_model, "AMD64 Processor");
- break;
- default:
+ else
strcat(cpu_model, "Unknown");
- break;
- }
+ break;
+ case CPU_VENDOR_CENTAUR:
+ strcpy(cpu_model, "VIA ");
+ if ((cpu_id & 0xff0) == 0x6f0)
+ strcat(cpu_model, "Nano Processor");
+ else
+ strcat(cpu_model, "Unknown");
+ break;
+ default:
+ strcat(cpu_model, "Unknown");
+ break;
}
/*
@@ -181,7 +191,8 @@ printcpuinfo(void)
printf(" Id = 0x%x", cpu_id);
if (cpu_vendor_id == CPU_VENDOR_INTEL ||
- cpu_vendor_id == CPU_VENDOR_AMD) {
+ cpu_vendor_id == CPU_VENDOR_AMD ||
+ cpu_vendor_id == CPU_VENDOR_CENTAUR) {
printf(" Stepping = %u", cpu_id & 0xf);
if (cpu_high > 0) {
u_int cmp = 1, htt = 1;
@@ -353,6 +364,9 @@ printcpuinfo(void)
);
}
+ if (cpu_vendor_id == CPU_VENDOR_CENTAUR)
+ print_via_padlock_info();
+
if ((cpu_feature & CPUID_HTT) &&
cpu_vendor_id == CPU_VENDOR_AMD)
cpu_feature &= ~CPUID_HTT;
@@ -376,6 +390,11 @@ printcpuinfo(void)
AMD64_CPU_MODEL(cpu_id) >= 0x3))
tsc_is_invariant = 1;
break;
+ case CPU_VENDOR_CENTAUR:
+ if (AMD64_CPU_FAMILY(cpu_id) == 0x6 &&
+ AMD64_CPU_MODEL(cpu_id) >= 0xf)
+ tsc_is_invariant = 1;
+ break;
}
if (tsc_is_invariant)
printf("\n TSC: P-state invariant");
@@ -457,7 +476,7 @@ EVENTHANDLER_DEFINE(cpufreq_post_change,
EVENTHANDLER_PRI_ANY);
/*
- * Final stage of CPU identification. -- Should I check TI?
+ * Final stage of CPU identification.
*/
void
identify_cpu(void)
@@ -479,7 +498,8 @@ identify_cpu(void)
cpu_feature2 = regs[2];
if (cpu_vendor_id == CPU_VENDOR_INTEL ||
- cpu_vendor_id == CPU_VENDOR_AMD) {
+ cpu_vendor_id == CPU_VENDOR_AMD ||
+ cpu_vendor_id == CPU_VENDOR_CENTAUR) {
do_cpuid(0x80000000, regs);
cpu_exthigh = regs[0];
}
@@ -600,3 +620,37 @@ print_AMD_info(void)
print_AMD_l2_assoc((regs[2] >> 12) & 0x0f);
}
}
+
+static void
+print_via_padlock_info(void)
+{
+ u_int regs[4];
+
+ /* Check for supported models. */
+ switch (cpu_id & 0xff0) {
+ case 0x690:
+ if ((cpu_id & 0xf) < 3)
+ return;
+ case 0x6a0:
+ case 0x6d0:
+ case 0x6f0:
+ break;
+ default:
+ return;
+ }
+
+ do_cpuid(0xc0000000, regs);
+ if (regs[0] >= 0xc0000001)
+ do_cpuid(0xc0000001, regs);
+ else
+ return;
+
+ printf("\n VIA Padlock Features=0x%b", regs[3],
+ "\020"
+ "\003RNG" /* RNG */
+ "\007AES" /* ACE */
+ "\011AES-CTR" /* ACE2 */
+ "\013SHA1,SHA256" /* PHE */
+ "\015RSA" /* PMM */
+ );
+}
Modified: user/sam/wifi/sys/amd64/amd64/initcpu.c
==============================================================================
--- user/sam/wifi/sys/amd64/amd64/initcpu.c Wed Jan 14 17:25:28 2009 (r187227)
+++ user/sam/wifi/sys/amd64/amd64/initcpu.c Wed Jan 14 18:19:06 2009 (r187228)
@@ -54,6 +54,8 @@ u_int cpu_feature2; /* Feature flags */
u_int amd_feature; /* AMD feature flags */
u_int amd_feature2; /* AMD feature flags */
u_int amd_pminfo; /* AMD advanced power management info */
+u_int via_feature_rng; /* VIA RNG features */
+u_int via_feature_xcrypt; /* VIA ACE features */
u_int cpu_high; /* Highest arg to CPUID */
u_int cpu_exthigh; /* Highest arg to extended CPUID */
u_int cpu_id; /* Stepping ID */
@@ -64,6 +66,75 @@ u_int cpu_vendor_id; /* CPU vendor ID *
u_int cpu_fxsr; /* SSE enabled */
u_int cpu_mxcsr_mask; /* Valid bits in mxcsr */
+SYSCTL_UINT(_hw, OID_AUTO, via_feature_rng, CTLFLAG_RD,
+ &via_feature_rng, 0, "VIA C3/C7 RNG feature available in CPU");
+SYSCTL_UINT(_hw, OID_AUTO, via_feature_xcrypt, CTLFLAG_RD,
+ &via_feature_xcrypt, 0, "VIA C3/C7 xcrypt feature available in CPU");
+
+/*
+ * Initialize special VIA C3/C7 features
+ */
+static void
+init_via(void)
+{
+ u_int regs[4], val;
+ u_int64_t msreg;
+
+ do_cpuid(0xc0000000, regs);
+ val = regs[0];
+ if (val >= 0xc0000001) {
+ do_cpuid(0xc0000001, regs);
+ val = regs[3];
+ } else
+ val = 0;
+
+ /* Enable RNG if present and disabled */
+ if (val & VIA_CPUID_HAS_RNG) {
+ if (!(val & VIA_CPUID_DO_RNG)) {
+ msreg = rdmsr(0x110B);
+ msreg |= 0x40;
+ wrmsr(0x110B, msreg);
+ }
+ via_feature_rng = VIA_HAS_RNG;
+ }
+ /* Enable AES engine if present and disabled */
+ if (val & VIA_CPUID_HAS_ACE) {
+ if (!(val & VIA_CPUID_DO_ACE)) {
+ msreg = rdmsr(0x1107);
+ msreg |= (0x01 << 28);
+ wrmsr(0x1107, msreg);
+ }
+ via_feature_xcrypt |= VIA_HAS_AES;
+ }
+ /* Enable ACE2 engine if present and disabled */
+ if (val & VIA_CPUID_HAS_ACE2) {
+ if (!(val & VIA_CPUID_DO_ACE2)) {
+ msreg = rdmsr(0x1107);
+ msreg |= (0x01 << 28);
+ wrmsr(0x1107, msreg);
+ }
+ via_feature_xcrypt |= VIA_HAS_AESCTR;
+ }
+ /* Enable SHA engine if present and disabled */
+ if (val & VIA_CPUID_HAS_PHE) {
+ if (!(val & VIA_CPUID_DO_PHE)) {
+ msreg = rdmsr(0x1107);
+ msreg |= (0x01 << 28/**/);
+ wrmsr(0x1107, msreg);
+ }
+ via_feature_xcrypt |= VIA_HAS_SHA;
+ }
+ /* Enable MM engine if present and disabled */
+ if (val & VIA_CPUID_HAS_PMM) {
+ if (!(val & VIA_CPUID_DO_PMM)) {
+ msreg = rdmsr(0x1107);
+ msreg |= (0x01 << 28/**/);
+ wrmsr(0x1107, msreg);
+ }
+ via_feature_xcrypt |= VIA_HAS_MM;
+ }
+}
+
/*
* Initialize CPU control registers
*/
@@ -81,4 +152,8 @@ initializecpu(void)
wrmsr(MSR_EFER, msr);
pg_nx = PG_NX;
}
+ if (cpu_vendor_id == CPU_VENDOR_CENTAUR &&
+ AMD64_CPU_FAMILY(cpu_id) == 0x6 &&
+ AMD64_CPU_MODEL(cpu_id) >= 0xf)
+ init_via();
}
Modified: user/sam/wifi/sys/amd64/amd64/msi.c
==============================================================================
--- user/sam/wifi/sys/amd64/amd64/msi.c Wed Jan 14 17:25:28 2009 (r187227)
+++ user/sam/wifi/sys/amd64/amd64/msi.c Wed Jan 14 18:19:06 2009 (r187228)
@@ -51,6 +51,7 @@ __FBSDID("$FreeBSD$");
#include <machine/frame.h>
#include <machine/intr_machdep.h>
#include <machine/apicvar.h>
+#include <machine/specialreg.h>
#include <dev/pci/pcivar.h>
/* Fields in address for Intel MSI messages. */
@@ -212,9 +213,18 @@ msi_init(void)
{
/* Check if we have a supported CPU. */
- if (!(cpu_vendor_id == CPU_VENDOR_INTEL ||
- cpu_vendor_id == CPU_VENDOR_AMD))
+ switch (cpu_vendor_id) {
+ case CPU_VENDOR_INTEL:
+ case CPU_VENDOR_AMD:
+ break;
+ case CPU_VENDOR_CENTAUR:
+ if (AMD64_CPU_FAMILY(cpu_id) == 0x6 &&
+ AMD64_CPU_MODEL(cpu_id) >= 0xf)
+ break;
+ /* FALLTHROUGH */
+ default:
return;
+ }
msi_enabled = 1;
intr_register_pic(&msi_pic);
Modified: user/sam/wifi/sys/amd64/conf/GENERIC
==============================================================================
--- user/sam/wifi/sys/amd64/conf/GENERIC Wed Jan 14 17:25:28 2009 (r187227)
+++ user/sam/wifi/sys/amd64/conf/GENERIC Wed Jan 14 18:19:06 2009 (r187228)
@@ -1,8 +1,8 @@
#
# GENERIC -- Generic kernel configuration file for FreeBSD/amd64
#
-# For more information on this file, please read the handbook section on
-# Kernel Configuration Files:
+# For more information on this file, please read the config(5) manual page,
+# and/or the handbook section on Kernel Configuration Files:
#
# http://www.FreeBSD.org/doc/en_US.ISO8859-1/books/handbook/kernelconfig-config.html
#
@@ -24,6 +24,12 @@ ident GENERIC
# To statically compile in device wiring instead of /boot/device.hints
#hints "GENERIC.hints" # Default places to look for devices.
+# Use the following to compile in values accessible to the kernel
+# through getenv() (or kenv(1) in userland). The format of the file
+# is 'variable=value', see kenv(1)
+#
+# env "GENERIC.env"
+
makeoptions DEBUG=-g # Build kernel with gdb(1) debug symbols
options SCHED_ULE # ULE scheduler
Modified: user/sam/wifi/sys/amd64/conf/USB2
==============================================================================
--- user/sam/wifi/sys/amd64/conf/USB2 Wed Jan 14 17:25:28 2009 (r187227)
+++ user/sam/wifi/sys/amd64/conf/USB2 Wed Jan 14 18:19:06 2009 (r187228)
@@ -108,3 +108,7 @@ device usb2_input_ms
# USB sound and MIDI device support
#device usb2_sound
+
+# USB scanner support
+device usb2_image
+device usb2_scanner
Modified: user/sam/wifi/sys/amd64/include/md_var.h
==============================================================================
--- user/sam/wifi/sys/amd64/include/md_var.h Wed Jan 14 17:25:28 2009 (r187227)
+++ user/sam/wifi/sys/amd64/include/md_var.h Wed Jan 14 18:19:06 2009 (r187228)
@@ -45,6 +45,8 @@ extern u_int cpu_feature2;
extern u_int amd_feature;
extern u_int amd_feature2;
extern u_int amd_pminfo;
+extern u_int via_feature_rng;
+extern u_int via_feature_xcrypt;
extern u_int cpu_fxsr;
extern u_int cpu_high;
extern u_int cpu_id;
Modified: user/sam/wifi/sys/amd64/include/specialreg.h
==============================================================================
--- user/sam/wifi/sys/amd64/include/specialreg.h Wed Jan 14 17:25:28 2009 (r187227)
+++ user/sam/wifi/sys/amd64/include/specialreg.h Wed Jan 14 18:19:06 2009 (r187228)
@@ -459,4 +459,40 @@
#define MSR_TOP_MEM2 0xc001001d /* boundary for ram above 4G */
#define MSR_K8_UCODE_UPDATE 0xc0010020 /* update microcode */
+/* VIA ACE crypto featureset: for via_feature_rng */
+#define VIA_HAS_RNG 1 /* cpu has RNG */
+
+/* VIA ACE crypto featureset: for via_feature_xcrypt */
+#define VIA_HAS_AES 1 /* cpu has AES */
+#define VIA_HAS_SHA 2 /* cpu has SHA1 & SHA256 */
+#define VIA_HAS_MM 4 /* cpu has RSA instructions */
+#define VIA_HAS_AESCTR 8 /* cpu has AES-CTR instructions */
+
+/* Centaur Extended Feature flags */
+#define VIA_CPUID_HAS_RNG 0x000004
+#define VIA_CPUID_DO_RNG 0x000008
+#define VIA_CPUID_HAS_ACE 0x000040
+#define VIA_CPUID_DO_ACE 0x000080
+#define VIA_CPUID_HAS_ACE2 0x000100
+#define VIA_CPUID_DO_ACE2 0x000200
+#define VIA_CPUID_HAS_PHE 0x000400
+#define VIA_CPUID_DO_PHE 0x000800
+#define VIA_CPUID_HAS_PMM 0x001000
+#define VIA_CPUID_DO_PMM 0x002000
+
+/* VIA ACE xcrypt-* instruction context control options */
+#define VIA_CRYPT_CWLO_ROUND_M 0x0000000f
+#define VIA_CRYPT_CWLO_ALG_M 0x00000070
+#define VIA_CRYPT_CWLO_ALG_AES 0x00000000
+#define VIA_CRYPT_CWLO_KEYGEN_M 0x00000080
+#define VIA_CRYPT_CWLO_KEYGEN_HW 0x00000000
+#define VIA_CRYPT_CWLO_KEYGEN_SW 0x00000080
+#define VIA_CRYPT_CWLO_NORMAL 0x00000000
+#define VIA_CRYPT_CWLO_INTERMEDIATE 0x00000100
+#define VIA_CRYPT_CWLO_ENCRYPT 0x00000000
+#define VIA_CRYPT_CWLO_DECRYPT 0x00000200
+#define VIA_CRYPT_CWLO_KEY128 0x0000000a /* 128bit, 10 rds */
+#define VIA_CRYPT_CWLO_KEY192 0x0000040c /* 192bit, 12 rds */
+#define VIA_CRYPT_CWLO_KEY256 0x0000080e /* 256bit, 15 rds */
+
#endif /* !_MACHINE_SPECIALREG_H_ */
Modified: user/sam/wifi/sys/arm/arm/cpufunc.c
==============================================================================
--- user/sam/wifi/sys/arm/arm/cpufunc.c Wed Jan 14 17:25:28 2009 (r187227)
+++ user/sam/wifi/sys/arm/arm/cpufunc.c Wed Jan 14 18:19:06 2009 (r187228)
@@ -358,7 +358,7 @@ struct cpu_functions armv5_ec_cpufuncs =
};
-struct cpu_functions feroceon_cpufuncs = {
+struct cpu_functions sheeva_cpufuncs = {
/* CPU functions */
cpufunc_id, /* id */
@@ -368,7 +368,7 @@ struct cpu_functions feroceon_cpufuncs =
cpufunc_control, /* control */
cpufunc_domains, /* Domain */
- feroceon_setttb, /* Setttb */
+ sheeva_setttb, /* Setttb */
cpufunc_faultstatus, /* Faultstatus */
cpufunc_faultaddress, /* Faultaddress */
@@ -387,17 +387,17 @@ struct cpu_functions feroceon_cpufuncs =
armv5_ec_icache_sync_range, /* icache_sync_range */
armv5_ec_dcache_wbinv_all, /* dcache_wbinv_all */
- feroceon_dcache_wbinv_range, /* dcache_wbinv_range */
- feroceon_dcache_inv_range, /* dcache_inv_range */
- feroceon_dcache_wb_range, /* dcache_wb_range */
+ sheeva_dcache_wbinv_range, /* dcache_wbinv_range */
+ sheeva_dcache_inv_range, /* dcache_inv_range */
+ sheeva_dcache_wb_range, /* dcache_wb_range */
armv5_ec_idcache_wbinv_all, /* idcache_wbinv_all */
- feroceon_idcache_wbinv_range, /* idcache_wbinv_all */
+ sheeva_idcache_wbinv_range, /* idcache_wbinv_all */
- feroceon_l2cache_wbinv_all, /* l2cache_wbinv_all */
- feroceon_l2cache_wbinv_range, /* l2cache_wbinv_range */
- feroceon_l2cache_inv_range, /* l2cache_inv_range */
- feroceon_l2cache_wb_range, /* l2cache_wb_range */
+ sheeva_l2cache_wbinv_all, /* l2cache_wbinv_all */
+ sheeva_l2cache_wbinv_range, /* l2cache_wbinv_range */
+ sheeva_l2cache_inv_range, /* l2cache_inv_range */
+ sheeva_l2cache_wb_range, /* l2cache_wb_range */
/* Other functions */
@@ -1000,7 +1000,7 @@ set_cpufuncs()
cputype == CPU_ID_MV88FR571_VD ||
cputype == CPU_ID_MV88FR571_41) {
- cpufuncs = feroceon_cpufuncs;
+ cpufuncs = sheeva_cpufuncs;
/*
* Workaround for Marvell MV78100 CPU: Cache prefetch
* mechanism may affect the cache coherency validity,
@@ -1011,12 +1011,12 @@ set_cpufuncs()
*/
if (cputype == CPU_ID_MV88FR571_VD ||
cputype == CPU_ID_MV88FR571_41) {
- feroceon_control_ext(0xffffffff,
+ sheeva_control_ext(0xffffffff,
FC_DCACHE_STREAM_EN | FC_WR_ALLOC_EN |
FC_BRANCH_TARG_BUF_DIS | FC_L2CACHE_EN |
FC_L2_PREF_DIS);
} else {
- feroceon_control_ext(0xffffffff,
+ sheeva_control_ext(0xffffffff,
FC_DCACHE_STREAM_EN | FC_WR_ALLOC_EN |
FC_BRANCH_TARG_BUF_DIS | FC_L2CACHE_EN);
}
Copied: user/sam/wifi/sys/arm/arm/cpufunc_asm_sheeva.S (from r187227, head/sys/arm/arm/cpufunc_asm_sheeva.S)
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ user/sam/wifi/sys/arm/arm/cpufunc_asm_sheeva.S Wed Jan 14 18:19:06 2009 (r187228, copy of r187227, head/sys/arm/arm/cpufunc_asm_sheeva.S)
@@ -0,0 +1,386 @@
+/*-
+ * Copyright (C) 2008 MARVELL INTERNATIONAL LTD.
+ * All rights reserved.
+ *
+ * Developed by Semihalf.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of MARVELL nor the names of contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <machine/asm.h>
+__FBSDID("$FreeBSD$");
+
+#include <machine/param.h>
+
+.Lsheeva_cache_line_size:
+ .word _C_LABEL(arm_pdcache_line_size)
+.Lsheeva_asm_page_mask:
+ .word _C_LABEL(PAGE_MASK)
+
+ENTRY(sheeva_setttb)
+ /* Disable irqs */
+ mrs r2, cpsr
+ orr r3, r2, #I32_bit | F32_bit
+ msr cpsr_c, r3
+
+ mov r1, #0
+ mcr p15, 0, r1, c7, c5, 0 /* Invalidate ICache */
+1: mrc p15, 0, r15, c7, c14, 3 /* Test, clean and invalidate DCache */
+ bne 1b /* More to do? */
+
+ mcr p15, 1, r1, c15, c9, 0 /* Clean L2 */
+ mcr p15, 1, r1, c15, c11, 0 /* Invalidate L2 */
+
+ /* Reenable irqs */
+ msr cpsr_c, r2
+
+ mcr p15, 0, r1, c7, c10, 4 /* drain the write buffer */
+
+ mcr p15, 0, r0, c2, c0, 0 /* load new TTB */
+
+ mcr p15, 0, r0, c8, c7, 0 /* invalidate I+D TLBs */
+ RET
+
+ENTRY(sheeva_dcache_wbinv_range)
+ str lr, [sp, #-4]!
+ mrs lr, cpsr
+ /* Start with cache line aligned address */
+ ldr ip, .Lsheeva_cache_line_size
+ ldr ip, [ip]
+ sub ip, ip, #1
+ and r2, r0, ip
+ add r1, r1, r2
+ add r1, r1, ip
+ bics r1, r1, ip
+ bics r0, r0, ip
+
+ ldr ip, .Lsheeva_asm_page_mask
+ and r2, r0, ip
+ rsb r2, r2, #PAGE_SIZE
+ cmp r1, r2
+ movcc ip, r1
+ movcs ip, r2
+1:
+ add r3, r0, ip
+ sub r2, r3, #1
+ /* Disable irqs */
+ orr r3, lr, #I32_bit | F32_bit
+ msr cpsr_c, r3
+ mcr p15, 5, r0, c15, c15, 0 /* Clean and inv zone start address */
+ mcr p15, 5, r2, c15, c15, 1 /* Clean and inv zone end address */
+ /* Enable irqs */
+ msr cpsr_c, lr
+
+ add r0, r0, ip
+ sub r1, r1, ip
+ cmp r1, #PAGE_SIZE
+ movcc ip, r1
+ movcs ip, #PAGE_SIZE
+ cmp r1, #0
+ bne 1b
+ mov r0, #0
+ mcr p15, 0, r0, c7, c10, 4 /* drain the write buffer */
+ ldr lr, [sp], #4
+ RET
+
+ENTRY(sheeva_idcache_wbinv_range)
+ str lr, [sp, #-4]!
+ mrs lr, cpsr
+ /* Start with cache line aligned address */
+ ldr ip, .Lsheeva_cache_line_size
+ ldr ip, [ip]
+ sub ip, ip, #1
+ and r2, r0, ip
+ add r1, r1, r2
+ add r1, r1, ip
+ bics r1, r1, ip
+ bics r0, r0, ip
+
+ ldr ip, .Lsheeva_asm_page_mask
+ and r2, r0, ip
+ rsb r2, r2, #PAGE_SIZE
+ cmp r1, r2
+ movcc ip, r1
+ movcs ip, r2
+1:
+ add r3, r0, ip
+ sub r2, r3, #1
+ /* Disable irqs */
+ orr r3, lr, #I32_bit | F32_bit
+ msr cpsr_c, r3
+ mcr p15, 5, r0, c15, c15, 0 /* Clean and inv zone start address */
+ mcr p15, 5, r2, c15, c15, 1 /* Clean and inv zone end address */
+ /* Enable irqs */
+ msr cpsr_c, lr
+
+ /* Invalidate and clean icache line by line */
+ ldr r3, .Lsheeva_cache_line_size
+ ldr r3, [r3]
+2:
+ mcr p15, 0, r0, c7, c5, 1
+ add r0, r0, r3
+ cmp r2, r0
+ bhi 2b
+
+ add r0, r2, #1
+ sub r1, r1, ip
+ cmp r1, #PAGE_SIZE
+ movcc ip, r1
+ movcs ip, #PAGE_SIZE
+ cmp r1, #0
+ bne 1b
+ mov r0, #0
+ mcr p15, 0, r0, c7, c10, 4 /* drain the write buffer */
+ ldr lr, [sp], #4
+ RET
+
+ENTRY(sheeva_dcache_inv_range)
+ str lr, [sp, #-4]!
+ mrs lr, cpsr
+ /* Start with cache line aligned address */
+ ldr ip, .Lsheeva_cache_line_size
+ ldr ip, [ip]
+ sub ip, ip, #1
+ and r2, r0, ip
+ add r1, r1, r2
+ add r1, r1, ip
+ bics r1, r1, ip
+ bics r0, r0, ip
+
+ ldr ip, .Lsheeva_asm_page_mask
+ and r2, r0, ip
+ rsb r2, r2, #PAGE_SIZE
+ cmp r1, r2
+ movcc ip, r1
+ movcs ip, r2
+1:
+ add r3, r0, ip
+ sub r2, r3, #1
+ /* Disable irqs */
+ orr r3, lr, #I32_bit | F32_bit
+ msr cpsr_c, r3
+ mcr p15, 5, r0, c15, c14, 0 /* Inv zone start address */
+ mcr p15, 5, r2, c15, c14, 1 /* Inv zone end address */
+ /* Enable irqs */
+ msr cpsr_c, lr
+
+ add r0, r0, ip
+ sub r1, r1, ip
+ cmp r1, #PAGE_SIZE
+ movcc ip, r1
+ movcs ip, #PAGE_SIZE
+ cmp r1, #0
+ bne 1b
+ mov r0, #0
+ mcr p15, 0, r0, c7, c10, 4 /* drain the write buffer */
+ ldr lr, [sp], #4
+ RET
+
+ENTRY(sheeva_dcache_wb_range)
+ str lr, [sp, #-4]!
+ mrs lr, cpsr
+ /* Start with cache line aligned address */
+ ldr ip, .Lsheeva_cache_line_size
+ ldr ip, [ip]
+ sub ip, ip, #1
+ and r2, r0, ip
+ add r1, r1, r2
+ add r1, r1, ip
+ bics r1, r1, ip
+ bics r0, r0, ip
+
+ ldr ip, .Lsheeva_asm_page_mask
+ and r2, r0, ip
+ rsb r2, r2, #PAGE_SIZE
+ cmp r1, r2
+ movcc ip, r1
+ movcs ip, r2
+1:
+ add r3, r0, ip
+ sub r2, r3, #1
+ /* Disable irqs */
+ orr r3, lr, #I32_bit | F32_bit
+ msr cpsr_c, r3
+ mcr p15, 5, r0, c15, c13, 0 /* Clean zone start address */
+ mcr p15, 5, r2, c15, c13, 1 /* Clean zone end address */
+ /* Enable irqs */
+ msr cpsr_c, lr
+
+ add r0, r0, ip
+ sub r1, r1, ip
+ cmp r1, #PAGE_SIZE
+ movcc ip, r1
+ movcs ip, #PAGE_SIZE
+ cmp r1, #0
+ bne 1b
+ mov r0, #0
+ mcr p15, 0, r0, c7, c10, 4 /* drain the write buffer */
+ ldr lr, [sp], #4
+ RET
+
+ENTRY(sheeva_l2cache_wbinv_range)
+ str lr, [sp, #-4]!
+ mrs lr, cpsr
+ /* Start with cache line aligned address */
+ ldr ip, .Lsheeva_cache_line_size
+ ldr ip, [ip]
+ sub ip, ip, #1
+ and r2, r0, ip
+ add r1, r1, r2
+ add r1, r1, ip
+ bics r1, r1, ip
+ bics r0, r0, ip
+
+ ldr ip, .Lsheeva_asm_page_mask
+ and r2, r0, ip
+ rsb r2, r2, #PAGE_SIZE
+ cmp r1, r2
+ movcc ip, r1
+ movcs ip, r2
+1:
+ add r3, r0, ip
+ sub r2, r3, #1
+ /* Disable irqs */
+ orr r3, lr, #I32_bit | F32_bit
+ msr cpsr_c, r3
+ mcr p15, 1, r0, c15, c9, 4 /* Clean L2 zone start address */
+ mcr p15, 1, r2, c15, c9, 5 /* Clean L2 zone end address */
+ mcr p15, 1, r0, c15, c11, 4 /* Inv L2 zone start address */
+ mcr p15, 1, r2, c15, c11, 5 /* Inv L2 zone end address */
+ /* Enable irqs */
+ msr cpsr_c, lr
+
+ add r0, r0, ip
+ sub r1, r1, ip
+ cmp r1, #PAGE_SIZE
+ movcc ip, r1
+ movcs ip, #PAGE_SIZE
+ cmp r1, #0
+ bne 1b
+ mov r0, #0
+ mcr p15, 0, r0, c7, c10, 4 /* drain the write buffer */
+ ldr lr, [sp], #4
+ RET
+
+ENTRY(sheeva_l2cache_inv_range)
+ str lr, [sp, #-4]!
+ mrs lr, cpsr
+ /* Start with cache line aligned address */
+ ldr ip, .Lsheeva_cache_line_size
+ ldr ip, [ip]
+ sub ip, ip, #1
+ and r2, r0, ip
+ add r1, r1, r2
+ add r1, r1, ip
+ bics r1, r1, ip
+ bics r0, r0, ip
+
+ ldr ip, .Lsheeva_asm_page_mask
+ and r2, r0, ip
+ rsb r2, r2, #PAGE_SIZE
+ cmp r1, r2
+ movcc ip, r1
+ movcs ip, r2
+1:
+ add r3, r0, ip
+ sub r2, r3, #1
+ /* Disable irqs */
+ orr r3, lr, #I32_bit | F32_bit
+ msr cpsr_c, r3
+ mcr p15, 1, r0, c15, c11, 4 /* Inv L2 zone start address */
+ mcr p15, 1, r2, c15, c11, 5 /* Inv L2 zone end address */
+ /* Enable irqs */
+ msr cpsr_c, lr
+
+ add r0, r0, ip
+ sub r1, r1, ip
+ cmp r1, #PAGE_SIZE
+ movcc ip, r1
+ movcs ip, #PAGE_SIZE
+ cmp r1, #0
+ bne 1b
+ mov r0, #0
+ mcr p15, 0, r0, c7, c10, 4 /* drain the write buffer */
+ ldr lr, [sp], #4
+ RET
+
+ENTRY(sheeva_l2cache_wb_range)
+ str lr, [sp, #-4]!
+ mrs lr, cpsr
+ /* Start with cache line aligned address */
+ ldr ip, .Lsheeva_cache_line_size
+ ldr ip, [ip]
+ sub ip, ip, #1
+ and r2, r0, ip
+ add r1, r1, r2
+ add r1, r1, ip
+ bics r1, r1, ip
+ bics r0, r0, ip
+
+ ldr ip, .Lsheeva_asm_page_mask
+ and r2, r0, ip
+ rsb r2, r2, #PAGE_SIZE
+ cmp r1, r2
+ movcc ip, r1
+ movcs ip, r2
+1:
+ add r3, r0, ip
+ sub r2, r3, #1
+ /* Disable irqs */
+ orr r3, lr, #I32_bit | F32_bit
+ msr cpsr_c, r3
+ mcr p15, 1, r0, c15, c9, 4 /* Clean L2 zone start address */
+ mcr p15, 1, r2, c15, c9, 5 /* Clean L2 zone end address */
+ /* Enable irqs */
+ msr cpsr_c, lr
+
+ add r0, r0, ip
+ sub r1, r1, ip
+ cmp r1, #PAGE_SIZE
+ movcc ip, r1
+ movcs ip, #PAGE_SIZE
+ cmp r1, #0
+ bne 1b
+ mov r0, #0
+ mcr p15, 0, r0, c7, c10, 4 /* drain the write buffer */
+ ldr lr, [sp], #4
+ RET
+
+ENTRY(sheeva_l2cache_wbinv_all)
+ mov r0, #0
+ mcr p15, 1, r0, c15, c9, 0 /* Clean L2 */
+ mcr p15, 1, r0, c15, c11, 0 /* Invalidate L2 */
+ mcr p15, 0, r0, c7, c10, 4 /* drain the write buffer */
+ RET
+
+ENTRY(sheeva_control_ext)
+ mrc p15, 1, r3, c15, c1, 0 /* Read the control register */
+ bic r2, r3, r0 /* Clear bits */
+ eor r2, r2, r1 /* XOR bits */
+
+ teq r2, r3 /* Only write if there is a change */
+ mcrne p15, 1, r2, c15, c1, 0 /* Write new control register */
+ mov r0, r3 /* Return old value */
+ RET
Modified: user/sam/wifi/sys/arm/arm/elf_trampoline.c
==============================================================================
--- user/sam/wifi/sys/arm/arm/elf_trampoline.c Wed Jan 14 17:25:28 2009 (r187227)
+++ user/sam/wifi/sys/arm/arm/elf_trampoline.c Wed Jan 14 18:19:06 2009 (r187228)
@@ -74,7 +74,7 @@ void __startC(void);
#ifdef CPU_XSCALE_81342
#define cpu_l2cache_wbinv_all xscalec3_l2cache_purge
#elif defined(SOC_MV_KIRKWOOD) || defined(SOC_MV_DISCOVERY)
-#define cpu_l2cache_wbinv_all feroceon_l2cache_wbinv_all
+#define cpu_l2cache_wbinv_all sheeva_l2cache_wbinv_all
#else
#define cpu_l2cache_wbinv_all()
#endif
Modified: user/sam/wifi/sys/arm/include/cpufunc.h
==============================================================================
--- user/sam/wifi/sys/arm/include/cpufunc.h Wed Jan 14 17:25:28 2009 (r187227)
+++ user/sam/wifi/sys/arm/include/cpufunc.h Wed Jan 14 18:19:06 2009 (r187228)
@@ -377,17 +377,17 @@ extern unsigned arm10_dcache_sets_inc;
extern unsigned arm10_dcache_index_max;
extern unsigned arm10_dcache_index_inc;
-u_int feroceon_control_ext (u_int, u_int);
-void feroceon_setttb (u_int);
-void feroceon_dcache_wbinv_range (vm_offset_t, vm_size_t);
-void feroceon_dcache_inv_range (vm_offset_t, vm_size_t);
-void feroceon_dcache_wb_range (vm_offset_t, vm_size_t);
-void feroceon_idcache_wbinv_range (vm_offset_t, vm_size_t);
-
-void feroceon_l2cache_wbinv_range (vm_offset_t, vm_size_t);
-void feroceon_l2cache_inv_range (vm_offset_t, vm_size_t);
-void feroceon_l2cache_wb_range (vm_offset_t, vm_size_t);
-void feroceon_l2cache_wbinv_all (void);
+u_int sheeva_control_ext (u_int, u_int);
+void sheeva_setttb (u_int);
+void sheeva_dcache_wbinv_range (vm_offset_t, vm_size_t);
+void sheeva_dcache_inv_range (vm_offset_t, vm_size_t);
+void sheeva_dcache_wb_range (vm_offset_t, vm_size_t);
+void sheeva_idcache_wbinv_range (vm_offset_t, vm_size_t);
+
+void sheeva_l2cache_wbinv_range (vm_offset_t, vm_size_t);
+void sheeva_l2cache_inv_range (vm_offset_t, vm_size_t);
+void sheeva_l2cache_wb_range (vm_offset_t, vm_size_t);
+void sheeva_l2cache_wbinv_all (void);
#endif
#ifdef CPU_ARM11
Modified: user/sam/wifi/sys/arm/mv/common.c
==============================================================================
--- user/sam/wifi/sys/arm/mv/common.c Wed Jan 14 17:25:28 2009 (r187227)
+++ user/sam/wifi/sys/arm/mv/common.c Wed Jan 14 18:19:06 2009 (r187228)
@@ -46,13 +46,19 @@ static int decode_win_cpu_valid(void);
static int decode_win_usb_valid(void);
static int decode_win_eth_valid(void);
static int decode_win_pcie_valid(void);
+static int decode_win_sata_valid(void);
+static int decode_win_cesa_valid(void);
static void decode_win_cpu_setup(void);
-static void decode_win_usb_setup(uint32_t ctrl);
+static void decode_win_usb_setup(void);
static void decode_win_eth_setup(uint32_t base);
static void decode_win_pcie_setup(uint32_t base);
+static void decode_win_sata_setup(void);
+static void decode_win_cesa_setup(void);
+
+static void decode_win_cesa_dump(void);
+static void decode_win_usb_dump(void);
-static uint32_t dev, rev;
static uint32_t used_cpu_wins;
uint32_t
@@ -81,6 +87,7 @@ cpu_reset(void)
uint32_t
cpu_extra_feat(void)
{
+ uint32_t dev, rev;
uint32_t ef = 0;
soc_id(&dev, &rev);
@@ -104,17 +111,6 @@ soc_power_ctrl_get(uint32_t mask)
return (mask);
}
-uint32_t
-get_tclk(void)
-{
-
-#if defined(SOC_MV_DISCOVERY)
- return (TCLK_200MHZ);
-#else
- return (TCLK_166MHZ);
-#endif
-}
-
void
soc_id(uint32_t *dev, uint32_t *rev)
{
@@ -165,6 +161,10 @@ soc_identify(void)
break;
case MV_DEV_88F6281:
dev = "Marvell 88F6281";
+ if (r == 0)
+ rev = "Z0";
+ else if (r == 2)
+ rev = "A0";
break;
case MV_DEV_MV78100:
dev = "Marvell MV78100";
@@ -185,22 +185,27 @@ soc_identify(void)
int
soc_decode_win(void)
{
+ uint32_t dev, rev;
/* Retrieve our ID: some windows facilities vary between SoC models */
soc_id(&dev, &rev);
if (decode_win_cpu_valid() != 1 || decode_win_usb_valid() != 1 ||
decode_win_eth_valid() != 1 || decode_win_idma_valid() != 1 ||
- decode_win_pcie_valid() != 1)
+ decode_win_pcie_valid() != 1 || decode_win_sata_valid() != 1 ||
+ decode_win_cesa_valid() != 1)
return(-1);
decode_win_cpu_setup();
- decode_win_usb_setup(MV_USB0_BASE);
+ decode_win_usb_setup();
decode_win_eth_setup(MV_ETH0_BASE);
if (dev == MV_DEV_MV78100)
decode_win_eth_setup(MV_ETH1_BASE);
+ if (dev == MV_DEV_88F6281 || dev == MV_DEV_MV78100)
+ decode_win_cesa_setup();
decode_win_idma_setup();
+ decode_win_xor_setup();
if (dev == MV_DEV_MV78100) {
decode_win_pcie_setup(MV_PCIE00_BASE);
@@ -214,7 +219,8 @@ soc_decode_win(void)
} else
decode_win_pcie_setup(MV_PCIE_BASE);
- /* TODO set up decode wins for SATA */
+ if (dev != MV_DEV_88F5281)
+ decode_win_sata_setup();
return (0);
}
@@ -234,10 +240,15 @@ WIN_REG_IDX_WR(win_cpu, remap_h, MV_WIN_
WIN_REG_IDX_RD(ddr, br, MV_WIN_DDR_BASE, MV_DDR_CADR_BASE)
WIN_REG_IDX_RD(ddr, sz, MV_WIN_DDR_SIZE, MV_DDR_CADR_BASE)
-WIN_REG_IDX_RD(win_usb, cr, MV_WIN_USB_CTRL, MV_USB_AWR_BASE)
-WIN_REG_IDX_RD(win_usb, br, MV_WIN_USB_BASE, MV_USB_AWR_BASE)
-WIN_REG_IDX_WR(win_usb, cr, MV_WIN_USB_CTRL, MV_USB_AWR_BASE)
-WIN_REG_IDX_WR(win_usb, br, MV_WIN_USB_BASE, MV_USB_AWR_BASE)
*** DIFF OUTPUT TRUNCATED AT 1000 LINES ***
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